* [PATCH 0/2] x86/traps: Improvements
@ 2014-06-09 10:56 Andrew Cooper
2014-06-09 10:56 ` [PATCH 1/2] x86/traps: const-correctness for IST handlers Andrew Cooper
2014-06-09 10:56 ` [PATCH 2/2] x86/mce: Sanitise the #MC entry path Andrew Cooper
0 siblings, 2 replies; 5+ messages in thread
From: Andrew Cooper @ 2014-06-09 10:56 UTC (permalink / raw)
To: Xen-devel; +Cc: Andrew Cooper
Some const correctness and entry point cleanup. No functional changes overall.
Andrew Cooper (2):
x86/traps: const-correctness for IST handlers
x86/mce: Sanitise the #MC entry path
xen/arch/x86/alternative.c | 2 +-
xen/arch/x86/cpu/mcheck/mcaction.c | 2 +-
xen/arch/x86/cpu/mcheck/mcaction.h | 2 +-
xen/arch/x86/cpu/mcheck/mce.c | 17 +++++++++--------
xen/arch/x86/cpu/mcheck/mce.h | 5 ++---
xen/arch/x86/cpu/mcheck/mce_amd.c | 9 +--------
xen/arch/x86/cpu/mcheck/mce_intel.c | 18 ++++++------------
xen/arch/x86/cpu/mcheck/x86_mca.h | 2 +-
xen/arch/x86/nmi.c | 2 +-
xen/arch/x86/oprofile/nmi_int.c | 2 +-
xen/arch/x86/oprofile/op_model_athlon.c | 6 +++---
xen/arch/x86/oprofile/op_model_p4.c | 2 +-
xen/arch/x86/oprofile/op_model_ppro.c | 2 +-
xen/arch/x86/oprofile/op_x86_model.h | 2 +-
xen/arch/x86/traps.c | 23 +++++++++--------------
xen/arch/x86/x86_64/compat/traps.c | 2 +-
xen/arch/x86/x86_64/traps.c | 2 +-
xen/include/asm-x86/apic.h | 2 +-
xen/include/asm-x86/nmi.h | 2 +-
xen/include/asm-x86/processor.h | 27 +++++++++++++++++----------
xen/include/asm-x86/traps.h | 2 --
21 files changed, 60 insertions(+), 73 deletions(-)
--
1.7.10.4
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/2] x86/traps: const-correctness for IST handlers
2014-06-09 10:56 [PATCH 0/2] x86/traps: Improvements Andrew Cooper
@ 2014-06-09 10:56 ` Andrew Cooper
2014-06-09 10:56 ` [PATCH 2/2] x86/mce: Sanitise the #MC entry path Andrew Cooper
1 sibling, 0 replies; 5+ messages in thread
From: Andrew Cooper @ 2014-06-09 10:56 UTC (permalink / raw)
To: Xen-devel; +Cc: Andrew Cooper, Jan Beulich
NMI and MCE interrupt handlers have no right to modify their exception frame
or underlying vcpu registers. Apply liberal quantities of 'const' to 'struct
cpu_user_regs *' throughout the codebase.
The Double Fault handler, while an IST handler, reloads some extra
architectural state back into its regs parameter. As this is for printing
purposes and on a terminal error path, the const requirements for #DF are
relaxed.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
CC: Jan Beulich <JBeulich@suse.com>
---
xen/arch/x86/alternative.c | 2 +-
xen/arch/x86/cpu/mcheck/mcaction.c | 2 +-
xen/arch/x86/cpu/mcheck/mcaction.h | 2 +-
xen/arch/x86/cpu/mcheck/mce.c | 12 ++++++------
xen/arch/x86/cpu/mcheck/mce.h | 4 ++--
xen/arch/x86/cpu/mcheck/mce_amd.c | 2 +-
xen/arch/x86/cpu/mcheck/mce_intel.c | 12 ++++++------
xen/arch/x86/cpu/mcheck/x86_mca.h | 2 +-
xen/arch/x86/nmi.c | 2 +-
xen/arch/x86/oprofile/nmi_int.c | 2 +-
xen/arch/x86/oprofile/op_model_athlon.c | 6 +++---
xen/arch/x86/oprofile/op_model_p4.c | 2 +-
xen/arch/x86/oprofile/op_model_ppro.c | 2 +-
xen/arch/x86/oprofile/op_x86_model.h | 2 +-
xen/arch/x86/traps.c | 20 ++++++++++----------
xen/arch/x86/x86_64/compat/traps.c | 2 +-
xen/arch/x86/x86_64/traps.c | 2 +-
xen/include/asm-x86/apic.h | 2 +-
xen/include/asm-x86/nmi.h | 2 +-
xen/include/asm-x86/processor.h | 27 +++++++++++++++++----------
xen/include/asm-x86/traps.h | 2 +-
21 files changed, 59 insertions(+), 52 deletions(-)
diff --git a/xen/arch/x86/alternative.c b/xen/arch/x86/alternative.c
index 4b6c948..e91fb87 100644
--- a/xen/arch/x86/alternative.c
+++ b/xen/arch/x86/alternative.c
@@ -78,7 +78,7 @@ static const unsigned char * const p6_nops[ASM_NOP_MAX+1] /*__initconst*/ = {
static const unsigned char * const *ideal_nops __initdata = k8_nops;
-static int __init mask_nmi_callback(struct cpu_user_regs *regs, int cpu)
+static int __init mask_nmi_callback(const struct cpu_user_regs *regs, int cpu)
{
return 1;
}
diff --git a/xen/arch/x86/cpu/mcheck/mcaction.c b/xen/arch/x86/cpu/mcheck/mcaction.c
index adf2ded..9cf2499 100644
--- a/xen/arch/x86/cpu/mcheck/mcaction.c
+++ b/xen/arch/x86/cpu/mcheck/mcaction.c
@@ -38,7 +38,7 @@ void mce_register_addrcheck(mce_check_addr_t cbfunc)
void
mc_memerr_dhandler(struct mca_binfo *binfo,
enum mce_result *result,
- struct cpu_user_regs *regs)
+ const struct cpu_user_regs *regs)
{
struct mcinfo_bank *bank = binfo->mib;
struct mcinfo_global *global = binfo->mig;
diff --git a/xen/arch/x86/cpu/mcheck/mcaction.h b/xen/arch/x86/cpu/mcheck/mcaction.h
index 0f70a24..c6044d5 100644
--- a/xen/arch/x86/cpu/mcheck/mcaction.h
+++ b/xen/arch/x86/cpu/mcheck/mcaction.h
@@ -7,7 +7,7 @@
void
mc_memerr_dhandler(struct mca_binfo *binfo,
enum mce_result *result,
- struct cpu_user_regs *regs);
+ const struct cpu_user_regs *regs);
#define MC_ADDR_PHYSICAL 0
#define MC_ADDR_VIRTUAL 1
diff --git a/xen/arch/x86/cpu/mcheck/mce.c b/xen/arch/x86/cpu/mcheck/mce.c
index c6e3092..13e5547 100644
--- a/xen/arch/x86/cpu/mcheck/mce.c
+++ b/xen/arch/x86/cpu/mcheck/mce.c
@@ -70,7 +70,7 @@ static void __init mce_set_verbosity(char *str)
custom_param("mce_verbosity", mce_set_verbosity);
/* Handle unconfigured int18 (should never happen) */
-static void unexpected_machine_check(struct cpu_user_regs *regs, long error_code)
+static void unexpected_machine_check(const struct cpu_user_regs *regs, long error_code)
{
console_force_unlock();
printk("Unexpected Machine Check Exception\n");
@@ -88,7 +88,7 @@ void x86_mce_vector_register(x86_mce_vector_t hdlr)
/* Call the installed machine check handler for this CPU setup. */
-void machine_check_vector(struct cpu_user_regs *regs, long error_code)
+void machine_check_vector(const struct cpu_user_regs *regs, long error_code)
{
_machine_check_vector(regs, error_code);
}
@@ -424,7 +424,7 @@ static void mce_spin_unlock(spinlock_t *lk)
spin_unlock(lk);
}
-static enum mce_result mce_action(struct cpu_user_regs *regs,
+static enum mce_result mce_action(const struct cpu_user_regs *regs,
mctelem_cookie_t mctc);
/*
@@ -432,7 +432,7 @@ static enum mce_result mce_action(struct cpu_user_regs *regs,
* -1: if system can't be recovered
* 0: Continue to next step
*/
-static int mce_urgent_action(struct cpu_user_regs *regs,
+static int mce_urgent_action(const struct cpu_user_regs *regs,
mctelem_cookie_t mctc)
{
uint64_t gstatus;
@@ -459,7 +459,7 @@ static int mce_urgent_action(struct cpu_user_regs *regs,
}
/* Shared #MC handler. */
-void mcheck_cmn_handler(struct cpu_user_regs *regs, long error_code,
+void mcheck_cmn_handler(const struct cpu_user_regs *regs, long error_code,
struct mca_banks *bankmask, struct mca_banks *clear_bank)
{
uint64_t gstatus;
@@ -1570,7 +1570,7 @@ void mc_panic(char *s)
*/
/* Maybe called in MCE context, no lock, no printk */
-static enum mce_result mce_action(struct cpu_user_regs *regs,
+static enum mce_result mce_action(const struct cpu_user_regs *regs,
mctelem_cookie_t mctc)
{
struct mc_info *local_mi;
diff --git a/xen/arch/x86/cpu/mcheck/mce.h b/xen/arch/x86/cpu/mcheck/mce.h
index 33bd1ab..0397f80 100644
--- a/xen/arch/x86/cpu/mcheck/mce.h
+++ b/xen/arch/x86/cpu/mcheck/mce.h
@@ -62,12 +62,12 @@ void x86_mc_get_cpu_info(unsigned, uint32_t *, uint16_t *, uint16_t *,
uint32_t *, uint32_t *, uint32_t *, uint32_t *);
/* Register a handler for machine check exceptions. */
-typedef void (*x86_mce_vector_t)(struct cpu_user_regs *, long);
+typedef void (*x86_mce_vector_t)(const struct cpu_user_regs *, long);
extern void x86_mce_vector_register(x86_mce_vector_t);
/* Common generic MCE handler that implementations may nominate
* via x86_mce_vector_register. */
-extern void mcheck_cmn_handler(struct cpu_user_regs *, long,
+extern void mcheck_cmn_handler(const struct cpu_user_regs *, long,
struct mca_banks *, struct mca_banks *);
/* Register a handler for judging whether mce is recoverable. */
diff --git a/xen/arch/x86/cpu/mcheck/mce_amd.c b/xen/arch/x86/cpu/mcheck/mce_amd.c
index d59e21d..9daa461 100644
--- a/xen/arch/x86/cpu/mcheck/mce_amd.c
+++ b/xen/arch/x86/cpu/mcheck/mce_amd.c
@@ -242,7 +242,7 @@ amd_f10_handler(struct mc_info *mi, uint16_t bank, uint64_t status)
}
/* Common AMD Machine Check Handler for AMD K8 and higher */
-static void amd_cmn_machine_check(struct cpu_user_regs *regs, long error_code)
+static void amd_cmn_machine_check(const struct cpu_user_regs *regs, long error_code)
{
mcheck_cmn_handler(regs, error_code, mca_allbanks,
__get_cpu_var(mce_clear_banks));
diff --git a/xen/arch/x86/cpu/mcheck/mce_intel.c b/xen/arch/x86/cpu/mcheck/mce_intel.c
index b32fdb2..ad06efc 100644
--- a/xen/arch/x86/cpu/mcheck/mce_intel.c
+++ b/xen/arch/x86/cpu/mcheck/mce_intel.c
@@ -258,7 +258,7 @@ static enum intel_mce_type intel_check_mce_type(uint64_t status)
static void intel_memerr_dhandler(
struct mca_binfo *binfo,
enum mce_result *result,
- struct cpu_user_regs *regs)
+ const struct cpu_user_regs *regs)
{
mce_printk(MCE_VERBOSE, "MCE: Enter UCR recovery action\n");
mc_memerr_dhandler(binfo, result, regs);
@@ -285,7 +285,7 @@ static int intel_checkaddr(uint64_t status, uint64_t misc, int addrtype)
static void intel_srar_dhandler(
struct mca_binfo *binfo,
enum mce_result *result,
- struct cpu_user_regs *regs)
+ const struct cpu_user_regs *regs)
{
uint64_t status = binfo->mib->mc_status;
@@ -311,7 +311,7 @@ static int intel_srao_check(uint64_t status)
static void intel_srao_dhandler(
struct mca_binfo *binfo,
enum mce_result *result,
- struct cpu_user_regs *regs)
+ const struct cpu_user_regs *regs)
{
uint64_t status = binfo->mib->mc_status;
@@ -340,7 +340,7 @@ static int intel_default_check(uint64_t status)
static void intel_default_mce_dhandler(
struct mca_binfo *binfo,
enum mce_result *result,
- struct cpu_user_regs * regs)
+ const struct cpu_user_regs * regs)
{
uint64_t status = binfo->mib->mc_status;
enum intel_mce_type type;
@@ -362,7 +362,7 @@ static const struct mca_error_handler intel_mce_dhandlers[] = {
static void intel_default_mce_uhandler(
struct mca_binfo *binfo,
enum mce_result *result,
- struct cpu_user_regs *regs)
+ const struct cpu_user_regs *regs)
{
uint64_t status = binfo->mib->mc_status;
enum intel_mce_type type;
@@ -384,7 +384,7 @@ static const struct mca_error_handler intel_mce_uhandlers[] = {
{intel_default_check, intel_default_mce_uhandler}
};
-static void intel_machine_check(struct cpu_user_regs * regs, long error_code)
+static void intel_machine_check(const struct cpu_user_regs * regs, long error_code)
{
mcheck_cmn_handler(regs, error_code, mca_allbanks,
__get_cpu_var(mce_clear_banks));
diff --git a/xen/arch/x86/cpu/mcheck/x86_mca.h b/xen/arch/x86/cpu/mcheck/x86_mca.h
index ca5dfff..a2cd37e 100644
--- a/xen/arch/x86/cpu/mcheck/x86_mca.h
+++ b/xen/arch/x86/cpu/mcheck/x86_mca.h
@@ -152,7 +152,7 @@ struct mca_error_handler
*/
int (*owned_error)(uint64_t status);
void (*recovery_handler)(struct mca_binfo *binfo,
- enum mce_result *result, struct cpu_user_regs *regs);
+ enum mce_result *result, const struct cpu_user_regs *regs);
};
/* Global variables */
diff --git a/xen/arch/x86/nmi.c b/xen/arch/x86/nmi.c
index f5810a4..c4427a6 100644
--- a/xen/arch/x86/nmi.c
+++ b/xen/arch/x86/nmi.c
@@ -432,7 +432,7 @@ int __init watchdog_setup(void)
return 0;
}
-void nmi_watchdog_tick(struct cpu_user_regs * regs)
+void nmi_watchdog_tick(const struct cpu_user_regs *regs)
{
unsigned int sum = this_cpu(nmi_timer_ticks);
diff --git a/xen/arch/x86/oprofile/nmi_int.c b/xen/arch/x86/oprofile/nmi_int.c
index c824b84..eb12fcb 100644
--- a/xen/arch/x86/oprofile/nmi_int.c
+++ b/xen/arch/x86/oprofile/nmi_int.c
@@ -82,7 +82,7 @@ void passive_domain_destroy(struct vcpu *v)
model->free_msr(v);
}
-static int nmi_callback(struct cpu_user_regs *regs, int cpu)
+static int nmi_callback(const struct cpu_user_regs *regs, int cpu)
{
int xen_mode, ovf;
diff --git a/xen/arch/x86/oprofile/op_model_athlon.c b/xen/arch/x86/oprofile/op_model_athlon.c
index 204343d..c0a81ed 100644
--- a/xen/arch/x86/oprofile/op_model_athlon.c
+++ b/xen/arch/x86/oprofile/op_model_athlon.c
@@ -237,7 +237,7 @@ static void athlon_setup_ctrs(struct op_msrs const * const msrs)
}
static inline void
-ibs_log_event(u64 data, struct cpu_user_regs * const regs, int mode)
+ibs_log_event(u64 data, struct cpu_user_regs const * const regs, int mode)
{
struct vcpu *v = current;
u32 temp = 0;
@@ -250,7 +250,7 @@ ibs_log_event(u64 data, struct cpu_user_regs * const regs, int mode)
}
-static inline int handle_ibs(int mode, struct cpu_user_regs * const regs)
+static inline int handle_ibs(int mode, struct cpu_user_regs const * const regs)
{
u64 val, ctl;
struct vcpu *v = current;
@@ -310,7 +310,7 @@ static inline int handle_ibs(int mode, struct cpu_user_regs * const regs)
static int athlon_check_ctrs(unsigned int const cpu,
struct op_msrs const * const msrs,
- struct cpu_user_regs * const regs)
+ struct cpu_user_regs const * const regs)
{
uint64_t msr_content;
diff --git a/xen/arch/x86/oprofile/op_model_p4.c b/xen/arch/x86/oprofile/op_model_p4.c
index 34f5fdb..29fe3bc 100644
--- a/xen/arch/x86/oprofile/op_model_p4.c
+++ b/xen/arch/x86/oprofile/op_model_p4.c
@@ -611,7 +611,7 @@ static void p4_setup_ctrs(struct op_msrs const * const msrs)
static int p4_check_ctrs(unsigned int const cpu,
struct op_msrs const * const msrs,
- struct cpu_user_regs * const regs)
+ struct cpu_user_regs const * const regs)
{
unsigned long ctr, stag, real;
uint64_t msr_content;
diff --git a/xen/arch/x86/oprofile/op_model_ppro.c b/xen/arch/x86/oprofile/op_model_ppro.c
index 3225937..8b9f3f6 100644
--- a/xen/arch/x86/oprofile/op_model_ppro.c
+++ b/xen/arch/x86/oprofile/op_model_ppro.c
@@ -126,7 +126,7 @@ static void ppro_setup_ctrs(struct op_msrs const * const msrs)
static int ppro_check_ctrs(unsigned int const cpu,
struct op_msrs const * const msrs,
- struct cpu_user_regs * const regs)
+ struct cpu_user_regs const * const regs)
{
u64 val;
int i;
diff --git a/xen/arch/x86/oprofile/op_x86_model.h b/xen/arch/x86/oprofile/op_x86_model.h
index 31d473b..35bc3c1 100644
--- a/xen/arch/x86/oprofile/op_x86_model.h
+++ b/xen/arch/x86/oprofile/op_x86_model.h
@@ -33,7 +33,7 @@ struct op_x86_model_spec {
void (*setup_ctrs)(struct op_msrs const * const msrs);
int (*check_ctrs)(unsigned int const cpu,
struct op_msrs const * const msrs,
- struct cpu_user_regs * const regs);
+ struct cpu_user_regs const * const regs);
void (*start)(struct op_msrs const * const msrs);
void (*stop)(struct op_msrs const * const msrs);
int (*is_arch_pmu_msr)(u64 msr_index, int *type, int *index);
diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index 8161585..44ac014 100644
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -114,7 +114,7 @@ boolean_param("ler", opt_ler);
#define stack_words_per_line 4
#define ESP_BEFORE_EXCEPTION(regs) ((unsigned long *)regs->rsp)
-static void show_guest_stack(struct vcpu *v, struct cpu_user_regs *regs)
+static void show_guest_stack(struct vcpu *v, const struct cpu_user_regs *regs)
{
int i;
unsigned long *stack, addr;
@@ -290,7 +290,7 @@ static void show_trace(const struct cpu_user_regs *regs)
printk("\n");
}
-void show_stack(struct cpu_user_regs *regs)
+void show_stack(const struct cpu_user_regs *regs)
{
unsigned long *stack = ESP_BEFORE_EXCEPTION(regs), addr;
int i;
@@ -349,7 +349,7 @@ void show_stack_overflow(unsigned int cpu, const struct cpu_user_regs *regs)
#endif
}
-void show_execution_state(struct cpu_user_regs *regs)
+void show_execution_state(const struct cpu_user_regs *regs)
{
show_registers(regs);
show_stack(regs);
@@ -394,7 +394,7 @@ static const char *trapstr(unsigned int trapnr)
* are disabled). In such situations we can't do much that is safe. We try to
* print out some tracing and then we just spin.
*/
-void fatal_trap(int trapnr, struct cpu_user_regs *regs)
+void fatal_trap(int trapnr, const struct cpu_user_regs *regs)
{
static DEFINE_PER_CPU(char, depth);
@@ -1086,7 +1086,7 @@ void do_int3(struct cpu_user_regs *regs)
do_guest_trap(TRAP_int3, regs, 0);
}
-void do_machine_check(struct cpu_user_regs *regs)
+void do_machine_check(const struct cpu_user_regs *regs)
{
machine_check_vector(regs, regs->error_code);
}
@@ -3240,7 +3240,7 @@ static void nmi_hwdom_report(unsigned int reason_idx)
send_guest_trap(d, 0, TRAP_nmi);
}
-static void pci_serr_error(struct cpu_user_regs *regs)
+static void pci_serr_error(const struct cpu_user_regs *regs)
{
outb((inb(0x61) & 0x0f) | 0x04, 0x61); /* clear-and-disable the PCI SERR error line. */
@@ -3260,7 +3260,7 @@ static void pci_serr_error(struct cpu_user_regs *regs)
}
}
-static void io_check_error(struct cpu_user_regs *regs)
+static void io_check_error(const struct cpu_user_regs *regs)
{
switch ( opt_nmi[0] )
{
@@ -3279,7 +3279,7 @@ static void io_check_error(struct cpu_user_regs *regs)
outb((inb(0x61) & 0x07) | 0x00, 0x61); /* enable IOCK */
}
-static void unknown_nmi_error(struct cpu_user_regs *regs, unsigned char reason)
+static void unknown_nmi_error(const struct cpu_user_regs *regs, unsigned char reason)
{
switch ( opt_nmi[0] )
{
@@ -3295,14 +3295,14 @@ static void unknown_nmi_error(struct cpu_user_regs *regs, unsigned char reason)
}
}
-static int dummy_nmi_callback(struct cpu_user_regs *regs, int cpu)
+static int dummy_nmi_callback(const struct cpu_user_regs *regs, int cpu)
{
return 0;
}
static nmi_callback_t nmi_callback = dummy_nmi_callback;
-void do_nmi(struct cpu_user_regs *regs)
+void do_nmi(const struct cpu_user_regs *regs)
{
unsigned int cpu = smp_processor_id();
unsigned char reason;
diff --git a/xen/arch/x86/x86_64/compat/traps.c b/xen/arch/x86/x86_64/compat/traps.c
index 5f0ea0a..b6c2563 100644
--- a/xen/arch/x86/x86_64/compat/traps.c
+++ b/xen/arch/x86/x86_64/compat/traps.c
@@ -3,7 +3,7 @@
#include <compat/callback.h>
#include <compat/arch-x86_32.h>
-void compat_show_guest_stack(struct vcpu *v, struct cpu_user_regs *regs,
+void compat_show_guest_stack(struct vcpu *v, const struct cpu_user_regs *regs,
int debug_stack_lines)
{
unsigned int i, *stack, addr, mask = STACK_SIZE;
diff --git a/xen/arch/x86/x86_64/traps.c b/xen/arch/x86/x86_64/traps.c
index d09b6b6..650c33d 100644
--- a/xen/arch/x86/x86_64/traps.c
+++ b/xen/arch/x86/x86_64/traps.c
@@ -79,7 +79,7 @@ static void _show_registers(
regs->gs, regs->ss, regs->cs);
}
-void show_registers(struct cpu_user_regs *regs)
+void show_registers(const struct cpu_user_regs *regs)
{
struct cpu_user_regs fault_regs = *regs;
unsigned long fault_crs[8];
diff --git a/xen/include/asm-x86/apic.h b/xen/include/asm-x86/apic.h
index 43b39ce..5d7623f 100644
--- a/xen/include/asm-x86/apic.h
+++ b/xen/include/asm-x86/apic.h
@@ -206,7 +206,7 @@ extern void release_lapic_nmi(void);
extern void self_nmi(void);
extern void disable_timer_nmi_watchdog(void);
extern void enable_timer_nmi_watchdog(void);
-extern void nmi_watchdog_tick (struct cpu_user_regs *regs);
+extern void nmi_watchdog_tick (const struct cpu_user_regs *regs);
extern int APIC_init_uniprocessor (void);
extern void disable_APIC_timer(void);
extern void enable_APIC_timer(void);
diff --git a/xen/include/asm-x86/nmi.h b/xen/include/asm-x86/nmi.h
index 58cd9a1..4504fe1 100644
--- a/xen/include/asm-x86/nmi.h
+++ b/xen/include/asm-x86/nmi.h
@@ -9,7 +9,7 @@ struct cpu_user_regs;
/* Watchdog boolean from the command line */
extern bool_t opt_watchdog;
-typedef int (*nmi_callback_t)(struct cpu_user_regs *regs, int cpu);
+typedef int (*nmi_callback_t)(const struct cpu_user_regs *regs, int cpu);
/**
* set_nmi_callback
diff --git a/xen/include/asm-x86/processor.h b/xen/include/asm-x86/processor.h
index 4a60eb0..46107a6 100644
--- a/xen/include/asm-x86/processor.h
+++ b/xen/include/asm-x86/processor.h
@@ -477,27 +477,32 @@ static always_inline void rep_nop(void)
#define cpu_relax() rep_nop()
-void show_stack(struct cpu_user_regs *regs);
+void show_stack(const struct cpu_user_regs *regs);
void show_stack_overflow(unsigned int cpu, const struct cpu_user_regs *regs);
-void show_registers(struct cpu_user_regs *regs);
-void show_execution_state(struct cpu_user_regs *regs);
+void show_registers(const struct cpu_user_regs *regs);
+void show_execution_state(const struct cpu_user_regs *regs);
#define dump_execution_state() run_in_exception_handler(show_execution_state)
void show_page_walk(unsigned long addr);
-void noreturn fatal_trap(int trapnr, struct cpu_user_regs *regs);
+void noreturn fatal_trap(int trapnr, const struct cpu_user_regs *regs);
-void compat_show_guest_stack(struct vcpu *, struct cpu_user_regs *, int lines);
+void compat_show_guest_stack(struct vcpu *v,
+ const struct cpu_user_regs *regs, int lines);
extern void mtrr_ap_init(void);
extern void mtrr_bp_init(void);
void mcheck_init(struct cpuinfo_x86 *c, bool_t bsp);
-#define DECLARE_TRAP_HANDLER(_name) \
-void _name(void); \
-void do_ ## _name(struct cpu_user_regs *regs)
+#define DECLARE_TRAP_HANDLER(_name) \
+ void _name(void); \
+ void do_ ## _name(struct cpu_user_regs *regs)
+#define DECLARE_TRAP_HANDLER_CONST(_name) \
+ void _name(void); \
+ void do_ ## _name(const struct cpu_user_regs *regs)
+
DECLARE_TRAP_HANDLER(divide_error);
DECLARE_TRAP_HANDLER(debug);
-DECLARE_TRAP_HANDLER(nmi);
+DECLARE_TRAP_HANDLER_CONST(nmi);
DECLARE_TRAP_HANDLER(int3);
DECLARE_TRAP_HANDLER(overflow);
DECLARE_TRAP_HANDLER(bounds);
@@ -512,8 +517,10 @@ DECLARE_TRAP_HANDLER(page_fault);
DECLARE_TRAP_HANDLER(early_page_fault);
DECLARE_TRAP_HANDLER(coprocessor_error);
DECLARE_TRAP_HANDLER(simd_coprocessor_error);
-DECLARE_TRAP_HANDLER(machine_check);
+DECLARE_TRAP_HANDLER_CONST(machine_check);
DECLARE_TRAP_HANDLER(alignment_check);
+
+#undef DECLARE_TRAP_HANDLER_CONST
#undef DECLARE_TRAP_HANDLER
void trap_nop(void);
diff --git a/xen/include/asm-x86/traps.h b/xen/include/asm-x86/traps.h
index 556b133..47b7ab9 100644
--- a/xen/include/asm-x86/traps.h
+++ b/xen/include/asm-x86/traps.h
@@ -28,7 +28,7 @@ struct softirq_trap {
struct cpu_user_regs;
-extern void machine_check_vector(struct cpu_user_regs *regs, long error_code);
+extern void machine_check_vector(const struct cpu_user_regs *regs, long error_code);
void async_exception_cleanup(struct vcpu *);
--
1.7.10.4
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/2] x86/mce: Sanitise the #MC entry path
2014-06-09 10:56 [PATCH 0/2] x86/traps: Improvements Andrew Cooper
2014-06-09 10:56 ` [PATCH 1/2] x86/traps: const-correctness for IST handlers Andrew Cooper
@ 2014-06-09 10:56 ` Andrew Cooper
2014-06-18 9:44 ` Andrew Cooper
2014-06-18 10:19 ` Egger, Christoph
1 sibling, 2 replies; 5+ messages in thread
From: Andrew Cooper @ 2014-06-09 10:56 UTC (permalink / raw)
To: Xen-devel; +Cc: Andrew Cooper, Christoph Egger, Jan Beulich, Liu Jinsong
The 'error_code' function parameters are not used at all; drop it from the
call chain. If it is needed at some point in the future, it is available via
cpu_user_regs.
Having do_machine_check() call the non-inlineable machine_check_vector() just
to get at the static function pointer '_machine_check_vector' is silly. Move
do_machine_check() from traps.c to mce.c and do away with
machine_check_vector() entirely.
Both {intel,amd}_init_mce() register their own local function as the #MC
handler, each of which call mcheck_cmn_handler() in an identical way. Fix
this craziness by actually turning mcheck_cmn_handler() into a valid #MC
handler (as its comments already state), and have {intel,amd}_init_mce()
register it instead of their own private handlers.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
CC: Jan Beulich <JBeulich@suse.com>
CC: Christoph Egger <chegger@amazon.de>
CC: Liu Jinsong <jinsong.liu@alibaba-inc.com>
---
xen/arch/x86/cpu/mcheck/mce.c | 11 ++++++-----
xen/arch/x86/cpu/mcheck/mce.h | 5 ++---
xen/arch/x86/cpu/mcheck/mce_amd.c | 9 +--------
xen/arch/x86/cpu/mcheck/mce_intel.c | 8 +-------
xen/arch/x86/traps.c | 5 -----
xen/include/asm-x86/traps.h | 2 --
6 files changed, 10 insertions(+), 30 deletions(-)
diff --git a/xen/arch/x86/cpu/mcheck/mce.c b/xen/arch/x86/cpu/mcheck/mce.c
index 13e5547..812daf6 100644
--- a/xen/arch/x86/cpu/mcheck/mce.c
+++ b/xen/arch/x86/cpu/mcheck/mce.c
@@ -70,7 +70,7 @@ static void __init mce_set_verbosity(char *str)
custom_param("mce_verbosity", mce_set_verbosity);
/* Handle unconfigured int18 (should never happen) */
-static void unexpected_machine_check(const struct cpu_user_regs *regs, long error_code)
+static void unexpected_machine_check(const struct cpu_user_regs *regs)
{
console_force_unlock();
printk("Unexpected Machine Check Exception\n");
@@ -88,9 +88,9 @@ void x86_mce_vector_register(x86_mce_vector_t hdlr)
/* Call the installed machine check handler for this CPU setup. */
-void machine_check_vector(const struct cpu_user_regs *regs, long error_code)
+void do_machine_check(const struct cpu_user_regs *regs)
{
- _machine_check_vector(regs, error_code);
+ _machine_check_vector(regs);
}
/* Init machine check callback handler
@@ -459,9 +459,10 @@ static int mce_urgent_action(const struct cpu_user_regs *regs,
}
/* Shared #MC handler. */
-void mcheck_cmn_handler(const struct cpu_user_regs *regs, long error_code,
- struct mca_banks *bankmask, struct mca_banks *clear_bank)
+void mcheck_cmn_handler(const struct cpu_user_regs *regs)
{
+ struct mca_banks *bankmask = mca_allbanks;
+ struct mca_banks *clear_bank = __get_cpu_var(mce_clear_banks);
uint64_t gstatus;
mctelem_cookie_t mctc = NULL;
struct mca_summary bs;
diff --git a/xen/arch/x86/cpu/mcheck/mce.h b/xen/arch/x86/cpu/mcheck/mce.h
index 0397f80..e83d431 100644
--- a/xen/arch/x86/cpu/mcheck/mce.h
+++ b/xen/arch/x86/cpu/mcheck/mce.h
@@ -62,13 +62,12 @@ void x86_mc_get_cpu_info(unsigned, uint32_t *, uint16_t *, uint16_t *,
uint32_t *, uint32_t *, uint32_t *, uint32_t *);
/* Register a handler for machine check exceptions. */
-typedef void (*x86_mce_vector_t)(const struct cpu_user_regs *, long);
+typedef void (*x86_mce_vector_t)(const struct cpu_user_regs *regs);
extern void x86_mce_vector_register(x86_mce_vector_t);
/* Common generic MCE handler that implementations may nominate
* via x86_mce_vector_register. */
-extern void mcheck_cmn_handler(const struct cpu_user_regs *, long,
- struct mca_banks *, struct mca_banks *);
+extern void mcheck_cmn_handler(const struct cpu_user_regs *regs);
/* Register a handler for judging whether mce is recoverable. */
typedef int (*mce_recoverable_t)(uint64_t status);
diff --git a/xen/arch/x86/cpu/mcheck/mce_amd.c b/xen/arch/x86/cpu/mcheck/mce_amd.c
index 9daa461..4e8ad38 100644
--- a/xen/arch/x86/cpu/mcheck/mce_amd.c
+++ b/xen/arch/x86/cpu/mcheck/mce_amd.c
@@ -241,13 +241,6 @@ amd_f10_handler(struct mc_info *mi, uint16_t bank, uint64_t status)
return mc_ext;
}
-/* Common AMD Machine Check Handler for AMD K8 and higher */
-static void amd_cmn_machine_check(const struct cpu_user_regs *regs, long error_code)
-{
- mcheck_cmn_handler(regs, error_code, mca_allbanks,
- __get_cpu_var(mce_clear_banks));
-}
-
static int amd_need_clearbank_scan(enum mca_source who, uint64_t status)
{
if ( who != MCA_MCE_SCAN )
@@ -287,7 +280,7 @@ amd_mcheck_init(struct cpuinfo_x86 *ci)
/* Assume that machine check support is available.
* The minimum provided support is at least the K8. */
mce_handler_init();
- x86_mce_vector_register(amd_cmn_machine_check);
+ x86_mce_vector_register(mcheck_cmn_handler);
mce_need_clearbank_register(amd_need_clearbank_scan);
for ( i = 0; i < nr_mce_banks; i++ )
diff --git a/xen/arch/x86/cpu/mcheck/mce_intel.c b/xen/arch/x86/cpu/mcheck/mce_intel.c
index ad06efc..48e797e 100644
--- a/xen/arch/x86/cpu/mcheck/mce_intel.c
+++ b/xen/arch/x86/cpu/mcheck/mce_intel.c
@@ -384,12 +384,6 @@ static const struct mca_error_handler intel_mce_uhandlers[] = {
{intel_default_check, intel_default_mce_uhandler}
};
-static void intel_machine_check(const struct cpu_user_regs * regs, long error_code)
-{
- mcheck_cmn_handler(regs, error_code, mca_allbanks,
- __get_cpu_var(mce_clear_banks));
-}
-
/* According to MCA OS writer guide, CMCI handler need to clear bank when
* 1) CE (UC = 0)
* 2) ser_support = 1, Superious error, OVER = 0, EN = 0, [UC = 1]
@@ -772,7 +766,7 @@ static void intel_init_mce(void)
if (firstbank) /* if cmci enabled, firstbank = 0 */
wrmsrl(MSR_IA32_MC0_STATUS, 0x0ULL);
- x86_mce_vector_register(intel_machine_check);
+ x86_mce_vector_register(mcheck_cmn_handler);
mce_recoverable_register(intel_recoverable_scan);
mce_need_clearbank_register(intel_need_clearbank_scan);
mce_register_addrcheck(intel_checkaddr);
diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index 44ac014..8e38c5a 100644
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -1086,11 +1086,6 @@ void do_int3(struct cpu_user_regs *regs)
do_guest_trap(TRAP_int3, regs, 0);
}
-void do_machine_check(const struct cpu_user_regs *regs)
-{
- machine_check_vector(regs, regs->error_code);
-}
-
static void reserved_bit_page_fault(
unsigned long addr, struct cpu_user_regs *regs)
{
diff --git a/xen/include/asm-x86/traps.h b/xen/include/asm-x86/traps.h
index 47b7ab9..ebb6378 100644
--- a/xen/include/asm-x86/traps.h
+++ b/xen/include/asm-x86/traps.h
@@ -28,8 +28,6 @@ struct softirq_trap {
struct cpu_user_regs;
-extern void machine_check_vector(const struct cpu_user_regs *regs, long error_code);
-
void async_exception_cleanup(struct vcpu *);
/**
--
1.7.10.4
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 2/2] x86/mce: Sanitise the #MC entry path
2014-06-09 10:56 ` [PATCH 2/2] x86/mce: Sanitise the #MC entry path Andrew Cooper
@ 2014-06-18 9:44 ` Andrew Cooper
2014-06-18 10:19 ` Egger, Christoph
1 sibling, 0 replies; 5+ messages in thread
From: Andrew Cooper @ 2014-06-18 9:44 UTC (permalink / raw)
To: Andrew Cooper; +Cc: Liu Jinsong, Christoph Egger, Jan Beulich, Xen-devel
Ping?
On 09/06/14 11:56, Andrew Cooper wrote:
> The 'error_code' function parameters are not used at all; drop it from the
> call chain. If it is needed at some point in the future, it is available via
> cpu_user_regs.
>
> Having do_machine_check() call the non-inlineable machine_check_vector() just
> to get at the static function pointer '_machine_check_vector' is silly. Move
> do_machine_check() from traps.c to mce.c and do away with
> machine_check_vector() entirely.
>
> Both {intel,amd}_init_mce() register their own local function as the #MC
> handler, each of which call mcheck_cmn_handler() in an identical way. Fix
> this craziness by actually turning mcheck_cmn_handler() into a valid #MC
> handler (as its comments already state), and have {intel,amd}_init_mce()
> register it instead of their own private handlers.
>
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
> CC: Jan Beulich <JBeulich@suse.com>
> CC: Christoph Egger <chegger@amazon.de>
> CC: Liu Jinsong <jinsong.liu@alibaba-inc.com>
> ---
> xen/arch/x86/cpu/mcheck/mce.c | 11 ++++++-----
> xen/arch/x86/cpu/mcheck/mce.h | 5 ++---
> xen/arch/x86/cpu/mcheck/mce_amd.c | 9 +--------
> xen/arch/x86/cpu/mcheck/mce_intel.c | 8 +-------
> xen/arch/x86/traps.c | 5 -----
> xen/include/asm-x86/traps.h | 2 --
> 6 files changed, 10 insertions(+), 30 deletions(-)
>
> diff --git a/xen/arch/x86/cpu/mcheck/mce.c b/xen/arch/x86/cpu/mcheck/mce.c
> index 13e5547..812daf6 100644
> --- a/xen/arch/x86/cpu/mcheck/mce.c
> +++ b/xen/arch/x86/cpu/mcheck/mce.c
> @@ -70,7 +70,7 @@ static void __init mce_set_verbosity(char *str)
> custom_param("mce_verbosity", mce_set_verbosity);
>
> /* Handle unconfigured int18 (should never happen) */
> -static void unexpected_machine_check(const struct cpu_user_regs *regs, long error_code)
> +static void unexpected_machine_check(const struct cpu_user_regs *regs)
> {
> console_force_unlock();
> printk("Unexpected Machine Check Exception\n");
> @@ -88,9 +88,9 @@ void x86_mce_vector_register(x86_mce_vector_t hdlr)
>
> /* Call the installed machine check handler for this CPU setup. */
>
> -void machine_check_vector(const struct cpu_user_regs *regs, long error_code)
> +void do_machine_check(const struct cpu_user_regs *regs)
> {
> - _machine_check_vector(regs, error_code);
> + _machine_check_vector(regs);
> }
>
> /* Init machine check callback handler
> @@ -459,9 +459,10 @@ static int mce_urgent_action(const struct cpu_user_regs *regs,
> }
>
> /* Shared #MC handler. */
> -void mcheck_cmn_handler(const struct cpu_user_regs *regs, long error_code,
> - struct mca_banks *bankmask, struct mca_banks *clear_bank)
> +void mcheck_cmn_handler(const struct cpu_user_regs *regs)
> {
> + struct mca_banks *bankmask = mca_allbanks;
> + struct mca_banks *clear_bank = __get_cpu_var(mce_clear_banks);
> uint64_t gstatus;
> mctelem_cookie_t mctc = NULL;
> struct mca_summary bs;
> diff --git a/xen/arch/x86/cpu/mcheck/mce.h b/xen/arch/x86/cpu/mcheck/mce.h
> index 0397f80..e83d431 100644
> --- a/xen/arch/x86/cpu/mcheck/mce.h
> +++ b/xen/arch/x86/cpu/mcheck/mce.h
> @@ -62,13 +62,12 @@ void x86_mc_get_cpu_info(unsigned, uint32_t *, uint16_t *, uint16_t *,
> uint32_t *, uint32_t *, uint32_t *, uint32_t *);
>
> /* Register a handler for machine check exceptions. */
> -typedef void (*x86_mce_vector_t)(const struct cpu_user_regs *, long);
> +typedef void (*x86_mce_vector_t)(const struct cpu_user_regs *regs);
> extern void x86_mce_vector_register(x86_mce_vector_t);
>
> /* Common generic MCE handler that implementations may nominate
> * via x86_mce_vector_register. */
> -extern void mcheck_cmn_handler(const struct cpu_user_regs *, long,
> - struct mca_banks *, struct mca_banks *);
> +extern void mcheck_cmn_handler(const struct cpu_user_regs *regs);
>
> /* Register a handler for judging whether mce is recoverable. */
> typedef int (*mce_recoverable_t)(uint64_t status);
> diff --git a/xen/arch/x86/cpu/mcheck/mce_amd.c b/xen/arch/x86/cpu/mcheck/mce_amd.c
> index 9daa461..4e8ad38 100644
> --- a/xen/arch/x86/cpu/mcheck/mce_amd.c
> +++ b/xen/arch/x86/cpu/mcheck/mce_amd.c
> @@ -241,13 +241,6 @@ amd_f10_handler(struct mc_info *mi, uint16_t bank, uint64_t status)
> return mc_ext;
> }
>
> -/* Common AMD Machine Check Handler for AMD K8 and higher */
> -static void amd_cmn_machine_check(const struct cpu_user_regs *regs, long error_code)
> -{
> - mcheck_cmn_handler(regs, error_code, mca_allbanks,
> - __get_cpu_var(mce_clear_banks));
> -}
> -
> static int amd_need_clearbank_scan(enum mca_source who, uint64_t status)
> {
> if ( who != MCA_MCE_SCAN )
> @@ -287,7 +280,7 @@ amd_mcheck_init(struct cpuinfo_x86 *ci)
> /* Assume that machine check support is available.
> * The minimum provided support is at least the K8. */
> mce_handler_init();
> - x86_mce_vector_register(amd_cmn_machine_check);
> + x86_mce_vector_register(mcheck_cmn_handler);
> mce_need_clearbank_register(amd_need_clearbank_scan);
>
> for ( i = 0; i < nr_mce_banks; i++ )
> diff --git a/xen/arch/x86/cpu/mcheck/mce_intel.c b/xen/arch/x86/cpu/mcheck/mce_intel.c
> index ad06efc..48e797e 100644
> --- a/xen/arch/x86/cpu/mcheck/mce_intel.c
> +++ b/xen/arch/x86/cpu/mcheck/mce_intel.c
> @@ -384,12 +384,6 @@ static const struct mca_error_handler intel_mce_uhandlers[] = {
> {intel_default_check, intel_default_mce_uhandler}
> };
>
> -static void intel_machine_check(const struct cpu_user_regs * regs, long error_code)
> -{
> - mcheck_cmn_handler(regs, error_code, mca_allbanks,
> - __get_cpu_var(mce_clear_banks));
> -}
> -
> /* According to MCA OS writer guide, CMCI handler need to clear bank when
> * 1) CE (UC = 0)
> * 2) ser_support = 1, Superious error, OVER = 0, EN = 0, [UC = 1]
> @@ -772,7 +766,7 @@ static void intel_init_mce(void)
> if (firstbank) /* if cmci enabled, firstbank = 0 */
> wrmsrl(MSR_IA32_MC0_STATUS, 0x0ULL);
>
> - x86_mce_vector_register(intel_machine_check);
> + x86_mce_vector_register(mcheck_cmn_handler);
> mce_recoverable_register(intel_recoverable_scan);
> mce_need_clearbank_register(intel_need_clearbank_scan);
> mce_register_addrcheck(intel_checkaddr);
> diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
> index 44ac014..8e38c5a 100644
> --- a/xen/arch/x86/traps.c
> +++ b/xen/arch/x86/traps.c
> @@ -1086,11 +1086,6 @@ void do_int3(struct cpu_user_regs *regs)
> do_guest_trap(TRAP_int3, regs, 0);
> }
>
> -void do_machine_check(const struct cpu_user_regs *regs)
> -{
> - machine_check_vector(regs, regs->error_code);
> -}
> -
> static void reserved_bit_page_fault(
> unsigned long addr, struct cpu_user_regs *regs)
> {
> diff --git a/xen/include/asm-x86/traps.h b/xen/include/asm-x86/traps.h
> index 47b7ab9..ebb6378 100644
> --- a/xen/include/asm-x86/traps.h
> +++ b/xen/include/asm-x86/traps.h
> @@ -28,8 +28,6 @@ struct softirq_trap {
>
> struct cpu_user_regs;
>
> -extern void machine_check_vector(const struct cpu_user_regs *regs, long error_code);
> -
> void async_exception_cleanup(struct vcpu *);
>
> /**
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 2/2] x86/mce: Sanitise the #MC entry path
2014-06-09 10:56 ` [PATCH 2/2] x86/mce: Sanitise the #MC entry path Andrew Cooper
2014-06-18 9:44 ` Andrew Cooper
@ 2014-06-18 10:19 ` Egger, Christoph
1 sibling, 0 replies; 5+ messages in thread
From: Egger, Christoph @ 2014-06-18 10:19 UTC (permalink / raw)
To: Andrew Cooper, Xen-devel; +Cc: Liu Jinsong, Jan Beulich
On 09.06.14 12:56, Andrew Cooper wrote:
> The 'error_code' function parameters are not used at all; drop it from the
> call chain. If it is needed at some point in the future, it is available via
> cpu_user_regs.
>
> Having do_machine_check() call the non-inlineable machine_check_vector() just
> to get at the static function pointer '_machine_check_vector' is silly. Move
> do_machine_check() from traps.c to mce.c and do away with
> machine_check_vector() entirely.
>
> Both {intel,amd}_init_mce() register their own local function as the #MC
> handler, each of which call mcheck_cmn_handler() in an identical way. Fix
> this craziness by actually turning mcheck_cmn_handler() into a valid #MC
> handler (as its comments already state), and have {intel,amd}_init_mce()
> register it instead of their own private handlers.
>
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
> CC: Jan Beulich <JBeulich@suse.com>
> CC: Christoph Egger <chegger@amazon.de>
> CC: Liu Jinsong <jinsong.liu@alibaba-inc.com>
Acked-by: Christoph Egger <chegger@amazon.de>
> ---
> xen/arch/x86/cpu/mcheck/mce.c | 11 ++++++-----
> xen/arch/x86/cpu/mcheck/mce.h | 5 ++---
> xen/arch/x86/cpu/mcheck/mce_amd.c | 9 +--------
> xen/arch/x86/cpu/mcheck/mce_intel.c | 8 +-------
> xen/arch/x86/traps.c | 5 -----
> xen/include/asm-x86/traps.h | 2 --
> 6 files changed, 10 insertions(+), 30 deletions(-)
>
> diff --git a/xen/arch/x86/cpu/mcheck/mce.c b/xen/arch/x86/cpu/mcheck/mce.c
> index 13e5547..812daf6 100644
> --- a/xen/arch/x86/cpu/mcheck/mce.c
> +++ b/xen/arch/x86/cpu/mcheck/mce.c
> @@ -70,7 +70,7 @@ static void __init mce_set_verbosity(char *str)
> custom_param("mce_verbosity", mce_set_verbosity);
>
> /* Handle unconfigured int18 (should never happen) */
> -static void unexpected_machine_check(const struct cpu_user_regs *regs, long error_code)
> +static void unexpected_machine_check(const struct cpu_user_regs *regs)
> {
> console_force_unlock();
> printk("Unexpected Machine Check Exception\n");
> @@ -88,9 +88,9 @@ void x86_mce_vector_register(x86_mce_vector_t hdlr)
>
> /* Call the installed machine check handler for this CPU setup. */
>
> -void machine_check_vector(const struct cpu_user_regs *regs, long error_code)
> +void do_machine_check(const struct cpu_user_regs *regs)
> {
> - _machine_check_vector(regs, error_code);
> + _machine_check_vector(regs);
> }
>
> /* Init machine check callback handler
> @@ -459,9 +459,10 @@ static int mce_urgent_action(const struct cpu_user_regs *regs,
> }
>
> /* Shared #MC handler. */
> -void mcheck_cmn_handler(const struct cpu_user_regs *regs, long error_code,
> - struct mca_banks *bankmask, struct mca_banks *clear_bank)
> +void mcheck_cmn_handler(const struct cpu_user_regs *regs)
> {
> + struct mca_banks *bankmask = mca_allbanks;
> + struct mca_banks *clear_bank = __get_cpu_var(mce_clear_banks);
> uint64_t gstatus;
> mctelem_cookie_t mctc = NULL;
> struct mca_summary bs;
> diff --git a/xen/arch/x86/cpu/mcheck/mce.h b/xen/arch/x86/cpu/mcheck/mce.h
> index 0397f80..e83d431 100644
> --- a/xen/arch/x86/cpu/mcheck/mce.h
> +++ b/xen/arch/x86/cpu/mcheck/mce.h
> @@ -62,13 +62,12 @@ void x86_mc_get_cpu_info(unsigned, uint32_t *, uint16_t *, uint16_t *,
> uint32_t *, uint32_t *, uint32_t *, uint32_t *);
>
> /* Register a handler for machine check exceptions. */
> -typedef void (*x86_mce_vector_t)(const struct cpu_user_regs *, long);
> +typedef void (*x86_mce_vector_t)(const struct cpu_user_regs *regs);
> extern void x86_mce_vector_register(x86_mce_vector_t);
>
> /* Common generic MCE handler that implementations may nominate
> * via x86_mce_vector_register. */
> -extern void mcheck_cmn_handler(const struct cpu_user_regs *, long,
> - struct mca_banks *, struct mca_banks *);
> +extern void mcheck_cmn_handler(const struct cpu_user_regs *regs);
>
> /* Register a handler for judging whether mce is recoverable. */
> typedef int (*mce_recoverable_t)(uint64_t status);
> diff --git a/xen/arch/x86/cpu/mcheck/mce_amd.c b/xen/arch/x86/cpu/mcheck/mce_amd.c
> index 9daa461..4e8ad38 100644
> --- a/xen/arch/x86/cpu/mcheck/mce_amd.c
> +++ b/xen/arch/x86/cpu/mcheck/mce_amd.c
> @@ -241,13 +241,6 @@ amd_f10_handler(struct mc_info *mi, uint16_t bank, uint64_t status)
> return mc_ext;
> }
>
> -/* Common AMD Machine Check Handler for AMD K8 and higher */
> -static void amd_cmn_machine_check(const struct cpu_user_regs *regs, long error_code)
> -{
> - mcheck_cmn_handler(regs, error_code, mca_allbanks,
> - __get_cpu_var(mce_clear_banks));
> -}
> -
> static int amd_need_clearbank_scan(enum mca_source who, uint64_t status)
> {
> if ( who != MCA_MCE_SCAN )
> @@ -287,7 +280,7 @@ amd_mcheck_init(struct cpuinfo_x86 *ci)
> /* Assume that machine check support is available.
> * The minimum provided support is at least the K8. */
> mce_handler_init();
> - x86_mce_vector_register(amd_cmn_machine_check);
> + x86_mce_vector_register(mcheck_cmn_handler);
> mce_need_clearbank_register(amd_need_clearbank_scan);
>
> for ( i = 0; i < nr_mce_banks; i++ )
> diff --git a/xen/arch/x86/cpu/mcheck/mce_intel.c b/xen/arch/x86/cpu/mcheck/mce_intel.c
> index ad06efc..48e797e 100644
> --- a/xen/arch/x86/cpu/mcheck/mce_intel.c
> +++ b/xen/arch/x86/cpu/mcheck/mce_intel.c
> @@ -384,12 +384,6 @@ static const struct mca_error_handler intel_mce_uhandlers[] = {
> {intel_default_check, intel_default_mce_uhandler}
> };
>
> -static void intel_machine_check(const struct cpu_user_regs * regs, long error_code)
> -{
> - mcheck_cmn_handler(regs, error_code, mca_allbanks,
> - __get_cpu_var(mce_clear_banks));
> -}
> -
> /* According to MCA OS writer guide, CMCI handler need to clear bank when
> * 1) CE (UC = 0)
> * 2) ser_support = 1, Superious error, OVER = 0, EN = 0, [UC = 1]
> @@ -772,7 +766,7 @@ static void intel_init_mce(void)
> if (firstbank) /* if cmci enabled, firstbank = 0 */
> wrmsrl(MSR_IA32_MC0_STATUS, 0x0ULL);
>
> - x86_mce_vector_register(intel_machine_check);
> + x86_mce_vector_register(mcheck_cmn_handler);
> mce_recoverable_register(intel_recoverable_scan);
> mce_need_clearbank_register(intel_need_clearbank_scan);
> mce_register_addrcheck(intel_checkaddr);
> diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
> index 44ac014..8e38c5a 100644
> --- a/xen/arch/x86/traps.c
> +++ b/xen/arch/x86/traps.c
> @@ -1086,11 +1086,6 @@ void do_int3(struct cpu_user_regs *regs)
> do_guest_trap(TRAP_int3, regs, 0);
> }
>
> -void do_machine_check(const struct cpu_user_regs *regs)
> -{
> - machine_check_vector(regs, regs->error_code);
> -}
> -
> static void reserved_bit_page_fault(
> unsigned long addr, struct cpu_user_regs *regs)
> {
> diff --git a/xen/include/asm-x86/traps.h b/xen/include/asm-x86/traps.h
> index 47b7ab9..ebb6378 100644
> --- a/xen/include/asm-x86/traps.h
> +++ b/xen/include/asm-x86/traps.h
> @@ -28,8 +28,6 @@ struct softirq_trap {
>
> struct cpu_user_regs;
>
> -extern void machine_check_vector(const struct cpu_user_regs *regs, long error_code);
> -
> void async_exception_cleanup(struct vcpu *);
>
> /**
>
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2014-06-18 10:19 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2014-06-09 10:56 [PATCH 0/2] x86/traps: Improvements Andrew Cooper
2014-06-09 10:56 ` [PATCH 1/2] x86/traps: const-correctness for IST handlers Andrew Cooper
2014-06-09 10:56 ` [PATCH 2/2] x86/mce: Sanitise the #MC entry path Andrew Cooper
2014-06-18 9:44 ` Andrew Cooper
2014-06-18 10:19 ` Egger, Christoph
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.