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diff for duplicates of <53AC6E78.8000706@arm.com>

diff --git a/a/content_digest b/N1/content_digest
index 1e775d8..8653e37 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -5,7 +5,7 @@
  "ref\020140626185005.GA32514@n2100.arm.linux.org.uk\0"
  "From\0Sudeep Holla <sudeep.holla@arm.com>\0"
  "Subject\0Re: [PATCH 2/9] drivers: base: support cpu cache information interface to userspace via sysfs\0"
- "Date\0Thu, 26 Jun 2014 19:03:20 +0000\0"
+ "Date\0Thu, 26 Jun 2014 20:03:20 +0100\0"
  "To\0Russell King - ARM Linux <linux@arm.linux.org.uk>\0"
  "Cc\0Sudeep Holla <sudeep.holla@arm.com>"
   linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>
@@ -69,4 +69,4 @@
  "Regards,\n"
  Sudeep
 
-5da9f15a0a34e923328b3628592ce675b2a1cd88189c9472c00d7b9e197ee5d6
+ddc8bc1560dd0c59fcb257c62a9d94868eb36a059d7efd04c09400fb8469c873

diff --git a/a/1.txt b/N2/1.txt
index c79f8a8..8ddb704 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -6,7 +6,8 @@ On 26/06/14 19:50, Russell King - ARM Linux wrote:
 >>
 >> On 25/06/14 23:23, Russell King - ARM Linux wrote:
 >>> On Wed, Jun 25, 2014 at 06:30:37PM +0100, Sudeep Holla wrote:
->>>> +		coherency_line_size: the minimum amount of data that gets transferred
+>>>> +=09=09coherency_line_size: the minimum amount of data that gets trans=
+ferred
 >>>
 >>> So, what value to do envision this taking for a CPU where the cache
 >>> line size is 32 bytes, but each cache line has two dirty bits which
@@ -14,8 +15,10 @@ On 26/06/14 19:50, Russell King - ARM Linux wrote:
 >>> on which are dirty?
 >>>
 >>
->> IIUC most of existing implementations of cacheinfo on various architectures
->> are representing the cache line size as coherency_line_size, in which case I
+>> IIUC most of existing implementations of cacheinfo on various architectu=
+res
+>> are representing the cache line size as coherency_line_size, in which ca=
+se I
 >> need fix the definition in this file.
 >
 > As an example, here's an extract from the SA110 TRM:
@@ -33,8 +36,8 @@ On 26/06/14 19:50, Russell King - ARM Linux wrote:
 >
 
 Thanks for the information. It's interesting that line is referred as block
-when referring to 2 dirty bits. I am not sure if this can be mapped to 
-physical_line_partition = 2. Thoughts ?
+when referring to 2 dirty bits. I am not sure if this can be mapped to=20
+physical_line_partition =3D 2. Thoughts ?
 
 >> BTW will there be any architectural way of finding such configuration ?
 >
diff --git a/a/content_digest b/N2/content_digest
index 1e775d8..7552743 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -5,19 +5,19 @@
  "ref\020140626185005.GA32514@n2100.arm.linux.org.uk\0"
  "From\0Sudeep Holla <sudeep.holla@arm.com>\0"
  "Subject\0Re: [PATCH 2/9] drivers: base: support cpu cache information interface to userspace via sysfs\0"
- "Date\0Thu, 26 Jun 2014 19:03:20 +0000\0"
+ "Date\0Thu, 26 Jun 2014 20:03:20 +0100\0"
  "To\0Russell King - ARM Linux <linux@arm.linux.org.uk>\0"
- "Cc\0Sudeep Holla <sudeep.holla@arm.com>"
-  linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>
-  Rob Herring <robh@kernel.org>
-  linux-s390@vger.kernel.org <linux-s390@vger.kernel.org>
+ "Cc\0Rob Herring <robh@kernel.org>"
   Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>
   linux-ia64@vger.kernel.org <linux-ia64@vger.kernel.org>
-  linux-doc@vger.kernel.org <linux-doc@vger.kernel.org>
+  linux-s390@vger.kernel.org <linux-s390@vger.kernel.org>
   Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-  x86@kernel.org <x86@kernel.org>
+  linux-doc@vger.kernel.org <linux-doc@vger.kernel.org>
   Heiko Carstens <heiko.carstens@de.ibm.com>
+  linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>
+  Sudeep Holla <sudeep.holla@arm.com>
   linux390@de.ibm.com <linux390@de.ibm.com>
+  x86@kernel.org <x86@kernel.org>
   linuxppc-dev@lists.ozlabs.org <linuxppc-dev@lists.ozlabs.org>
  " linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>\0"
  "\00:1\0"
@@ -30,7 +30,8 @@
  ">>\n"
  ">> On 25/06/14 23:23, Russell King - ARM Linux wrote:\n"
  ">>> On Wed, Jun 25, 2014 at 06:30:37PM +0100, Sudeep Holla wrote:\n"
- ">>>> +\t\tcoherency_line_size: the minimum amount of data that gets transferred\n"
+ ">>>> +=09=09coherency_line_size: the minimum amount of data that gets trans=\n"
+ "ferred\n"
  ">>>\n"
  ">>> So, what value to do envision this taking for a CPU where the cache\n"
  ">>> line size is 32 bytes, but each cache line has two dirty bits which\n"
@@ -38,8 +39,10 @@
  ">>> on which are dirty?\n"
  ">>>\n"
  ">>\n"
- ">> IIUC most of existing implementations of cacheinfo on various architectures\n"
- ">> are representing the cache line size as coherency_line_size, in which case I\n"
+ ">> IIUC most of existing implementations of cacheinfo on various architectu=\n"
+ "res\n"
+ ">> are representing the cache line size as coherency_line_size, in which ca=\n"
+ "se I\n"
  ">> need fix the definition in this file.\n"
  ">\n"
  "> As an example, here's an extract from the SA110 TRM:\n"
@@ -57,8 +60,8 @@
  ">\n"
  "\n"
  "Thanks for the information. It's interesting that line is referred as block\n"
- "when referring to 2 dirty bits. I am not sure if this can be mapped to \n"
- "physical_line_partition = 2. Thoughts ?\n"
+ "when referring to 2 dirty bits. I am not sure if this can be mapped to=20\n"
+ "physical_line_partition =3D 2. Thoughts ?\n"
  "\n"
  ">> BTW will there be any architectural way of finding such configuration ?\n"
  ">\n"
@@ -69,4 +72,4 @@
  "Regards,\n"
  Sudeep
 
-5da9f15a0a34e923328b3628592ce675b2a1cd88189c9472c00d7b9e197ee5d6
+fab9823a04d3ea5e8b8ba97ad7fe2a4bf0aa7bb3ed79c15de70fa0ba3455d9cc

diff --git a/a/content_digest b/N3/content_digest
index 1e775d8..dfd22a5 100644
--- a/a/content_digest
+++ b/N3/content_digest
@@ -3,23 +3,10 @@
  "ref\020140625222355.GK32514@n2100.arm.linux.org.uk\0"
  "ref\053AC695C.2090406@arm.com\0"
  "ref\020140626185005.GA32514@n2100.arm.linux.org.uk\0"
- "From\0Sudeep Holla <sudeep.holla@arm.com>\0"
- "Subject\0Re: [PATCH 2/9] drivers: base: support cpu cache information interface to userspace via sysfs\0"
- "Date\0Thu, 26 Jun 2014 19:03:20 +0000\0"
- "To\0Russell King - ARM Linux <linux@arm.linux.org.uk>\0"
- "Cc\0Sudeep Holla <sudeep.holla@arm.com>"
-  linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>
-  Rob Herring <robh@kernel.org>
-  linux-s390@vger.kernel.org <linux-s390@vger.kernel.org>
-  Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>
-  linux-ia64@vger.kernel.org <linux-ia64@vger.kernel.org>
-  linux-doc@vger.kernel.org <linux-doc@vger.kernel.org>
-  Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-  x86@kernel.org <x86@kernel.org>
-  Heiko Carstens <heiko.carstens@de.ibm.com>
-  linux390@de.ibm.com <linux390@de.ibm.com>
-  linuxppc-dev@lists.ozlabs.org <linuxppc-dev@lists.ozlabs.org>
- " linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>\0"
+ "From\0sudeep.holla@arm.com (Sudeep Holla)\0"
+ "Subject\0[PATCH 2/9] drivers: base: support cpu cache information interface to userspace via sysfs\0"
+ "Date\0Thu, 26 Jun 2014 20:03:20 +0100\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "\n"
@@ -69,4 +56,4 @@
  "Regards,\n"
  Sudeep
 
-5da9f15a0a34e923328b3628592ce675b2a1cd88189c9472c00d7b9e197ee5d6
+2fd062b3860a2ff711557d3690412eab78fbbaa6bded80c30f2e3421d971f5fb

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