From: nicolas.ferre@atmel.com (Nicolas Ferre)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 1/2] ARM: at91/dt: describe rgmii ethernet phy connected to sama5d3xek boards
Date: Fri, 27 Jun 2014 09:52:56 +0200 [thread overview]
Message-ID: <53AD22D8.2090301@atmel.com> (raw)
In-Reply-To: <53AC7BFD.2070806@free-electrons.com>
On 26/06/2014 22:01, Boris BREZILLON :
> Hi Florian,
>
> On 26/06/2014 20:15, Florian Fainelli wrote:
>> Hi Boris,
>>
>> 2014-06-26 3:13 GMT-07:00 Boris BREZILLON <boris.brezillon@free-electrons.com>:
>>> Add ethernet-phy node and specify phy interrupt (connected to pin PB25).
>>>
>>> The PHY address is not specified here because atmel have 2 different
>>> designs
>>> for its CPU modules: one is connecting PHYAD[0-2] pins to pull up resistors
>>> (Embest design) and the other one is connection PHYAD0 to a pull up
>>> resistor and PHYAD[1-2] to pull down resistors (Ronetix design).
>>> As a result, Ronetix design will have its PHY available at address 0x1 and
>>> Embest design at 0x7.
>>> Let the net PHY core automatically detect the PHY address by scanning the
>>> MDIO bus.
>> I though the compatible string was listed as a required property, but
>> it is not. The 'reg' property however is listed as required, although
>> the of_miodbus_register() works just fine without it, although that is
>> a Linux-specific implementation detail.
>
> Indeed, it's listed in the required property list of the DT binding doc,
> but the code implement auto detection if reg is missing.
> However this line [1] clearly shows that specifying the reg property is
> the preferred way of doing things.
>
> I could define 2 different sama5d3xcm.dtsi (sama5d3xcm-ronetix.dtsi and
> sama5d3xcm-embest.dtsi) to avoid this dirty hack,
> but then we would have 2 more dtb and the user would have to determine
> which CPU module he owns to choose the appropriate dtb.
> If at91, arm-soc and DT maintainers agree with this approach I can
> definitely propose something.
Yes Boris, I definitively prefer not to add another .dtsi file for this
series if we can avoid it.
So, I would push for this "reg-less" solution. If it is chosen, you can
add my:
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Thanks, bye.
>>> Define board specific delays to apply to RGMII signals.
>>>
>>> Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
>> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
>
> Thanks for your review.
>
> Best Regards,
>
> Boris
>
> [1] http://lxr.free-electrons.com/source/drivers/of/of_mdio.c#L187
>
--
Nicolas Ferre
WARNING: multiple messages have this Message-ID (diff)
From: Nicolas Ferre <nicolas.ferre@atmel.com>
To: Boris BREZILLON <boris.brezillon@free-electrons.com>,
Florian Fainelli <f.fainelli@gmail.com>
Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>,
"Alexandre Belloni" <alexandre.belloni@free-electrons.com>,
Andrew Victor <linux@maxim.org.za>,
netdev <netdev@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"David S. Miller" <davem@davemloft.net>,
"Shen, Voice" <Voice.Shen@atmel.com>
Subject: Re: [PATCH v2 1/2] ARM: at91/dt: describe rgmii ethernet phy connected to sama5d3xek boards
Date: Fri, 27 Jun 2014 09:52:56 +0200 [thread overview]
Message-ID: <53AD22D8.2090301@atmel.com> (raw)
In-Reply-To: <53AC7BFD.2070806@free-electrons.com>
On 26/06/2014 22:01, Boris BREZILLON :
> Hi Florian,
>
> On 26/06/2014 20:15, Florian Fainelli wrote:
>> Hi Boris,
>>
>> 2014-06-26 3:13 GMT-07:00 Boris BREZILLON <boris.brezillon@free-electrons.com>:
>>> Add ethernet-phy node and specify phy interrupt (connected to pin PB25).
>>>
>>> The PHY address is not specified here because atmel have 2 different
>>> designs
>>> for its CPU modules: one is connecting PHYAD[0-2] pins to pull up resistors
>>> (Embest design) and the other one is connection PHYAD0 to a pull up
>>> resistor and PHYAD[1-2] to pull down resistors (Ronetix design).
>>> As a result, Ronetix design will have its PHY available at address 0x1 and
>>> Embest design at 0x7.
>>> Let the net PHY core automatically detect the PHY address by scanning the
>>> MDIO bus.
>> I though the compatible string was listed as a required property, but
>> it is not. The 'reg' property however is listed as required, although
>> the of_miodbus_register() works just fine without it, although that is
>> a Linux-specific implementation detail.
>
> Indeed, it's listed in the required property list of the DT binding doc,
> but the code implement auto detection if reg is missing.
> However this line [1] clearly shows that specifying the reg property is
> the preferred way of doing things.
>
> I could define 2 different sama5d3xcm.dtsi (sama5d3xcm-ronetix.dtsi and
> sama5d3xcm-embest.dtsi) to avoid this dirty hack,
> but then we would have 2 more dtb and the user would have to determine
> which CPU module he owns to choose the appropriate dtb.
> If at91, arm-soc and DT maintainers agree with this approach I can
> definitely propose something.
Yes Boris, I definitively prefer not to add another .dtsi file for this
series if we can avoid it.
So, I would push for this "reg-less" solution. If it is chosen, you can
add my:
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Thanks, bye.
>>> Define board specific delays to apply to RGMII signals.
>>>
>>> Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
>> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
>
> Thanks for your review.
>
> Best Regards,
>
> Boris
>
> [1] http://lxr.free-electrons.com/source/drivers/of/of_mdio.c#L187
>
--
Nicolas Ferre
next prev parent reply other threads:[~2014-06-27 7:52 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-26 10:13 [PATCH v2 0/2] ARM: at91: remove phy fixup for sama5d3xek boards Boris BREZILLON
2014-06-26 10:13 ` Boris BREZILLON
2014-06-26 10:13 ` [PATCH v2 1/2] ARM: at91/dt: describe rgmii ethernet phy connected to " Boris BREZILLON
2014-06-26 10:13 ` Boris BREZILLON
2014-06-26 18:15 ` Florian Fainelli
2014-06-26 18:15 ` Florian Fainelli
2014-06-26 20:01 ` Boris BREZILLON
2014-06-26 20:01 ` Boris BREZILLON
2014-06-27 7:52 ` Nicolas Ferre [this message]
2014-06-27 7:52 ` Nicolas Ferre
[not found] ` <20140710110720.03f437eb@bbrezillon>
2014-07-10 15:35 ` Florian Fainelli
2014-07-10 15:35 ` Florian Fainelli
2014-07-10 17:19 ` Boris BREZILLON
2014-07-10 17:19 ` Boris BREZILLON
2014-07-10 17:46 ` Florian Fainelli
2014-07-10 17:46 ` Florian Fainelli
2014-07-10 19:32 ` Boris BREZILLON
2014-07-10 19:32 ` Boris BREZILLON
2014-07-10 19:32 ` Boris BREZILLON
2014-06-26 10:13 ` [PATCH v2 2/2] ARM: at91: remove phy fixup for " Boris BREZILLON
2014-06-26 10:13 ` Boris BREZILLON
2014-07-01 22:38 ` [PATCH v2 0/2] " David Miller
2014-07-01 22:38 ` David Miller
2014-07-02 11:48 ` Boris BREZILLON
2014-07-02 11:48 ` Boris BREZILLON
2014-07-09 16:34 ` Boris BREZILLON
2014-07-09 16:34 ` Boris BREZILLON
2014-07-10 2:24 ` Bo Shen
2014-07-10 2:24 ` Bo Shen
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