All of lore.kernel.org
 help / color / mirror / Atom feed
diff for duplicates of <53B18A87.7040305@wwwdotorg.org>

diff --git a/a/1.txt b/N1/1.txt
index b31bc85..b83921b 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,5 +1,5 @@
 On 06/19/2014 05:37 AM, Thierry Reding wrote:
-> From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
+> From: Thierry Reding <treding@nvidia.com>
 > 
 > The XUSB pad controller found on NVIDIA Tegra SoCs provides several pads
 > that lanes can be assigned to in order to support a variety of interface
diff --git a/a/content_digest b/N1/content_digest
index c7d194a..cdd3958 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,20 +1,13 @@
  "ref\01403177830-28595-1-git-send-email-thierry.reding@gmail.com\0"
  "ref\01403177830-28595-2-git-send-email-thierry.reding@gmail.com\0"
- "ref\01403177830-28595-2-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org\0"
- "From\0Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>\0"
- "Subject\0Re: [PATCH v5 2/4] pinctrl: Add NVIDIA Tegra XUSB pad controller support\0"
+ "From\0swarren@wwwdotorg.org (Stephen Warren)\0"
+ "Subject\0[PATCH v5 2/4] pinctrl: Add NVIDIA Tegra XUSB pad controller support\0"
  "Date\0Mon, 30 Jun 2014 10:04:23 -0600\0"
- "To\0Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\0"
- "Cc\0Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>"
-  Andrew Bresticker <abrestic-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
-  Mikko Perttunen <mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
-  devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
- " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "On 06/19/2014 05:37 AM, Thierry Reding wrote:\n"
- "> From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n"
+ "> From: Thierry Reding <treding@nvidia.com>\n"
  "> \n"
  "> The XUSB pad controller found on NVIDIA Tegra SoCs provides several pads\n"
  "> that lanes can be assigned to in order to support a variety of interface\n"
@@ -30,4 +23,4 @@
  "\n"
  Thanks!
 
-80498efb714dbc7a145c705982a04158d2afffa71cdd678f62198b8589e61b80
+b0ac1be611dbaa49b65b34dff5575255d0069ca876989eacc73fcc43024067b3

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.