From: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
To: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Cc: Thierry Reding
<thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Andrew Bresticker
<abrestic-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
Mikko Perttunen
<mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH v5 2/4] pinctrl: Add NVIDIA Tegra XUSB pad controller support
Date: Mon, 30 Jun 2014 10:04:23 -0600 [thread overview]
Message-ID: <53B18A87.7040305@wwwdotorg.org> (raw)
In-Reply-To: <1403177830-28595-2-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
On 06/19/2014 05:37 AM, Thierry Reding wrote:
> From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>
> The XUSB pad controller found on NVIDIA Tegra SoCs provides several pads
> that lanes can be assigned to in order to support a variety of interface
> options: USB 2.0, USB 3.0, PCIe and SATA.
>
> In addition to the pin controller used to assign lanes to pads two PHYs
> are exposed to allow the bricks for PCIe and SATA to be powered up and
> down by PCIe and SATA drivers.
Linus, does the driver look OK? I'm hoping for an ack from you so that I
can take this series through the Tegra tree to resolve some
dependencies; we have various other drivers that depend on this series.
Thanks!
WARNING: multiple messages have this Message-ID (diff)
From: swarren@wwwdotorg.org (Stephen Warren)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 2/4] pinctrl: Add NVIDIA Tegra XUSB pad controller support
Date: Mon, 30 Jun 2014 10:04:23 -0600 [thread overview]
Message-ID: <53B18A87.7040305@wwwdotorg.org> (raw)
In-Reply-To: <1403177830-28595-2-git-send-email-thierry.reding@gmail.com>
On 06/19/2014 05:37 AM, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> The XUSB pad controller found on NVIDIA Tegra SoCs provides several pads
> that lanes can be assigned to in order to support a variety of interface
> options: USB 2.0, USB 3.0, PCIe and SATA.
>
> In addition to the pin controller used to assign lanes to pads two PHYs
> are exposed to allow the bricks for PCIe and SATA to be powered up and
> down by PCIe and SATA drivers.
Linus, does the driver look OK? I'm hoping for an ack from you so that I
can take this series through the Tegra tree to resolve some
dependencies; we have various other drivers that depend on this series.
Thanks!
next prev parent reply other threads:[~2014-06-30 16:04 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-19 11:37 [PATCH v5 1/4] of: Add NVIDIA Tegra XUSB pad controller binding Thierry Reding
2014-06-19 11:37 ` Thierry Reding
[not found] ` <1403177830-28595-1-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-06-19 11:37 ` [PATCH v5 2/4] pinctrl: Add NVIDIA Tegra XUSB pad controller support Thierry Reding
2014-06-19 11:37 ` Thierry Reding
[not found] ` <1403177830-28595-2-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-06-30 16:04 ` Stephen Warren [this message]
2014-06-30 16:04 ` Stephen Warren
[not found] ` <53B18A87.7040305-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2014-07-07 14:26 ` Linus Walleij
2014-07-07 14:26 ` Linus Walleij
2014-06-19 11:37 ` [PATCH v5 3/4] ARM: tegra: tegra124: Add XUSB pad controller Thierry Reding
2014-06-19 11:37 ` Thierry Reding
[not found] ` <1403177830-28595-3-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-07-11 12:59 ` Thierry Reding
2014-07-11 12:59 ` Thierry Reding
2014-06-19 11:37 ` [PATCH v5 4/4] ARM: tegra: jetson-tk1: " Thierry Reding
2014-06-19 11:37 ` Thierry Reding
2014-07-11 12:58 ` [PATCH v5 1/4] of: Add NVIDIA Tegra XUSB pad controller binding Thierry Reding
2014-07-11 12:58 ` Thierry Reding
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