diff for duplicates of <53B1AE95.3000602@wwwdotorg.org> diff --git a/a/1.txt b/N1/1.txt index 6bbbbc6..9bd618f 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,6 +1,6 @@ On 06/30/2014 11:43 AM, Mark Rutland wrote: > On Sat, Jun 28, 2014 at 02:02:28AM +0100, Thierry Reding wrote: ->> From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +>> From: Thierry Reding <treding@nvidia.com> >> >> The Legacy Interrupt Controller found on NVIDIA Tegra SoCs is used by >> the AVP coprocessor and can also serve as a backup for the ARM Cortex @@ -9,7 +9,7 @@ On 06/30/2014 11:43 AM, Mark Rutland wrote: >> The LIC is subdivided into multiple identical units, each handling 32 >> possible interrupt sources. >> ->> Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +>> Signed-off-by: Thierry Reding <treding@nvidia.com> >> --- >> Changes in v2: >> - new patch diff --git a/a/content_digest b/N1/content_digest index 89d000f..d73c3b0 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,17 +1,14 @@ "ref\01403917351-13215-1-git-send-email-thierry.reding@gmail.com\0" "ref\020140630174334.GF28740@leverpostej\0" - "From\0Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>\0" - "Subject\0Re: [PATCH v2 1/4] of: Add NVIDIA Tegra Legacy Interrupt Controller binding\0" + "From\0swarren@wwwdotorg.org (Stephen Warren)\0" + "Subject\0[PATCH v2 1/4] of: Add NVIDIA Tegra Legacy Interrupt Controller binding\0" "Date\0Mon, 30 Jun 2014 12:38:13 -0600\0" - "To\0Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>" - " Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" - "Cc\0linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>" - " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On 06/30/2014 11:43 AM, Mark Rutland wrote:\n" "> On Sat, Jun 28, 2014 at 02:02:28AM +0100, Thierry Reding wrote:\n" - ">> From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + ">> From: Thierry Reding <treding@nvidia.com>\n" ">>\n" ">> The Legacy Interrupt Controller found on NVIDIA Tegra SoCs is used by\n" ">> the AVP coprocessor and can also serve as a backup for the ARM Cortex\n" @@ -20,7 +17,7 @@ ">> The LIC is subdivided into multiple identical units, each handling 32\n" ">> possible interrupt sources.\n" ">>\n" - ">> Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + ">> Signed-off-by: Thierry Reding <treding@nvidia.com>\n" ">> ---\n" ">> Changes in v2:\n" ">> - new patch\n" @@ -48,4 +45,4 @@ "Do you really want us to edit every single binding every time a new chip\n" comes out? Surely just relying NVIDIA's published chip names is fine? -254dcf6363f8b24f372198c88e29de998f4367c6dd2f40f1a7cfdd29b585892b +dca12facc7612f407ad14f64a7a547c3f0f99290aaeb74c38c11cf12fa3bc1c0
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