From: Kishon Vijay Abraham I <kishon@ti.com>
To: "Antoine Ténart" <antoine.tenart@free-electrons.com>,
sebastian.hesselbarth@gmail.com, tj@kernel.org
Cc: alexandre.belloni@free-electrons.com,
thomas.petazzoni@free-electrons.com, zmxu@marvell.com,
jszhang@marvell.com, linux-arm-kernel@lists.infradead.org,
linux-ide@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v8 1/7] phy: add a driver for the Berlin SATA PHY
Date: Wed, 2 Jul 2014 16:46:37 +0530 [thread overview]
Message-ID: <53B3EA15.4090400@ti.com> (raw)
In-Reply-To: <1404133772-11741-2-git-send-email-antoine.tenart@free-electrons.com>
Hi,
On Monday 30 June 2014 06:39 PM, Antoine Ténart wrote:
> The Berlin SoC has a two SATA ports. Add a PHY driver to handle them.
>
> The mode selection can let us think this PHY can be configured to fit
> other purposes. But there are reasons to think the SATA mode will be
> the only one usable: the PHY registers are only accessible indirectly
> through two registers in the SATA range, the PHY seems to be integrated
> and no information tells us the contrary. For these reasons, make the
> driver a SATA PHY driver.
>
> Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com>
> ---
> drivers/phy/Kconfig | 7 ++
> drivers/phy/Makefile | 1 +
> drivers/phy/phy-berlin-sata.c | 262 ++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 270 insertions(+)
> create mode 100644 drivers/phy/phy-berlin-sata.c
>
> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
> index 16a2f067c242..365ad3651e1c 100644
> --- a/drivers/phy/Kconfig
> +++ b/drivers/phy/Kconfig
> @@ -15,6 +15,13 @@ config GENERIC_PHY
> phy users can obtain reference to the PHY. All the users of this
> framework should select this config.
>
> +config PHY_BERLIN_SATA
> + tristate "Marvell Berlin SATA PHY driver"
> + depends on ARCH_BERLIN && OF
depends on HAS_IOMEM?
> + select GENERIC_PHY
> + help
> + Enable this to support the SATA PHY on Marvell Berlin SoCs.
> +
> config PHY_EXYNOS_MIPI_VIDEO
> tristate "S5P/EXYNOS SoC series MIPI CSI-2/DSI PHY driver"
> depends on HAS_IOMEM
> diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
> index b4f1d5770601..a137a2e23218 100644
> --- a/drivers/phy/Makefile
> +++ b/drivers/phy/Makefile
> @@ -3,6 +3,7 @@
> #
>
> obj-$(CONFIG_GENERIC_PHY) += phy-core.o
> +obj-$(CONFIG_PHY_BERLIN_SATA) += phy-berlin-sata.o
> obj-$(CONFIG_BCM_KONA_USB2_PHY) += phy-bcm-kona-usb2.o
> obj-$(CONFIG_PHY_EXYNOS_DP_VIDEO) += phy-exynos-dp-video.o
> obj-$(CONFIG_PHY_EXYNOS_MIPI_VIDEO) += phy-exynos-mipi-video.o
> diff --git a/drivers/phy/phy-berlin-sata.c b/drivers/phy/phy-berlin-sata.c
> new file mode 100644
> index 000000000000..4446e93e6d82
> --- /dev/null
> +++ b/drivers/phy/phy-berlin-sata.c
> @@ -0,0 +1,262 @@
> +/*
> + * Marvell Berlin SATA PHY driver
> + *
> + * Copyright (C) 2014 Marvell Technology Group Ltd.
> + *
> + * Antoine Ténart <antoine.tenart@free-electrons.com>
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/module.h>
> +#include <linux/phy/phy.h>
> +#include <linux/io.h>
> +#include <linux/platform_device.h>
> +
> +#define HOST_VSA_ADDR 0x0
> +#define HOST_VSA_DATA 0x4
> +#define PORT_SCR_CTL 0x2c
> +#define PORT_VSR_ADDR 0x78
> +#define PORT_VSR_DATA 0x7c
> +
> +#define CONTROL_REGISTER 0x0
> +#define MBUS_SIZE_CONTROL 0x4
> +
> +#define POWER_DOWN_PHY0 BIT(6)
> +#define POWER_DOWN_PHY1 BIT(14)
> +#define MBUS_WRITE_REQUEST_SIZE_128 (BIT(2) << 16)
> +#define MBUS_READ_REQUEST_SIZE_128 (BIT(2) << 19)
> +
> +#define PHY_BASE 0x200
> +
> +/* register 0x01 */
> +#define REF_FREF_SEL_25 BIT(0)
> +#define PHY_MODE_SATA (0x0 << 5)
> +
> +/* register 0x02 */
> +#define USE_MAX_PLL_RATE BIT(12)
> +
> +/* register 0x23 */
> +#define DATA_BIT_WIDTH_10 (0x0 << 10)
> +#define DATA_BIT_WIDTH_20 (0x1 << 10)
> +#define DATA_BIT_WIDTH_40 (0x2 << 10)
> +
> +/* register 0x25 */
> +#define PHY_GEN_MAX_1_5 (0x0 << 10)
> +#define PHY_GEN_MAX_3_0 (0x1 << 10)
> +#define PHY_GEN_MAX_6_0 (0x2 << 10)
> +
> +#define BERLIN_SATA_PHY_NB 2
> +
> +#define to_berlin_sata_phy_priv(desc) \
> + container_of((desc), struct phy_berlin_priv, phys[(desc)->index])
You can get rid of this and use dev_get_drvdata(phy->dev->parent);
> +
> +struct phy_berlin_desc {
> + struct phy *phy;
> + u32 power_bit;
> + unsigned index;
> +};
> +
> +struct phy_berlin_priv {
> + void __iomem *base;
> + spinlock_t lock;
> + struct clk *clk;
> + struct phy_berlin_desc phys[BERLIN_SATA_PHY_NB];
Avoid using fixed array sizes for ports or channels. Refer [1].
[1] -> http://www.spinics.net/lists/linux-sh/msg33350.html
Thanks
Kishon
WARNING: multiple messages have this Message-ID (diff)
From: kishon@ti.com (Kishon Vijay Abraham I)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v8 1/7] phy: add a driver for the Berlin SATA PHY
Date: Wed, 2 Jul 2014 16:46:37 +0530 [thread overview]
Message-ID: <53B3EA15.4090400@ti.com> (raw)
In-Reply-To: <1404133772-11741-2-git-send-email-antoine.tenart@free-electrons.com>
Hi,
On Monday 30 June 2014 06:39 PM, Antoine T?nart wrote:
> The Berlin SoC has a two SATA ports. Add a PHY driver to handle them.
>
> The mode selection can let us think this PHY can be configured to fit
> other purposes. But there are reasons to think the SATA mode will be
> the only one usable: the PHY registers are only accessible indirectly
> through two registers in the SATA range, the PHY seems to be integrated
> and no information tells us the contrary. For these reasons, make the
> driver a SATA PHY driver.
>
> Signed-off-by: Antoine T?nart <antoine.tenart@free-electrons.com>
> ---
> drivers/phy/Kconfig | 7 ++
> drivers/phy/Makefile | 1 +
> drivers/phy/phy-berlin-sata.c | 262 ++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 270 insertions(+)
> create mode 100644 drivers/phy/phy-berlin-sata.c
>
> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
> index 16a2f067c242..365ad3651e1c 100644
> --- a/drivers/phy/Kconfig
> +++ b/drivers/phy/Kconfig
> @@ -15,6 +15,13 @@ config GENERIC_PHY
> phy users can obtain reference to the PHY. All the users of this
> framework should select this config.
>
> +config PHY_BERLIN_SATA
> + tristate "Marvell Berlin SATA PHY driver"
> + depends on ARCH_BERLIN && OF
depends on HAS_IOMEM?
> + select GENERIC_PHY
> + help
> + Enable this to support the SATA PHY on Marvell Berlin SoCs.
> +
> config PHY_EXYNOS_MIPI_VIDEO
> tristate "S5P/EXYNOS SoC series MIPI CSI-2/DSI PHY driver"
> depends on HAS_IOMEM
> diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
> index b4f1d5770601..a137a2e23218 100644
> --- a/drivers/phy/Makefile
> +++ b/drivers/phy/Makefile
> @@ -3,6 +3,7 @@
> #
>
> obj-$(CONFIG_GENERIC_PHY) += phy-core.o
> +obj-$(CONFIG_PHY_BERLIN_SATA) += phy-berlin-sata.o
> obj-$(CONFIG_BCM_KONA_USB2_PHY) += phy-bcm-kona-usb2.o
> obj-$(CONFIG_PHY_EXYNOS_DP_VIDEO) += phy-exynos-dp-video.o
> obj-$(CONFIG_PHY_EXYNOS_MIPI_VIDEO) += phy-exynos-mipi-video.o
> diff --git a/drivers/phy/phy-berlin-sata.c b/drivers/phy/phy-berlin-sata.c
> new file mode 100644
> index 000000000000..4446e93e6d82
> --- /dev/null
> +++ b/drivers/phy/phy-berlin-sata.c
> @@ -0,0 +1,262 @@
> +/*
> + * Marvell Berlin SATA PHY driver
> + *
> + * Copyright (C) 2014 Marvell Technology Group Ltd.
> + *
> + * Antoine T?nart <antoine.tenart@free-electrons.com>
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/module.h>
> +#include <linux/phy/phy.h>
> +#include <linux/io.h>
> +#include <linux/platform_device.h>
> +
> +#define HOST_VSA_ADDR 0x0
> +#define HOST_VSA_DATA 0x4
> +#define PORT_SCR_CTL 0x2c
> +#define PORT_VSR_ADDR 0x78
> +#define PORT_VSR_DATA 0x7c
> +
> +#define CONTROL_REGISTER 0x0
> +#define MBUS_SIZE_CONTROL 0x4
> +
> +#define POWER_DOWN_PHY0 BIT(6)
> +#define POWER_DOWN_PHY1 BIT(14)
> +#define MBUS_WRITE_REQUEST_SIZE_128 (BIT(2) << 16)
> +#define MBUS_READ_REQUEST_SIZE_128 (BIT(2) << 19)
> +
> +#define PHY_BASE 0x200
> +
> +/* register 0x01 */
> +#define REF_FREF_SEL_25 BIT(0)
> +#define PHY_MODE_SATA (0x0 << 5)
> +
> +/* register 0x02 */
> +#define USE_MAX_PLL_RATE BIT(12)
> +
> +/* register 0x23 */
> +#define DATA_BIT_WIDTH_10 (0x0 << 10)
> +#define DATA_BIT_WIDTH_20 (0x1 << 10)
> +#define DATA_BIT_WIDTH_40 (0x2 << 10)
> +
> +/* register 0x25 */
> +#define PHY_GEN_MAX_1_5 (0x0 << 10)
> +#define PHY_GEN_MAX_3_0 (0x1 << 10)
> +#define PHY_GEN_MAX_6_0 (0x2 << 10)
> +
> +#define BERLIN_SATA_PHY_NB 2
> +
> +#define to_berlin_sata_phy_priv(desc) \
> + container_of((desc), struct phy_berlin_priv, phys[(desc)->index])
You can get rid of this and use dev_get_drvdata(phy->dev->parent);
> +
> +struct phy_berlin_desc {
> + struct phy *phy;
> + u32 power_bit;
> + unsigned index;
> +};
> +
> +struct phy_berlin_priv {
> + void __iomem *base;
> + spinlock_t lock;
> + struct clk *clk;
> + struct phy_berlin_desc phys[BERLIN_SATA_PHY_NB];
Avoid using fixed array sizes for ports or channels. Refer [1].
[1] -> http://www.spinics.net/lists/linux-sh/msg33350.html
Thanks
Kishon
WARNING: multiple messages have this Message-ID (diff)
From: Kishon Vijay Abraham I <kishon@ti.com>
To: "Antoine Ténart" <antoine.tenart@free-electrons.com>,
sebastian.hesselbarth@gmail.com, tj@kernel.org
Cc: <alexandre.belloni@free-electrons.com>,
<thomas.petazzoni@free-electrons.com>, <zmxu@marvell.com>,
<jszhang@marvell.com>, <linux-arm-kernel@lists.infradead.org>,
<linux-ide@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v8 1/7] phy: add a driver for the Berlin SATA PHY
Date: Wed, 2 Jul 2014 16:46:37 +0530 [thread overview]
Message-ID: <53B3EA15.4090400@ti.com> (raw)
In-Reply-To: <1404133772-11741-2-git-send-email-antoine.tenart@free-electrons.com>
Hi,
On Monday 30 June 2014 06:39 PM, Antoine Ténart wrote:
> The Berlin SoC has a two SATA ports. Add a PHY driver to handle them.
>
> The mode selection can let us think this PHY can be configured to fit
> other purposes. But there are reasons to think the SATA mode will be
> the only one usable: the PHY registers are only accessible indirectly
> through two registers in the SATA range, the PHY seems to be integrated
> and no information tells us the contrary. For these reasons, make the
> driver a SATA PHY driver.
>
> Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com>
> ---
> drivers/phy/Kconfig | 7 ++
> drivers/phy/Makefile | 1 +
> drivers/phy/phy-berlin-sata.c | 262 ++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 270 insertions(+)
> create mode 100644 drivers/phy/phy-berlin-sata.c
>
> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
> index 16a2f067c242..365ad3651e1c 100644
> --- a/drivers/phy/Kconfig
> +++ b/drivers/phy/Kconfig
> @@ -15,6 +15,13 @@ config GENERIC_PHY
> phy users can obtain reference to the PHY. All the users of this
> framework should select this config.
>
> +config PHY_BERLIN_SATA
> + tristate "Marvell Berlin SATA PHY driver"
> + depends on ARCH_BERLIN && OF
depends on HAS_IOMEM?
> + select GENERIC_PHY
> + help
> + Enable this to support the SATA PHY on Marvell Berlin SoCs.
> +
> config PHY_EXYNOS_MIPI_VIDEO
> tristate "S5P/EXYNOS SoC series MIPI CSI-2/DSI PHY driver"
> depends on HAS_IOMEM
> diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
> index b4f1d5770601..a137a2e23218 100644
> --- a/drivers/phy/Makefile
> +++ b/drivers/phy/Makefile
> @@ -3,6 +3,7 @@
> #
>
> obj-$(CONFIG_GENERIC_PHY) += phy-core.o
> +obj-$(CONFIG_PHY_BERLIN_SATA) += phy-berlin-sata.o
> obj-$(CONFIG_BCM_KONA_USB2_PHY) += phy-bcm-kona-usb2.o
> obj-$(CONFIG_PHY_EXYNOS_DP_VIDEO) += phy-exynos-dp-video.o
> obj-$(CONFIG_PHY_EXYNOS_MIPI_VIDEO) += phy-exynos-mipi-video.o
> diff --git a/drivers/phy/phy-berlin-sata.c b/drivers/phy/phy-berlin-sata.c
> new file mode 100644
> index 000000000000..4446e93e6d82
> --- /dev/null
> +++ b/drivers/phy/phy-berlin-sata.c
> @@ -0,0 +1,262 @@
> +/*
> + * Marvell Berlin SATA PHY driver
> + *
> + * Copyright (C) 2014 Marvell Technology Group Ltd.
> + *
> + * Antoine Ténart <antoine.tenart@free-electrons.com>
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/module.h>
> +#include <linux/phy/phy.h>
> +#include <linux/io.h>
> +#include <linux/platform_device.h>
> +
> +#define HOST_VSA_ADDR 0x0
> +#define HOST_VSA_DATA 0x4
> +#define PORT_SCR_CTL 0x2c
> +#define PORT_VSR_ADDR 0x78
> +#define PORT_VSR_DATA 0x7c
> +
> +#define CONTROL_REGISTER 0x0
> +#define MBUS_SIZE_CONTROL 0x4
> +
> +#define POWER_DOWN_PHY0 BIT(6)
> +#define POWER_DOWN_PHY1 BIT(14)
> +#define MBUS_WRITE_REQUEST_SIZE_128 (BIT(2) << 16)
> +#define MBUS_READ_REQUEST_SIZE_128 (BIT(2) << 19)
> +
> +#define PHY_BASE 0x200
> +
> +/* register 0x01 */
> +#define REF_FREF_SEL_25 BIT(0)
> +#define PHY_MODE_SATA (0x0 << 5)
> +
> +/* register 0x02 */
> +#define USE_MAX_PLL_RATE BIT(12)
> +
> +/* register 0x23 */
> +#define DATA_BIT_WIDTH_10 (0x0 << 10)
> +#define DATA_BIT_WIDTH_20 (0x1 << 10)
> +#define DATA_BIT_WIDTH_40 (0x2 << 10)
> +
> +/* register 0x25 */
> +#define PHY_GEN_MAX_1_5 (0x0 << 10)
> +#define PHY_GEN_MAX_3_0 (0x1 << 10)
> +#define PHY_GEN_MAX_6_0 (0x2 << 10)
> +
> +#define BERLIN_SATA_PHY_NB 2
> +
> +#define to_berlin_sata_phy_priv(desc) \
> + container_of((desc), struct phy_berlin_priv, phys[(desc)->index])
You can get rid of this and use dev_get_drvdata(phy->dev->parent);
> +
> +struct phy_berlin_desc {
> + struct phy *phy;
> + u32 power_bit;
> + unsigned index;
> +};
> +
> +struct phy_berlin_priv {
> + void __iomem *base;
> + spinlock_t lock;
> + struct clk *clk;
> + struct phy_berlin_desc phys[BERLIN_SATA_PHY_NB];
Avoid using fixed array sizes for ports or channels. Refer [1].
[1] -> http://www.spinics.net/lists/linux-sh/msg33350.html
Thanks
Kishon
next prev parent reply other threads:[~2014-07-02 11:17 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-30 13:09 [PATCH v8 0/7] ARM: berlin: add AHCI support Antoine Ténart
2014-06-30 13:09 ` Antoine Ténart
2014-06-30 13:09 ` Antoine Ténart
2014-06-30 13:09 ` [PATCH v8 1/7] phy: add a driver for the Berlin SATA PHY Antoine Ténart
2014-06-30 13:09 ` Antoine Ténart
2014-07-02 11:16 ` Kishon Vijay Abraham I [this message]
2014-07-02 11:16 ` Kishon Vijay Abraham I
2014-07-02 11:16 ` Kishon Vijay Abraham I
2014-06-30 13:09 ` [PATCH v8 2/7] Documentation: bindings: add " Antoine Ténart
2014-06-30 13:09 ` Antoine Ténart
2014-06-30 13:09 ` Antoine Ténart
2014-06-30 13:09 ` [PATCH v8 3/7] ata: libahci: allow to use multiple PHYs Antoine Ténart
2014-06-30 13:09 ` Antoine Ténart
2014-06-30 13:09 ` [PATCH v8 4/7] ata: ahci_platform: add a generic AHCI compatible Antoine Ténart
2014-06-30 13:09 ` Antoine Ténart
2014-06-30 13:09 ` [PATCH v8 5/7] Documentation: bindings: document the sub-nodes AHCI bindings Antoine Ténart
2014-06-30 13:09 ` Antoine Ténart
2014-06-30 13:09 ` [PATCH v8 6/7] ARM: berlin: add the AHCI node for the BG2Q Antoine Ténart
2014-06-30 13:09 ` Antoine Ténart
2014-06-30 13:09 ` [PATCH v8 7/7] ARM: berlin: enable the eSATA interface on the BG2Q DMP Antoine Ténart
2014-06-30 13:09 ` Antoine Ténart
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=53B3EA15.4090400@ti.com \
--to=kishon@ti.com \
--cc=alexandre.belloni@free-electrons.com \
--cc=antoine.tenart@free-electrons.com \
--cc=devicetree@vger.kernel.org \
--cc=jszhang@marvell.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-ide@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=sebastian.hesselbarth@gmail.com \
--cc=thomas.petazzoni@free-electrons.com \
--cc=tj@kernel.org \
--cc=zmxu@marvell.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.