[PATCH v2 0/3] OMAP: dra7: hwmod: Fixes for 3.16

[PATCH v2 0/3] OMAP: dra7: hwmod: Fixes for 3.16

[Roger Quadros]

Hi,

For your convenience I have collected the 3 hwmod patches that were floating around
and added the Reviewed-by and Tested-by tags.

Please queue them for 3.16-rc. Thanks.

Patches are also available in my git tree
git@github.com:rogerq/linux.git		hwmod-v3.16-v2

cheers,
-roger

Roger Quadros (3):
  ARM: DRA7: hwmod: Add OCP2SCP3 module
  ARM: DRA7: hwmod: Fixup SATA hwmod
  ARM: DRA7: hwmod: Add SYSCONFIG for usb_otg_ss

 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 42 +++++++++++++++++++++++++++----
 1 file changed, 37 insertions(+), 5 deletions(-)

-- 
1.8.3.2

[PATCH v2 0/3] OMAP: dra7: hwmod: Fixes for 3.16

[Roger Quadros]

Hi,

For your convenience I have collected the 3 hwmod patches that were floating around
and added the Reviewed-by and Tested-by tags.

Please queue them for 3.16-rc. Thanks.

Patches are also available in my git tree
git@github.com:rogerq/linux.git		hwmod-v3.16-v2

cheers,
-roger

Roger Quadros (3):
  ARM: DRA7: hwmod: Add OCP2SCP3 module
  ARM: DRA7: hwmod: Fixup SATA hwmod
  ARM: DRA7: hwmod: Add SYSCONFIG for usb_otg_ss

 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 42 +++++++++++++++++++++++++++----
 1 file changed, 37 insertions(+), 5 deletions(-)

-- 
1.8.3.2

[PATCH v2 1/3] ARM: DRA7: hwmod: Add OCP2SCP3 module

[Roger Quadros]

This module is needed for the SATA and PCIe PHYs.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Rajendra Nayak <rnayak@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>>
---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 20b4398..c9daee4 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1215,6 +1215,21 @@ static struct omap_hwmod dra7xx_ocp2scp1_hwmod = {
 	},
 };
 
+/* ocp2scp3 */
+static struct omap_hwmod dra7xx_ocp2scp3_hwmod = {
+	.name		= "ocp2scp3",
+	.class		= &dra7xx_ocp2scp_hwmod_class,
+	.clkdm_name	= "l3init_clkdm",
+	.main_clk	= "l4_root_clk_div",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_offs = DRA7XX_CM_L3INIT_OCP2SCP3_CLKCTRL_OFFSET,
+			.context_offs = DRA7XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET,
+			.modulemode   = MODULEMODE_HWCTRL,
+		},
+	},
+};
+
 /*
  * 'qspi' class
  *
@@ -2326,6 +2341,14 @@ static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp1 = {
 	.user		= OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+/* l4_cfg -> ocp2scp3 */
+static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp3 = {
+	.master		= &dra7xx_l4_cfg_hwmod,
+	.slave		= &dra7xx_ocp2scp3_hwmod,
+	.clk		= "l4_root_clk_div",
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 static struct omap_hwmod_addr_space dra7xx_qspi_addrs[] = {
 	{
 		.pa_start	= 0x4b300000,
@@ -2672,6 +2695,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
 	&dra7xx_l4_per1__mmc4,
 	&dra7xx_l4_cfg__mpu,
 	&dra7xx_l4_cfg__ocp2scp1,
+	&dra7xx_l4_cfg__ocp2scp3,
 	&dra7xx_l3_main_1__qspi,
 	&dra7xx_l4_cfg__sata,
 	&dra7xx_l4_cfg__smartreflex_core,
-- 
1.8.3.2

[PATCH v2 1/3] ARM: DRA7: hwmod: Add OCP2SCP3 module

[Roger Quadros]

This module is needed for the SATA and PCIe PHYs.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Rajendra Nayak <rnayak@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>>
---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 20b4398..c9daee4 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1215,6 +1215,21 @@ static struct omap_hwmod dra7xx_ocp2scp1_hwmod = {
 	},
 };
 
+/* ocp2scp3 */
+static struct omap_hwmod dra7xx_ocp2scp3_hwmod = {
+	.name		= "ocp2scp3",
+	.class		= &dra7xx_ocp2scp_hwmod_class,
+	.clkdm_name	= "l3init_clkdm",
+	.main_clk	= "l4_root_clk_div",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_offs = DRA7XX_CM_L3INIT_OCP2SCP3_CLKCTRL_OFFSET,
+			.context_offs = DRA7XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET,
+			.modulemode   = MODULEMODE_HWCTRL,
+		},
+	},
+};
+
 /*
  * 'qspi' class
  *
@@ -2326,6 +2341,14 @@ static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp1 = {
 	.user		= OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+/* l4_cfg -> ocp2scp3 */
+static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp3 = {
+	.master		= &dra7xx_l4_cfg_hwmod,
+	.slave		= &dra7xx_ocp2scp3_hwmod,
+	.clk		= "l4_root_clk_div",
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 static struct omap_hwmod_addr_space dra7xx_qspi_addrs[] = {
 	{
 		.pa_start	= 0x4b300000,
@@ -2672,6 +2695,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
 	&dra7xx_l4_per1__mmc4,
 	&dra7xx_l4_cfg__mpu,
 	&dra7xx_l4_cfg__ocp2scp1,
+	&dra7xx_l4_cfg__ocp2scp3,
 	&dra7xx_l3_main_1__qspi,
 	&dra7xx_l4_cfg__sata,
 	&dra7xx_l4_cfg__smartreflex_core,
-- 
1.8.3.2

Re: [PATCH v2 1/3] ARM: DRA7: hwmod: Add OCP2SCP3 module

[Paul Walmsley]

On Thu, 3 Jul 2014, Roger Quadros wrote:

> This module is needed for the SATA and PCIe PHYs.
> 
> Signed-off-by: Roger Quadros <rogerq@ti.com>
> Reviewed-by: Rajendra Nayak <rnayak@ti.com>
> Tested-by: Sekhar Nori <nsekhar@ti.com>>

This looks like adding support for a new device, so, after 
discussing with Tony, queuing for v3.17.


- Paul

Re: [PATCH v2 1/3] ARM: DRA7: hwmod: Add OCP2SCP3 module

[Roger Quadros]

Hi Paul & Tony,

On 07/03/2014 10:48 PM, Paul Walmsley wrote:
> On Thu, 3 Jul 2014, Roger Quadros wrote:
> 
>> This module is needed for the SATA and PCIe PHYs.
>>
>> Signed-off-by: Roger Quadros <rogerq@ti.com>
>> Reviewed-by: Rajendra Nayak <rnayak@ti.com>
>> Tested-by: Sekhar Nori <nsekhar@ti.com>>
> 
> This looks like adding support for a new device, so, after 
> discussing with Tony, queuing for v3.17.

We should treat it as missing device (bug) rather than new device (feature) as the corresponding device tree node is already present.
Without this patch we get the following message in kernel boot log

[    0.261680] platform 4a090000.ocp2scp: Cannot lookup hwmod 'ocp2scp3'

I would consider this patch as a fix rather than a new feature.

cheers,
-roger

Re: [PATCH v2 1/3] ARM: DRA7: hwmod: Add OCP2SCP3 module

[Roger Quadros]

Hi Paul & Tony,

On 07/03/2014 10:48 PM, Paul Walmsley wrote:
> On Thu, 3 Jul 2014, Roger Quadros wrote:
> 
>> This module is needed for the SATA and PCIe PHYs.
>>
>> Signed-off-by: Roger Quadros <rogerq@ti.com>
>> Reviewed-by: Rajendra Nayak <rnayak@ti.com>
>> Tested-by: Sekhar Nori <nsekhar@ti.com>>
> 
> This looks like adding support for a new device, so, after 
> discussing with Tony, queuing for v3.17.

We should treat it as missing device (bug) rather than new device (feature) as the corresponding device tree node is already present.
Without this patch we get the following message in kernel boot log

[    0.261680] platform 4a090000.ocp2scp: Cannot lookup hwmod 'ocp2scp3'

I would consider this patch as a fix rather than a new feature.

cheers,
-roger

Re: [PATCH v2 1/3] ARM: DRA7: hwmod: Add OCP2SCP3 module

[Paul Walmsley]

Hi

On Fri, 4 Jul 2014, Roger Quadros wrote:

> On 07/03/2014 10:48 PM, Paul Walmsley wrote:
> > On Thu, 3 Jul 2014, Roger Quadros wrote:
> > 
> >> This module is needed for the SATA and PCIe PHYs.
> >>
> >> Signed-off-by: Roger Quadros <rogerq@ti.com>
> >> Reviewed-by: Rajendra Nayak <rnayak@ti.com>
> >> Tested-by: Sekhar Nori <nsekhar@ti.com>>
> > 
> > This looks like adding support for a new device, so, after 
> > discussing with Tony, queuing for v3.17.
> 
> We should treat it as missing device (bug) rather than new device 
> (feature) as the corresponding device tree node is already present.
> Without this patch we get the following message in kernel boot log
> 
> [    0.261680] platform 4a090000.ocp2scp: Cannot lookup hwmod 'ocp2scp3'
> 
> I would consider this patch as a fix rather than a new feature.

Just to make sure I'm correctly applying the rules for sequencing -rc 
patches vs. merge window patches, could you please confirm my 
understanding of the situation:

1. The OCP2SCP3 device (and the devices that rely on it) never worked on 
DRA7xx in earlier kernels

2. Even with this support added, neither SATA nor PCIe will work in 3.16 
on DRA7xx (SATA for unknown reasons, PCIe because the patches are targeted 
for 3.17).

3. The warning doesn't prevent the machine from booting and does not 
impair any previously working functionality

4. There are other DRA7xx warning messages on boot in 3.16-rc: for 
example, http://paste.ubuntu.com/7701601/ lists:

[    0.009931] omap_hwmod: l3_main_2 using broken dt data from ocp

...

[    0.291802] platform 4e000000.dmm: Cannot lookup hwmod 'dmm'


Are these four statements correct?

If so, is there some other reason why we should rush this in for 3.16-rc?  
Put differently: how can we justify adding this device in 3.16-rc rather 
than 3.17 to Linus Torvalds?


- Paul

Re: [PATCH v2 1/3] ARM: DRA7: hwmod: Add OCP2SCP3 module

[Roger Quadros]

Paul,

On 07/06/2014 03:23 AM, Paul Walmsley wrote:
> Hi
> 
> On Fri, 4 Jul 2014, Roger Quadros wrote:
> 
>> On 07/03/2014 10:48 PM, Paul Walmsley wrote:
>>> On Thu, 3 Jul 2014, Roger Quadros wrote:
>>>
>>>> This module is needed for the SATA and PCIe PHYs.
>>>>
>>>> Signed-off-by: Roger Quadros <rogerq@ti.com>
>>>> Reviewed-by: Rajendra Nayak <rnayak@ti.com>
>>>> Tested-by: Sekhar Nori <nsekhar@ti.com>>
>>>
>>> This looks like adding support for a new device, so, after 
>>> discussing with Tony, queuing for v3.17.
>>
>> We should treat it as missing device (bug) rather than new device 
>> (feature) as the corresponding device tree node is already present.
>> Without this patch we get the following message in kernel boot log
>>
>> [    0.261680] platform 4a090000.ocp2scp: Cannot lookup hwmod 'ocp2scp3'
>>
>> I would consider this patch as a fix rather than a new feature.
> 
> Just to make sure I'm correctly applying the rules for sequencing -rc 
> patches vs. merge window patches, could you please confirm my 
> understanding of the situation:
> 
> 1. The OCP2SCP3 device (and the devices that rely on it) never worked on 
> DRA7xx in earlier kernels
> 
> 2. Even with this support added, neither SATA nor PCIe will work in 3.16 
> on DRA7xx (SATA for unknown reasons, PCIe because the patches are targeted 
> for 3.17).

The reason for SATA not working has been identified and the fix is posted here
https://lkml.org/lkml/2014/7/4/166
So this hwmod patch is the only missing piece why SATA won't work on 3.16.

> 
> 3. The warning doesn't prevent the machine from booting and does not 
> impair any previously working functionality
> 
> 4. There are other DRA7xx warning messages on boot in 3.16-rc: for 
> example, http://paste.ubuntu.com/7701601/ lists:
> 
> [    0.009931] omap_hwmod: l3_main_2 using broken dt data from ocp
> 
> ...
> 
> [    0.291802] platform 4e000000.dmm: Cannot lookup hwmod 'dmm'
> 
> 
> Are these four statements correct?

Yes for 1,3 and 4.

> 
> If so, is there some other reason why we should rush this in for 3.16-rc?  
> Put differently: how can we justify adding this device in 3.16-rc rather 
> than 3.17 to Linus Torvalds?

Nothing else that I can think of apart from SATA not working on 3.16.

cheers,
-roger

Re: [PATCH v2 1/3] ARM: DRA7: hwmod: Add OCP2SCP3 module

[Roger Quadros]

Paul,

On 07/06/2014 03:23 AM, Paul Walmsley wrote:
> Hi
> 
> On Fri, 4 Jul 2014, Roger Quadros wrote:
> 
>> On 07/03/2014 10:48 PM, Paul Walmsley wrote:
>>> On Thu, 3 Jul 2014, Roger Quadros wrote:
>>>
>>>> This module is needed for the SATA and PCIe PHYs.
>>>>
>>>> Signed-off-by: Roger Quadros <rogerq@ti.com>
>>>> Reviewed-by: Rajendra Nayak <rnayak@ti.com>
>>>> Tested-by: Sekhar Nori <nsekhar@ti.com>>
>>>
>>> This looks like adding support for a new device, so, after 
>>> discussing with Tony, queuing for v3.17.
>>
>> We should treat it as missing device (bug) rather than new device 
>> (feature) as the corresponding device tree node is already present.
>> Without this patch we get the following message in kernel boot log
>>
>> [    0.261680] platform 4a090000.ocp2scp: Cannot lookup hwmod 'ocp2scp3'
>>
>> I would consider this patch as a fix rather than a new feature.
> 
> Just to make sure I'm correctly applying the rules for sequencing -rc 
> patches vs. merge window patches, could you please confirm my 
> understanding of the situation:
> 
> 1. The OCP2SCP3 device (and the devices that rely on it) never worked on 
> DRA7xx in earlier kernels
> 
> 2. Even with this support added, neither SATA nor PCIe will work in 3.16 
> on DRA7xx (SATA for unknown reasons, PCIe because the patches are targeted 
> for 3.17).

The reason for SATA not working has been identified and the fix is posted here
https://lkml.org/lkml/2014/7/4/166
So this hwmod patch is the only missing piece why SATA won't work on 3.16.

> 
> 3. The warning doesn't prevent the machine from booting and does not 
> impair any previously working functionality
> 
> 4. There are other DRA7xx warning messages on boot in 3.16-rc: for 
> example, http://paste.ubuntu.com/7701601/ lists:
> 
> [    0.009931] omap_hwmod: l3_main_2 using broken dt data from ocp
> 
> ...
> 
> [    0.291802] platform 4e000000.dmm: Cannot lookup hwmod 'dmm'
> 
> 
> Are these four statements correct?

Yes for 1,3 and 4.

> 
> If so, is there some other reason why we should rush this in for 3.16-rc?  
> Put differently: how can we justify adding this device in 3.16-rc rather 
> than 3.17 to Linus Torvalds?

Nothing else that I can think of apart from SATA not working on 3.16.

cheers,
-roger

[PATCH v2 2/3] ARM: DRA7: hwmod: Fixup SATA hwmod

[Roger Quadros]

Get rid of optional clock as that is now managed by the
AHCI platform driver.

Correct .mpu_rt_idx to 1 as the module register space (SYSCONFIG..)
is passed as the second memory resource in the device tree.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Rajendra Nayak <rnayak@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index c9daee4..5ea094a 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1283,9 +1283,6 @@ static struct omap_hwmod_class dra7xx_sata_hwmod_class = {
 };
 
 /* sata */
-static struct omap_hwmod_opt_clk sata_opt_clks[] = {
-	{ .role = "ref_clk", .clk = "sata_ref_clk" },
-};
 
 static struct omap_hwmod dra7xx_sata_hwmod = {
 	.name		= "sata",
@@ -1293,6 +1290,7 @@ static struct omap_hwmod dra7xx_sata_hwmod = {
 	.clkdm_name	= "l3init_clkdm",
 	.flags		= HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
 	.main_clk	= "func_48m_fclk",
+	.mpu_rt_idx	= 1,
 	.prcm = {
 		.omap4 = {
 			.clkctrl_offs = DRA7XX_CM_L3INIT_SATA_CLKCTRL_OFFSET,
@@ -1300,8 +1298,6 @@ static struct omap_hwmod dra7xx_sata_hwmod = {
 			.modulemode   = MODULEMODE_SWCTRL,
 		},
 	},
-	.opt_clks	= sata_opt_clks,
-	.opt_clks_cnt	= ARRAY_SIZE(sata_opt_clks),
 };
 
 /*
-- 
1.8.3.2

[PATCH v2 2/3] ARM: DRA7: hwmod: Fixup SATA hwmod

[Roger Quadros]

Get rid of optional clock as that is now managed by the
AHCI platform driver.

Correct .mpu_rt_idx to 1 as the module register space (SYSCONFIG..)
is passed as the second memory resource in the device tree.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Rajendra Nayak <rnayak@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index c9daee4..5ea094a 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1283,9 +1283,6 @@ static struct omap_hwmod_class dra7xx_sata_hwmod_class = {
 };
 
 /* sata */
-static struct omap_hwmod_opt_clk sata_opt_clks[] = {
-	{ .role = "ref_clk", .clk = "sata_ref_clk" },
-};
 
 static struct omap_hwmod dra7xx_sata_hwmod = {
 	.name		= "sata",
@@ -1293,6 +1290,7 @@ static struct omap_hwmod dra7xx_sata_hwmod = {
 	.clkdm_name	= "l3init_clkdm",
 	.flags		= HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
 	.main_clk	= "func_48m_fclk",
+	.mpu_rt_idx	= 1,
 	.prcm = {
 		.omap4 = {
 			.clkctrl_offs = DRA7XX_CM_L3INIT_SATA_CLKCTRL_OFFSET,
@@ -1300,8 +1298,6 @@ static struct omap_hwmod dra7xx_sata_hwmod = {
 			.modulemode   = MODULEMODE_SWCTRL,
 		},
 	},
-	.opt_clks	= sata_opt_clks,
-	.opt_clks_cnt	= ARRAY_SIZE(sata_opt_clks),
 };
 
 /*
-- 
1.8.3.2

Re: [PATCH v2 2/3] ARM: DRA7: hwmod: Fixup SATA hwmod

[Paul Walmsley]

On Thu, 3 Jul 2014, Roger Quadros wrote:

> Get rid of optional clock as that is now managed by the
> AHCI platform driver.
> 
> Correct .mpu_rt_idx to 1 as the module register space (SYSCONFIG..)
> is passed as the second memory resource in the device tree.
> 
> Signed-off-by: Roger Quadros <rogerq@ti.com>
> Reviewed-by: Rajendra Nayak <rnayak@ti.com>
> Tested-by: Sekhar Nori <nsekhar@ti.com>

Thanks, this looks like a fix, so, queueing for v3.16-rc.


- Paul

[PATCH v2 3/3] ARM: DRA7: hwmod: Add SYSCONFIG for usb_otg_ss

[Roger Quadros]

Add the sysconfig class bits for the Super Speed USB
controllers

Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Rajendra Nayak <rnayak@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 5ea094a..c87d10e 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1742,8 +1742,20 @@ static struct omap_hwmod dra7xx_uart6_hwmod = {
  *
  */
 
+static struct omap_hwmod_class_sysconfig dra7xx_usb_otg_ss_sysc = {
+	.rev_offs	= 0x0000,
+	.sysc_offs	= 0x0010,
+	.sysc_flags	= (SYSC_HAS_DMADISABLE | SYSC_HAS_MIDLEMODE |
+			   SYSC_HAS_SIDLEMODE),
+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+			   SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
+			   MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
+	.sysc_fields	= &omap_hwmod_sysc_type2,
+};
+
 static struct omap_hwmod_class dra7xx_usb_otg_ss_hwmod_class = {
 	.name	= "usb_otg_ss",
+	.sysc	= &dra7xx_usb_otg_ss_sysc,
 };
 
 /* usb_otg_ss1 */
-- 
1.8.3.2

[PATCH v2 3/3] ARM: DRA7: hwmod: Add SYSCONFIG for usb_otg_ss

[Roger Quadros]

Add the sysconfig class bits for the Super Speed USB
controllers

Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Rajendra Nayak <rnayak@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 5ea094a..c87d10e 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1742,8 +1742,20 @@ static struct omap_hwmod dra7xx_uart6_hwmod = {
  *
  */
 
+static struct omap_hwmod_class_sysconfig dra7xx_usb_otg_ss_sysc = {
+	.rev_offs	= 0x0000,
+	.sysc_offs	= 0x0010,
+	.sysc_flags	= (SYSC_HAS_DMADISABLE | SYSC_HAS_MIDLEMODE |
+			   SYSC_HAS_SIDLEMODE),
+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+			   SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
+			   MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
+	.sysc_fields	= &omap_hwmod_sysc_type2,
+};
+
 static struct omap_hwmod_class dra7xx_usb_otg_ss_hwmod_class = {
 	.name	= "usb_otg_ss",
+	.sysc	= &dra7xx_usb_otg_ss_sysc,
 };
 
 /* usb_otg_ss1 */
-- 
1.8.3.2

Re: [PATCH v2 3/3] ARM: DRA7: hwmod: Add SYSCONFIG for usb_otg_ss

[Paul Walmsley]

On Thu, 3 Jul 2014, Roger Quadros wrote:

> Add the sysconfig class bits for the Super Speed USB
> controllers
> 
> Signed-off-by: Roger Quadros <rogerq@ti.com>
> Reviewed-by: Rajendra Nayak <rnayak@ti.com>
> Tested-by: Sekhar Nori <nsekhar@ti.com>

Thanks, this looks like a fix, so, queueing for v3.16-rc.


- Paul