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From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
To: "Kishon Vijay Abraham I" <kishon@ti.com>,
	"Antoine Ténart" <antoine.tenart@free-electrons.com>,
	tj@kernel.org
Cc: alexandre.belloni@free-electrons.com,
	thomas.petazzoni@free-electrons.com, zmxu@marvell.com,
	jszhang@marvell.com, linux-arm-kernel@lists.infradead.org,
	linux-ide@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v9 1/7] phy: add a driver for the Berlin SATA PHY
Date: Tue, 08 Jul 2014 15:00:52 +0200	[thread overview]
Message-ID: <53BBEB84.50904@gmail.com> (raw)
In-Reply-To: <53BBE419.8080107@ti.com>

On 07/08/2014 02:29 PM, Kishon Vijay Abraham I wrote:
> On Monday 07 July 2014 03:46 PM, Antoine Ténart wrote:
>> The Berlin SoC has a two SATA ports. Add a PHY driver to handle them.
>>
>> The mode selection can let us think this PHY can be configured to fit
>> other purposes. But there are reasons to think the SATA mode will be
>> the only one usable: the PHY registers are only accessible indirectly
>> through two registers in the SATA range, the PHY seems to be integrated
>> and no information tells us the contrary. For these reasons, make the
>> driver a SATA PHY driver.
>
> Thanks for doing multiple revisions of this. Looks good to be merged for me now.

I'd like to see some Acked-by from Tejun on the AHCI patches first, but
if he agrees, should I prepare a stable branch for each of us to pull
their patches from?

AFAIKS, that would be 1+2 for you, 3-5 for Tejun, and the DT crap 6+7
for me.

Sebastian

WARNING: multiple messages have this Message-ID (diff)
From: sebastian.hesselbarth@gmail.com (Sebastian Hesselbarth)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v9 1/7] phy: add a driver for the Berlin SATA PHY
Date: Tue, 08 Jul 2014 15:00:52 +0200	[thread overview]
Message-ID: <53BBEB84.50904@gmail.com> (raw)
In-Reply-To: <53BBE419.8080107@ti.com>

On 07/08/2014 02:29 PM, Kishon Vijay Abraham I wrote:
> On Monday 07 July 2014 03:46 PM, Antoine T?nart wrote:
>> The Berlin SoC has a two SATA ports. Add a PHY driver to handle them.
>>
>> The mode selection can let us think this PHY can be configured to fit
>> other purposes. But there are reasons to think the SATA mode will be
>> the only one usable: the PHY registers are only accessible indirectly
>> through two registers in the SATA range, the PHY seems to be integrated
>> and no information tells us the contrary. For these reasons, make the
>> driver a SATA PHY driver.
>
> Thanks for doing multiple revisions of this. Looks good to be merged for me now.

I'd like to see some Acked-by from Tejun on the AHCI patches first, but
if he agrees, should I prepare a stable branch for each of us to pull
their patches from?

AFAIKS, that would be 1+2 for you, 3-5 for Tejun, and the DT crap 6+7
for me.

Sebastian

WARNING: multiple messages have this Message-ID (diff)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
To: "Kishon Vijay Abraham I" <kishon@ti.com>,
	"Antoine Ténart" <antoine.tenart@free-electrons.com>,
	tj@kernel.org
Cc: alexandre.belloni@free-electrons.com,
	thomas.petazzoni@free-electrons.com, zmxu@marvell.com,
	jszhang@marvell.com, linux-arm-kernel@lists.infradead.org,
	linux-ide@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v9 1/7] phy: add a driver for the Berlin SATA PHY
Date: Tue, 08 Jul 2014 15:00:52 +0200	[thread overview]
Message-ID: <53BBEB84.50904@gmail.com> (raw)
In-Reply-To: <53BBE419.8080107@ti.com>

On 07/08/2014 02:29 PM, Kishon Vijay Abraham I wrote:
> On Monday 07 July 2014 03:46 PM, Antoine Ténart wrote:
>> The Berlin SoC has a two SATA ports. Add a PHY driver to handle them.
>>
>> The mode selection can let us think this PHY can be configured to fit
>> other purposes. But there are reasons to think the SATA mode will be
>> the only one usable: the PHY registers are only accessible indirectly
>> through two registers in the SATA range, the PHY seems to be integrated
>> and no information tells us the contrary. For these reasons, make the
>> driver a SATA PHY driver.
>
> Thanks for doing multiple revisions of this. Looks good to be merged for me now.

I'd like to see some Acked-by from Tejun on the AHCI patches first, but
if he agrees, should I prepare a stable branch for each of us to pull
their patches from?

AFAIKS, that would be 1+2 for you, 3-5 for Tejun, and the DT crap 6+7
for me.

Sebastian


  parent reply	other threads:[~2014-07-08 13:00 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-07-07 10:16 [PATCH v9 0/7] ARM: berlin: add AHCI support Antoine Ténart
2014-07-07 10:16 ` Antoine Ténart
2014-07-07 10:16 ` [PATCH v9 1/7] phy: add a driver for the Berlin SATA PHY Antoine Ténart
2014-07-07 10:16   ` Antoine Ténart
     [not found]   ` <1404728173-20263-2-git-send-email-antoine.tenart-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-07-08 12:29     ` Kishon Vijay Abraham I
2014-07-08 12:29       ` Kishon Vijay Abraham I
2014-07-08 12:29       ` Kishon Vijay Abraham I
2014-07-08 12:36       ` Antoine Ténart
2014-07-08 12:36         ` Antoine Ténart
2014-07-08 13:00       ` Sebastian Hesselbarth [this message]
2014-07-08 13:00         ` Sebastian Hesselbarth
2014-07-08 13:00         ` Sebastian Hesselbarth
2014-07-08 13:13         ` Kishon Vijay Abraham I
2014-07-08 13:13           ` Kishon Vijay Abraham I
2014-07-08 13:13           ` Kishon Vijay Abraham I
2014-07-07 10:16 ` [PATCH v9 2/7] Documentation: bindings: add " Antoine Ténart
2014-07-07 10:16   ` Antoine Ténart
2014-07-07 10:16   ` Antoine Ténart
2014-07-07 10:16 ` [PATCH v9 3/7] ata: libahci: allow to use multiple PHYs Antoine Ténart
2014-07-07 10:16   ` Antoine Ténart
2014-07-08 13:40   ` Tejun Heo
2014-07-08 13:40     ` Tejun Heo
     [not found]     ` <20140708134000.GC4979-Gd/HAXX7CRxy/B6EtB590w@public.gmane.org>
2014-07-08 17:03       ` Antoine Ténart
2014-07-08 17:03         ` Antoine Ténart
2014-07-08 17:03         ` Antoine Ténart
2014-07-08 17:18         ` Tejun Heo
2014-07-08 17:18           ` Tejun Heo
2014-07-08 17:18           ` Tejun Heo
2014-07-08 17:49           ` Antoine Ténart
2014-07-08 17:49             ` Antoine Ténart
2014-07-08 21:40             ` Tejun Heo
2014-07-08 21:40               ` Tejun Heo
2014-07-09  8:23               ` Antoine Ténart
2014-07-09  8:23                 ` Antoine Ténart
2014-07-09 13:59                 ` Tejun Heo
2014-07-09 13:59                   ` Tejun Heo
2014-07-09 14:02                   ` Hans de Goede
2014-07-09 14:02                     ` Hans de Goede
2014-07-09 15:24                   ` Alexandre Belloni
2014-07-09 15:24                     ` Alexandre Belloni
2014-07-09 15:42                     ` Tejun Heo
2014-07-09 15:42                       ` Tejun Heo
2014-07-09  7:22     ` Hans de Goede
2014-07-09  7:22       ` Hans de Goede
2014-07-08 13:42   ` Tejun Heo
2014-07-08 13:42     ` Tejun Heo
2014-07-08 17:05     ` Antoine Ténart
2014-07-08 17:05       ` Antoine Ténart
2014-07-07 10:16 ` [PATCH v9 4/7] ata: ahci_platform: add a generic AHCI compatible Antoine Ténart
2014-07-07 10:16   ` Antoine Ténart
2014-07-07 10:16   ` Antoine Ténart
2014-07-07 10:16 ` [PATCH v9 5/7] Documentation: bindings: document the sub-nodes AHCI bindings Antoine Ténart
2014-07-07 10:16   ` Antoine Ténart
2014-07-07 10:16 ` [PATCH v9 6/7] ARM: berlin: add the AHCI node for the BG2Q Antoine Ténart
2014-07-07 10:16   ` Antoine Ténart
2014-07-07 10:16 ` [PATCH v9 7/7] ARM: berlin: enable the eSATA interface on the BG2Q DMP Antoine Ténart
2014-07-07 10:16   ` Antoine Ténart

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