From: Corentin LABBE <clabbe.montjoie@gmail.com>
To: Herbert Xu <herbert@gondor.apana.org.au>
Cc: robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com,
ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
rdunlap@infradead.org, maxime.ripard@free-electrons.com,
linux@arm.linux.org.uk, davem@davemloft.net,
grant.likely@linaro.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org
Subject: Re: [PATCH v4 3/3] crypto: Add Allwinner Security System crypto accelerator
Date: Thu, 24 Jul 2014 13:04:55 +0200 [thread overview]
Message-ID: <53D0E857.8000405@gmail.com> (raw)
In-Reply-To: <20140724060054.GA6545@gondor.apana.org.au>
Le 24/07/2014 08:00, Herbert Xu a écrit :
> On Sat, Jul 12, 2014 at 02:59:13PM +0200, LABBE Corentin wrote:
>>
>> +/* sunxi_hash_init: initialize request context
>> + * Activate the SS, and configure it for MD5 or SHA1
>> + */
>> +int sunxi_hash_init(struct ahash_request *areq)
>> +{
>> + const char *hash_type;
>> + struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
>> + struct sunxi_req_ctx *op = crypto_ahash_ctx(tfm);
>> +
>> + mutex_lock(&ss->lock);
>> +
>> + hash_type = crypto_tfm_alg_name(areq->base.tfm);
>> +
>> + op->byte_count = 0;
>> + op->nbwait = 0;
>> + op->waitbuf = 0;
>> +
>> + /* Enable and configure SS for MD5 or SHA1 */
>> + if (strcmp(hash_type, "sha1") == 0)
>> + op->mode = SS_OP_SHA1;
>> + else
>> + op->mode = SS_OP_MD5;
>> +
>> + writel(op->mode | SS_ENABLED, ss->base + SS_CTL);
>> + return 0;
>
> The hash driver is completely broken. You are modifying tfm
> ctx data which is shared by all users of a single tfm. So
> if two users conduct hashes in parallel they will step all
> over each other.
So where can I store data for each request ?
>
> Worse, the unpaired mutex_lock will quickly lead to dead locks.
>
> You cannot assume that final will be called.
An user reported an equivalent problem when using openssl speed test with cryptodev.
Does cryptoqueue is a good answer to that problem since the device could handle only one transformation at a time ?
And perhaps with cryptoqueue, my first question is useless.
WARNING: multiple messages have this Message-ID (diff)
From: clabbe.montjoie@gmail.com (Corentin LABBE)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 3/3] crypto: Add Allwinner Security System crypto accelerator
Date: Thu, 24 Jul 2014 13:04:55 +0200 [thread overview]
Message-ID: <53D0E857.8000405@gmail.com> (raw)
In-Reply-To: <20140724060054.GA6545@gondor.apana.org.au>
Le 24/07/2014 08:00, Herbert Xu a ?crit :
> On Sat, Jul 12, 2014 at 02:59:13PM +0200, LABBE Corentin wrote:
>>
>> +/* sunxi_hash_init: initialize request context
>> + * Activate the SS, and configure it for MD5 or SHA1
>> + */
>> +int sunxi_hash_init(struct ahash_request *areq)
>> +{
>> + const char *hash_type;
>> + struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
>> + struct sunxi_req_ctx *op = crypto_ahash_ctx(tfm);
>> +
>> + mutex_lock(&ss->lock);
>> +
>> + hash_type = crypto_tfm_alg_name(areq->base.tfm);
>> +
>> + op->byte_count = 0;
>> + op->nbwait = 0;
>> + op->waitbuf = 0;
>> +
>> + /* Enable and configure SS for MD5 or SHA1 */
>> + if (strcmp(hash_type, "sha1") == 0)
>> + op->mode = SS_OP_SHA1;
>> + else
>> + op->mode = SS_OP_MD5;
>> +
>> + writel(op->mode | SS_ENABLED, ss->base + SS_CTL);
>> + return 0;
>
> The hash driver is completely broken. You are modifying tfm
> ctx data which is shared by all users of a single tfm. So
> if two users conduct hashes in parallel they will step all
> over each other.
So where can I store data for each request ?
>
> Worse, the unpaired mutex_lock will quickly lead to dead locks.
>
> You cannot assume that final will be called.
An user reported an equivalent problem when using openssl speed test with cryptodev.
Does cryptoqueue is a good answer to that problem since the device could handle only one transformation at a time ?
And perhaps with cryptoqueue, my first question is useless.
next prev parent reply other threads:[~2014-07-24 11:05 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-12 12:59 [PATCH v4] crypto: Add Allwinner Security System crypto accelerator LABBE Corentin
2014-07-12 12:59 ` LABBE Corentin
2014-07-12 12:59 ` [PATCH v4 1/3] ARM: sun7i: dt: Add Security System to A20 SoC DTS LABBE Corentin
2014-07-12 12:59 ` LABBE Corentin
[not found] ` <1405169953-13695-1-git-send-email-clabbe.montjoie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-07-12 12:59 ` [PATCH v4 2/3] ARM: sunxi: dt: Add DT bindings documentation for SUNXI Security System LABBE Corentin
2014-07-12 12:59 ` LABBE Corentin
2014-07-12 12:59 ` LABBE Corentin
2014-07-25 10:10 ` Maxime Ripard
2014-07-25 10:10 ` Maxime Ripard
2014-07-12 12:59 ` [PATCH v4 3/3] crypto: Add Allwinner Security System crypto accelerator LABBE Corentin
2014-07-12 12:59 ` LABBE Corentin
2014-07-23 13:16 ` Herbert Xu
2014-07-23 13:16 ` Herbert Xu
[not found] ` <20140723131620.GC29178-lOAM2aK0SrRLBo1qDEOMRrpzq4S04n8Q@public.gmane.org>
2014-07-23 13:48 ` Maxime Ripard
2014-07-23 13:48 ` Maxime Ripard
2014-07-23 13:48 ` Maxime Ripard
2014-07-23 13:54 ` Herbert Xu
2014-07-23 13:54 ` Herbert Xu
2014-07-23 13:54 ` Herbert Xu
2014-07-24 6:00 ` Herbert Xu
2014-07-24 6:00 ` Herbert Xu
2014-07-24 11:04 ` Corentin LABBE [this message]
2014-07-24 11:04 ` Corentin LABBE
2014-07-24 13:38 ` Herbert Xu
2014-07-24 13:38 ` Herbert Xu
[not found] ` <20140724133823.GA9638-lOAM2aK0SrRLBo1qDEOMRrpzq4S04n8Q@public.gmane.org>
2014-07-26 14:01 ` Corentin LABBE
2014-07-26 14:01 ` Corentin LABBE
2014-07-26 14:01 ` Corentin LABBE
[not found] ` <53D3B4B6.3000100-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-07-27 14:52 ` Herbert Xu
2014-07-27 14:52 ` Herbert Xu
2014-07-27 14:52 ` Herbert Xu
2014-07-25 11:36 ` Maxime Ripard
2014-07-25 11:36 ` Maxime Ripard
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