Re: [PATCH v3 1/2] rcar_can: document device tree bindings

[Marc Kleine-Budde <mkl@pengutronix.de>]

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On 07/31/2014 11:24 PM, Sergei Shtylyov wrote:
> Document the R-Car CAN device tree bindings.
> 
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

The series looks good from the CAN perpective. I'll apply the patches
after we've got an Acked-by from the DT folks.

Marc

> 
> ---
> The patch is against the 'linux-can-next.git' repo.
> 
> Changes in version 2:
> - new patch, split from the driver's device tree support patch;
> - adjusted "clocks" property to refer to 3 clocks instead of 1;
> - added mandatory "clock-names" property;
> - renamed the "clock-select" property to "renesas,can-clock-select".
> 
>  Documentation/devicetree/bindings/net/can/rcar_can.txt |   43 +++++++++++++++++
>  1 file changed, 43 insertions(+)
> 
> Index: linux-can-next/Documentation/devicetree/bindings/net/can/rcar_can.txt
> ===================================================================
> --- /dev/null
> +++ linux-can-next/Documentation/devicetree/bindings/net/can/rcar_can.txt
> @@ -0,0 +1,43 @@
> +Renesas R-Car CAN controller Device Tree Bindings
> +-------------------------------------------------
> +
> +Required properties:
> +- compatible: "renesas,can-r8a7778" if CAN controller is a part of R8A7778 SoC.
> +	      "renesas,can-r8a7779" if CAN controller is a part of R8A7779 SoC.
> +	      "renesas,can-r8a7790" if CAN controller is a part of R8A7790 SoC.
> +	      "renesas,can-r8a7791" if CAN controller is a part of R8A7791 SoC.
> +- reg: physical base address and size of the R-Car CAN register map.
> +- interrupts: interrupt specifier for the sole interrupt.
> +- clocks: phandles and clock specifiers for 3 CAN clock inputs.
> +- clock-names: 3 clock input name strings: "clkp1", "clkp2", "can_clk".
> +- pinctrl-0: pin control group to be used for this controller.
> +- pinctrl-names: must be "default".
> +
> +Optional properties:
> +- renesas,can-clock-select: R-Car CAN Clock Source Select. Valid values are:
> +			    <0x0> (default) : Peripheral clock (clkp1)
> +			    <0x1> : Peripheral clock (clkp2)
> +			    <0x3> : Externally input clock
> +
> +Example
> +-------
> +
> +SoC common .dtsi file:
> +
> +	can0: can@e6e80000 {
> +		compatible = "renesas,can-r8a7791";
> +		reg = <0 0xe6e80000 0 0x1000>;
> +		interrupts = <0 186 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&mstp9_clks R8A7791_CLK_RCAN0>,
> +		       	 <&cpg_clocks R8A7791_CLK_RCAN>, <&can_clk>;
> +		clock-names = "clkp1", "clkp2", "can_clk";
> +		status = "disabled";
> +	};
> +
> +Board specific .dts file:
> +
> +&can0 {
> +	pinctrl-0 = <&can0_pins>;
> +	pinctrl-names = "default";
> +	status = "okay";
> +};
> 


-- 
Pengutronix e.K.                  | Marc Kleine-Budde           |
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