From: Murali Karicheri <m-karicheri2@ti.com>
To: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Cc: <linux-pci@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <bhelgaas@google.com>
Subject: Re: [PATCH] PCI: keystone: add a pci quirk to limit mrrs
Date: Wed, 6 Aug 2014 15:05:31 -0400 [thread overview]
Message-ID: <53E27C7B.80200@ti.com> (raw)
In-Reply-To: <20140806173014.GD19914@obsidianresearch.com>
On 08/06/2014 01:30 PM, Jason Gunthorpe wrote:
> On Wed, Aug 06, 2014 at 01:09:41PM -0400, Murali Karicheri wrote:
>
>>>> Yes it works with tuning enabled. Tuning happens afterwards. The
>>>> 'limiting mrrs to 256' below is from my patch.
>>>
>>> That seems backwards to me...
>> Rational? The tuning is reading mrrs and set mps to less than or
>> equal to mrss. So adding this before make sure mrrs used is below
>> keystones's limit.
>
> The tuning process adjusts the parameters however it sees fit, todays
> algorithm might not increase a BIOS set MRRS, but tomorrow's could.
>
> The quirk should be after the tuning to ensure the MRRS is limited..
>
> Jason
Ok. I see it.
The latest possible quirk application point seems to be before enabling
the ep device. A change in macro as below will achieve this and it works.
-DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, quirk_limit_mrrs);
+DECLARE_PCI_FIXUP_ENABLE(PCI_ANY_ID, PCI_ANY_ID, quirk_limit_mrrs);
If this looks reasonable, I will repost my patch with this change.
regards,
Murali
WARNING: multiple messages have this Message-ID (diff)
From: m-karicheri2@ti.com (Murali Karicheri)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] PCI: keystone: add a pci quirk to limit mrrs
Date: Wed, 6 Aug 2014 15:05:31 -0400 [thread overview]
Message-ID: <53E27C7B.80200@ti.com> (raw)
In-Reply-To: <20140806173014.GD19914@obsidianresearch.com>
On 08/06/2014 01:30 PM, Jason Gunthorpe wrote:
> On Wed, Aug 06, 2014 at 01:09:41PM -0400, Murali Karicheri wrote:
>
>>>> Yes it works with tuning enabled. Tuning happens afterwards. The
>>>> 'limiting mrrs to 256' below is from my patch.
>>>
>>> That seems backwards to me...
>> Rational? The tuning is reading mrrs and set mps to less than or
>> equal to mrss. So adding this before make sure mrrs used is below
>> keystones's limit.
>
> The tuning process adjusts the parameters however it sees fit, todays
> algorithm might not increase a BIOS set MRRS, but tomorrow's could.
>
> The quirk should be after the tuning to ensure the MRRS is limited..
>
> Jason
Ok. I see it.
The latest possible quirk application point seems to be before enabling
the ep device. A change in macro as below will achieve this and it works.
-DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, quirk_limit_mrrs);
+DECLARE_PCI_FIXUP_ENABLE(PCI_ANY_ID, PCI_ANY_ID, quirk_limit_mrrs);
If this looks reasonable, I will repost my patch with this change.
regards,
Murali
next prev parent reply other threads:[~2014-08-06 19:05 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-06 15:18 [PATCH] PCI: keystone: add a pci quirk to limit mrrs Murali Karicheri
2014-08-06 15:18 ` Murali Karicheri
2014-08-06 16:30 ` Jason Gunthorpe
2014-08-06 16:30 ` Jason Gunthorpe
2014-08-06 16:56 ` Murali Karicheri
2014-08-06 16:56 ` Murali Karicheri
2014-08-06 16:58 ` Jason Gunthorpe
2014-08-06 16:58 ` Jason Gunthorpe
2014-08-06 17:09 ` Murali Karicheri
2014-08-06 17:09 ` Murali Karicheri
2014-08-06 17:30 ` Jason Gunthorpe
2014-08-06 17:30 ` Jason Gunthorpe
2014-08-06 19:05 ` Murali Karicheri [this message]
2014-08-06 19:05 ` Murali Karicheri
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