All of lore.kernel.org
 help / color / mirror / Atom feed
diff for duplicates of <53F14DC2.70000@gmail.com>

diff --git a/a/1.txt b/N1/1.txt
index fbd2466..f9f3d97 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,4 +1,4 @@
-On 07/30/2014 01:22 PM, tthayer at opensource.altera.com wrote:
+On 07/30/2014 01:22 PM, tthayer@opensource.altera.com wrote:
 > From: Thor Thayer <tthayer@opensource.altera.com>
 > 
 > Add the Altera SDRAM controller bindings and device tree changes to the Altera SoC project.
@@ -41,7 +41,7 @@ On 07/30/2014 01:22 PM, tthayer at opensource.altera.com wrote:
 > +- reg : Should contain 1 register range(address and length)
 > +
 > +Example:
-> +	sdr at 0xffc25000 {
+> +	sdr@0xffc25000 {
 > +		compatible = "altr,sdr";
 > +		reg = <0xffc25000 0x1000>;
 > +	};
@@ -53,11 +53,11 @@ On 07/30/2014 01:22 PM, tthayer at opensource.altera.com wrote:
 >  			};
 >  		};
 >  
-> +		sdr at 0xffc25000 {
+> +		sdr@0xffc25000 {
 > +			compatible = "altr,sdr";
 > +			reg = <0xffc25000 0x1000>;
 > +
-> +			sdramedac at 0 {
+> +			sdramedac@0 {
 > +				compatible = "altr,sdram-edac";
 > +				interrupts = <0 39 4>;
 > +			};
diff --git a/a/content_digest b/N1/content_digest
index 4da2930..167ddfc 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,12 +1,32 @@
  "ref\01406744573-609-1-git-send-email-tthayer@opensource.altera.com\0"
  "ref\01406744573-609-4-git-send-email-tthayer@opensource.altera.com\0"
- "From\0robherring2@gmail.com (Rob Herring)\0"
- "Subject\0[PATCHv9 3/3] arm: dts: Add Altera SDRAM controller bindings\0"
+ "From\0Rob Herring <robherring2@gmail.com>\0"
+ "Subject\0Re: [PATCHv9 3/3] arm: dts: Add Altera SDRAM controller bindings\0"
  "Date\0Sun, 17 Aug 2014 19:50:10 -0500\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0tthayer@opensource.altera.com"
+  pawel.moll@arm.com
+  mark.rutland@arm.com
+  ijc+devicetree@hellion.org.uk
+  galak@codeaurora.org
+  rob@landley.net
+  linux@arm.linux.org.uk
+  atull@altera.com
+  delicious.quinoa@gmail.com
+  dinguyen@altera.com
+  dougthompson@xmission.com
+  grant.likely@linaro.org
+  bp@alien8.de
+  sameo@linux.intel.com
+ " lee.jones@linaro.org\0"
+ "Cc\0devicetree@vger.kernel.org"
+  linux-doc@vger.kernel.org
+  linux-edac@vger.kernel.org
+  linux-kernel@vger.kernel.org
+  linux-arm-kernel@lists.infradead.org
+ " tthayer.linux@gmail.com\0"
  "\00:1\0"
  "b\0"
- "On 07/30/2014 01:22 PM, tthayer at opensource.altera.com wrote:\n"
+ "On 07/30/2014 01:22 PM, tthayer@opensource.altera.com wrote:\n"
  "> From: Thor Thayer <tthayer@opensource.altera.com>\n"
  "> \n"
  "> Add the Altera SDRAM controller bindings and device tree changes to the Altera SoC project.\n"
@@ -49,7 +69,7 @@
  "> +- reg : Should contain 1 register range(address and length)\n"
  "> +\n"
  "> +Example:\n"
- "> +\tsdr at 0xffc25000 {\n"
+ "> +\tsdr@0xffc25000 {\n"
  "> +\t\tcompatible = \"altr,sdr\";\n"
  "> +\t\treg = <0xffc25000 0x1000>;\n"
  "> +\t};\n"
@@ -61,11 +81,11 @@
  ">  \t\t\t};\n"
  ">  \t\t};\n"
  ">  \n"
- "> +\t\tsdr at 0xffc25000 {\n"
+ "> +\t\tsdr@0xffc25000 {\n"
  "> +\t\t\tcompatible = \"altr,sdr\";\n"
  "> +\t\t\treg = <0xffc25000 0x1000>;\n"
  "> +\n"
- "> +\t\t\tsdramedac at 0 {\n"
+ "> +\t\t\tsdramedac@0 {\n"
  "> +\t\t\t\tcompatible = \"altr,sdram-edac\";\n"
  "> +\t\t\t\tinterrupts = <0 39 4>;\n"
  "> +\t\t\t};\n"
@@ -77,4 +97,4 @@
  "\n"
  Rob
 
-86f2bf54459e3037a7e0025fb938457e13cdbeef12120afd0b9ed0ff0eff9e8f
+783236c961c2adb8a604c9ccc1aeb7c4e477d3c423991fcda4f917f323569d40

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.