From: robherring2@gmail.com (Rob Herring)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCHv9 3/3] arm: dts: Add Altera SDRAM controller bindings
Date: Sun, 17 Aug 2014 19:50:10 -0500 [thread overview]
Message-ID: <53F14DC2.70000@gmail.com> (raw)
In-Reply-To: <1406744573-609-4-git-send-email-tthayer@opensource.altera.com>
On 07/30/2014 01:22 PM, tthayer at opensource.altera.com wrote:
> From: Thor Thayer <tthayer@opensource.altera.com>
>
> Add the Altera SDRAM controller bindings and device tree changes to the Altera SoC project.
>
> Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
> ---
> v2: Changes to SoC SDRAM EDAC code.
>
> v3: Implement code suggestions for SDRAM EDAC code.
>
> v4: Remove syscon from SDRAM controller bindings.
>
> v5: No Change, bump version for consistency.
>
> v6: Only map the ctrlcfg register as syscon.
>
> v7: No change. Bump for consistency.
>
> v8: No change. Bump for consistency.
>
> v9: Changes to support a MFD SDRAM controller with nested EDAC.
> ---
> .../devicetree/bindings/arm/altera/socfpga-sdr.txt | 13 +++++++++++++
> arch/arm/boot/dts/socfpga.dtsi | 10 ++++++++++
> 2 files changed, 23 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdr.txt
>
> diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdr.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-sdr.txt
> new file mode 100644
> index 0000000..2bb1ddf
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-sdr.txt
> @@ -0,0 +1,13 @@
> +Altera SOCFPGA SDRAM Controller
> +The SDRAM controller is implemented as a MFD so various drivers may
> +nest under this main SDRAM controller binding.
> +
> +Required properties:
> +- compatible : "altr,sdr";
> +- reg : Should contain 1 register range(address and length)
> +
> +Example:
> + sdr at 0xffc25000 {
> + compatible = "altr,sdr";
> + reg = <0xffc25000 0x1000>;
> + };
> diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
> index 4676f25..ecb306d 100644
> --- a/arch/arm/boot/dts/socfpga.dtsi
> +++ b/arch/arm/boot/dts/socfpga.dtsi
> @@ -603,6 +603,16 @@
> };
> };
>
> + sdr at 0xffc25000 {
> + compatible = "altr,sdr";
> + reg = <0xffc25000 0x1000>;
> +
> + sdramedac at 0 {
> + compatible = "altr,sdram-edac";
> + interrupts = <0 39 4>;
> + };
This doesn't match the documentation, but I don't think this is a move
in the right direction anyway. Because Linux has/wants an MFD driver is
not a reason to add a sub node. It is a single h/w block and DT should
reflect that.
Rob
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robherring2@gmail.com>
To: tthayer@opensource.altera.com, pawel.moll@arm.com,
mark.rutland@arm.com, ijc+devicetree@hellion.org.uk,
galak@codeaurora.org, rob@landley.net, linux@arm.linux.org.uk,
atull@altera.com, delicious.quinoa@gmail.com,
dinguyen@altera.com, dougthompson@xmission.com,
grant.likely@linaro.org, bp@alien8.de, sameo@linux.intel.com,
lee.jones@linaro.org
Cc: devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, tthayer.linux@gmail.com
Subject: Re: [PATCHv9 3/3] arm: dts: Add Altera SDRAM controller bindings
Date: Sun, 17 Aug 2014 19:50:10 -0500 [thread overview]
Message-ID: <53F14DC2.70000@gmail.com> (raw)
In-Reply-To: <1406744573-609-4-git-send-email-tthayer@opensource.altera.com>
On 07/30/2014 01:22 PM, tthayer@opensource.altera.com wrote:
> From: Thor Thayer <tthayer@opensource.altera.com>
>
> Add the Altera SDRAM controller bindings and device tree changes to the Altera SoC project.
>
> Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
> ---
> v2: Changes to SoC SDRAM EDAC code.
>
> v3: Implement code suggestions for SDRAM EDAC code.
>
> v4: Remove syscon from SDRAM controller bindings.
>
> v5: No Change, bump version for consistency.
>
> v6: Only map the ctrlcfg register as syscon.
>
> v7: No change. Bump for consistency.
>
> v8: No change. Bump for consistency.
>
> v9: Changes to support a MFD SDRAM controller with nested EDAC.
> ---
> .../devicetree/bindings/arm/altera/socfpga-sdr.txt | 13 +++++++++++++
> arch/arm/boot/dts/socfpga.dtsi | 10 ++++++++++
> 2 files changed, 23 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdr.txt
>
> diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdr.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-sdr.txt
> new file mode 100644
> index 0000000..2bb1ddf
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-sdr.txt
> @@ -0,0 +1,13 @@
> +Altera SOCFPGA SDRAM Controller
> +The SDRAM controller is implemented as a MFD so various drivers may
> +nest under this main SDRAM controller binding.
> +
> +Required properties:
> +- compatible : "altr,sdr";
> +- reg : Should contain 1 register range(address and length)
> +
> +Example:
> + sdr@0xffc25000 {
> + compatible = "altr,sdr";
> + reg = <0xffc25000 0x1000>;
> + };
> diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
> index 4676f25..ecb306d 100644
> --- a/arch/arm/boot/dts/socfpga.dtsi
> +++ b/arch/arm/boot/dts/socfpga.dtsi
> @@ -603,6 +603,16 @@
> };
> };
>
> + sdr@0xffc25000 {
> + compatible = "altr,sdr";
> + reg = <0xffc25000 0x1000>;
> +
> + sdramedac@0 {
> + compatible = "altr,sdram-edac";
> + interrupts = <0 39 4>;
> + };
This doesn't match the documentation, but I don't think this is a move
in the right direction anyway. Because Linux has/wants an MFD driver is
not a reason to add a sub node. It is a single h/w block and DT should
reflect that.
Rob
next prev parent reply other threads:[~2014-08-18 0:50 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-30 18:22 [PATCHv9 0/3] Addition of Altera EDAC support tthayer at opensource.altera.com
2014-07-30 18:22 ` tthayer
2014-07-30 18:22 ` tthayer
2014-07-30 18:22 ` [PATCHv9 1/3] mfd: altera: Add Altera SDRAM Controller tthayer at opensource.altera.com
2014-07-30 18:22 ` tthayer
2014-07-30 18:22 ` tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
2014-07-31 8:26 ` Lee Jones
2014-07-31 8:26 ` Lee Jones
2014-07-31 20:00 ` Thor Thayer
2014-07-31 20:00 ` Thor Thayer
2014-07-31 20:00 ` Thor Thayer
2014-08-01 8:13 ` Lee Jones
2014-08-01 8:13 ` Lee Jones
2014-08-01 22:27 ` Thor Thayer
2014-08-01 22:27 ` Thor Thayer
2014-08-01 22:27 ` Thor Thayer
2014-08-02 17:08 ` Steffen Trumtrar
2014-08-02 17:08 ` Steffen Trumtrar
2014-08-04 16:09 ` Thor Thayer
2014-08-04 16:09 ` Thor Thayer
2014-08-04 16:09 ` Thor Thayer
2014-08-04 8:41 ` Lee Jones
2014-08-04 8:41 ` Lee Jones
2014-07-30 18:22 ` [PATCHv9 2/3] edac: altera: Add Altera EDAC support tthayer at opensource.altera.com
2014-07-30 18:22 ` tthayer
2014-07-30 18:22 ` tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
2014-07-30 18:22 ` [PATCHv9 3/3] arm: dts: Add Altera SDRAM controller bindings tthayer at opensource.altera.com
2014-07-30 18:22 ` tthayer
2014-07-30 18:22 ` tthayer
2014-08-18 0:50 ` Rob Herring [this message]
2014-08-18 0:50 ` Rob Herring
2014-08-18 14:44 ` Thor Thayer
2014-08-18 14:44 ` Thor Thayer
2014-08-18 14:44 ` Thor Thayer
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