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* [PATCH] drm/radeon: Sync ME and PFP after CP semaphore waits v2
@ 2014-08-18 14:30 Christian König
  2014-08-18 15:02 ` Alex Deucher
  0 siblings, 1 reply; 5+ messages in thread
From: Christian König @ 2014-08-18 14:30 UTC (permalink / raw)
  To: alexdeucher, michel; +Cc: dri-devel

From: Christian König <christian.koenig@amd.com>

Fixes lockups due to CP read GPUVM faults when running piglit on Cape
Verde.

v2 (chk): apply the fix to R600+ as well, on CIK only the GFX CP has
	  a PFP, add more comments to R600 code, enable flushing again

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
---
 drivers/gpu/drm/radeon/cik.c       | 17 +++++++++++++++++
 drivers/gpu/drm/radeon/r600.c      | 17 +++++++++++++++++
 drivers/gpu/drm/radeon/r600d.h     |  1 +
 drivers/gpu/drm/radeon/radeon_vm.c |  4 +---
 4 files changed, 36 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index e7d99e1..8b556f2 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -3920,6 +3920,17 @@ void cik_fence_compute_ring_emit(struct radeon_device *rdev,
 	radeon_ring_write(ring, 0);
 }
 
+/**
+ * cik_semaphore_ring_emit - emit a semaphore on the CP ring
+ *
+ * @rdev: radeon_device pointer
+ * @ring: radeon ring buffer object
+ * @semaphore: radeon semaphore object
+ * @emit_wait: Is this a sempahore wait?
+ *
+ * Emits a semaphore signal/wait packet to the CP ring and prevents the PFP
+ * from running ahead of semaphore waits.
+ */
 bool cik_semaphore_ring_emit(struct radeon_device *rdev,
 			     struct radeon_ring *ring,
 			     struct radeon_semaphore *semaphore,
@@ -3932,6 +3943,12 @@ bool cik_semaphore_ring_emit(struct radeon_device *rdev,
 	radeon_ring_write(ring, lower_32_bits(addr));
 	radeon_ring_write(ring, (upper_32_bits(addr) & 0xffff) | sel);
 
+	if (emit_wait && ring->idx == RADEON_RING_TYPE_GFX_INDEX) {
+		/* Prevent the PFP from running ahead of the semaphore wait */
+		radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));
+		radeon_ring_write(ring, 0x0);
+	}
+
 	return true;
 }
 
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index c70a504..d659fa5 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -2753,6 +2753,17 @@ void r600_fence_ring_emit(struct radeon_device *rdev,
 	}
 }
 
+/**
+ * r600_semaphore_ring_emit - emit a semaphore on the CP ring
+ *
+ * @rdev: radeon_device pointer
+ * @ring: radeon ring buffer object
+ * @semaphore: radeon semaphore object
+ * @emit_wait: Is this a sempahore wait?
+ *
+ * Emits a semaphore signal/wait packet to the CP ring and prevents the PFP
+ * from running ahead of semaphore waits.
+ */
 bool r600_semaphore_ring_emit(struct radeon_device *rdev,
 			      struct radeon_ring *ring,
 			      struct radeon_semaphore *semaphore,
@@ -2768,6 +2779,12 @@ bool r600_semaphore_ring_emit(struct radeon_device *rdev,
 	radeon_ring_write(ring, lower_32_bits(addr));
 	radeon_ring_write(ring, (upper_32_bits(addr) & 0xff) | sel);
 
+	if (emit_wait) {
+		/* Prevent the PFP from running ahead of the semaphore wait */
+		radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));
+		radeon_ring_write(ring, 0x0);
+	}
+
 	return true;
 }
 
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
index f94e7a9..1272c0d 100644
--- a/drivers/gpu/drm/radeon/r600d.h
+++ b/drivers/gpu/drm/radeon/r600d.h
@@ -1597,6 +1597,7 @@
 		 */
 #              define PACKET3_CP_DMA_CMD_SAIC      (1 << 28)
 #              define PACKET3_CP_DMA_CMD_DAIC      (1 << 29)
+#define PACKET3_PFP_SYNC_ME				0x42
 #define	PACKET3_SURFACE_SYNC				0x43
 #              define PACKET3_CB0_DEST_BASE_ENA    (1 << 6)
 #              define PACKET3_FULL_CACHE_ENA       (1 << 20) /* r7xx+ only */
diff --git a/drivers/gpu/drm/radeon/radeon_vm.c b/drivers/gpu/drm/radeon/radeon_vm.c
index 058f200..9c8358f 100644
--- a/drivers/gpu/drm/radeon/radeon_vm.c
+++ b/drivers/gpu/drm/radeon/radeon_vm.c
@@ -238,9 +238,7 @@ void radeon_vm_flush(struct radeon_device *rdev,
 	uint64_t pd_addr = radeon_bo_gpu_offset(vm->page_directory);
 
 	/* if we can't remember our last VM flush then flush now! */
-	/* XXX figure out why we have to flush all the time before CIK */
-	if (rdev->family < CHIP_BONAIRE ||
-	    !vm->last_flush || pd_addr != vm->pd_gpu_addr) {
+	if (!vm->last_flush || pd_addr != vm->pd_gpu_addr) {
 		trace_radeon_vm_flush(pd_addr, ring, vm->id);
 		vm->pd_gpu_addr = pd_addr;
 		radeon_ring_vm_flush(rdev, ring, vm);
-- 
1.9.1

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dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply related	[flat|nested] 5+ messages in thread
* Re: [PATCH] drm/radeon: Sync ME and PFP after CP semaphore waits v2
  2014-08-18 14:30 [PATCH] drm/radeon: Sync ME and PFP after CP semaphore waits v2 Christian König
@ 2014-08-18 15:02 ` Alex Deucher
  2014-08-18 15:14   ` Christian König
  2014-08-19  5:57   ` Michel Dänzer
  0 siblings, 2 replies; 5+ messages in thread
From: Alex Deucher @ 2014-08-18 15:02 UTC (permalink / raw)
  To: Christian König; +Cc: Michel Dänzer, Maling list - DRI developers

[-- Attachment #1: Type: text/plain, Size: 5221 bytes --]

On Mon, Aug 18, 2014 at 10:30 AM, Christian König
<deathsimple@vodafone.de> wrote:
> From: Christian König <christian.koenig@amd.com>
>
> Fixes lockups due to CP read GPUVM faults when running piglit on Cape
> Verde.
>
> v2 (chk): apply the fix to R600+ as well, on CIK only the GFX CP has
>           a PFP, add more comments to R600 code, enable flushing again
>
> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
> Signed-off-by: Christian König <christian.koenig@amd.com>

I just checked the ucode.  This packet only exists on 7xx and newer.
How about the attached change?

Alex

> ---
>  drivers/gpu/drm/radeon/cik.c       | 17 +++++++++++++++++
>  drivers/gpu/drm/radeon/r600.c      | 17 +++++++++++++++++
>  drivers/gpu/drm/radeon/r600d.h     |  1 +
>  drivers/gpu/drm/radeon/radeon_vm.c |  4 +---
>  4 files changed, 36 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
> index e7d99e1..8b556f2 100644
> --- a/drivers/gpu/drm/radeon/cik.c
> +++ b/drivers/gpu/drm/radeon/cik.c
> @@ -3920,6 +3920,17 @@ void cik_fence_compute_ring_emit(struct radeon_device *rdev,
>         radeon_ring_write(ring, 0);
>  }
>
> +/**
> + * cik_semaphore_ring_emit - emit a semaphore on the CP ring
> + *
> + * @rdev: radeon_device pointer
> + * @ring: radeon ring buffer object
> + * @semaphore: radeon semaphore object
> + * @emit_wait: Is this a sempahore wait?
> + *
> + * Emits a semaphore signal/wait packet to the CP ring and prevents the PFP
> + * from running ahead of semaphore waits.
> + */
>  bool cik_semaphore_ring_emit(struct radeon_device *rdev,
>                              struct radeon_ring *ring,
>                              struct radeon_semaphore *semaphore,
> @@ -3932,6 +3943,12 @@ bool cik_semaphore_ring_emit(struct radeon_device *rdev,
>         radeon_ring_write(ring, lower_32_bits(addr));
>         radeon_ring_write(ring, (upper_32_bits(addr) & 0xffff) | sel);
>
> +       if (emit_wait && ring->idx == RADEON_RING_TYPE_GFX_INDEX) {
> +               /* Prevent the PFP from running ahead of the semaphore wait */
> +               radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));
> +               radeon_ring_write(ring, 0x0);
> +       }
> +
>         return true;
>  }
>
> diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
> index c70a504..d659fa5 100644
> --- a/drivers/gpu/drm/radeon/r600.c
> +++ b/drivers/gpu/drm/radeon/r600.c
> @@ -2753,6 +2753,17 @@ void r600_fence_ring_emit(struct radeon_device *rdev,
>         }
>  }
>
> +/**
> + * r600_semaphore_ring_emit - emit a semaphore on the CP ring
> + *
> + * @rdev: radeon_device pointer
> + * @ring: radeon ring buffer object
> + * @semaphore: radeon semaphore object
> + * @emit_wait: Is this a sempahore wait?
> + *
> + * Emits a semaphore signal/wait packet to the CP ring and prevents the PFP
> + * from running ahead of semaphore waits.
> + */
>  bool r600_semaphore_ring_emit(struct radeon_device *rdev,
>                               struct radeon_ring *ring,
>                               struct radeon_semaphore *semaphore,
> @@ -2768,6 +2779,12 @@ bool r600_semaphore_ring_emit(struct radeon_device *rdev,
>         radeon_ring_write(ring, lower_32_bits(addr));
>         radeon_ring_write(ring, (upper_32_bits(addr) & 0xff) | sel);
>
> +       if (emit_wait) {
> +               /* Prevent the PFP from running ahead of the semaphore wait */
> +               radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));
> +               radeon_ring_write(ring, 0x0);
> +       }
> +
>         return true;
>  }
>
> diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
> index f94e7a9..1272c0d 100644
> --- a/drivers/gpu/drm/radeon/r600d.h
> +++ b/drivers/gpu/drm/radeon/r600d.h
> @@ -1597,6 +1597,7 @@
>                  */
>  #              define PACKET3_CP_DMA_CMD_SAIC      (1 << 28)
>  #              define PACKET3_CP_DMA_CMD_DAIC      (1 << 29)
> +#define PACKET3_PFP_SYNC_ME                            0x42
>  #define        PACKET3_SURFACE_SYNC                            0x43
>  #              define PACKET3_CB0_DEST_BASE_ENA    (1 << 6)
>  #              define PACKET3_FULL_CACHE_ENA       (1 << 20) /* r7xx+ only */
> diff --git a/drivers/gpu/drm/radeon/radeon_vm.c b/drivers/gpu/drm/radeon/radeon_vm.c
> index 058f200..9c8358f 100644
> --- a/drivers/gpu/drm/radeon/radeon_vm.c
> +++ b/drivers/gpu/drm/radeon/radeon_vm.c
> @@ -238,9 +238,7 @@ void radeon_vm_flush(struct radeon_device *rdev,
>         uint64_t pd_addr = radeon_bo_gpu_offset(vm->page_directory);
>
>         /* if we can't remember our last VM flush then flush now! */
> -       /* XXX figure out why we have to flush all the time before CIK */
> -       if (rdev->family < CHIP_BONAIRE ||
> -           !vm->last_flush || pd_addr != vm->pd_gpu_addr) {
> +       if (!vm->last_flush || pd_addr != vm->pd_gpu_addr) {
>                 trace_radeon_vm_flush(pd_addr, ring, vm->id);
>                 vm->pd_gpu_addr = pd_addr;
>                 radeon_ring_vm_flush(rdev, ring, vm);
> --
> 1.9.1
>

[-- Attachment #2: 0001-drm-radeon-Sync-ME-and-PFP-after-CP-semaphore-waits-.patch --]
[-- Type: text/x-diff, Size: 4803 bytes --]

From 83da062546d6df6b20b10b4daaebb0d6764201a1 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com>
Date: Mon, 18 Aug 2014 16:30:12 +0200
Subject: [PATCH] drm/radeon: Sync ME and PFP after CP semaphore waits v3
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Fixes lockups due to CP read GPUVM faults when running piglit on Cape
Verde.

v2 (chk): apply the fix to R600+ as well, on CIK only the GFX CP has
	  a PFP, add more comments to R600 code, enable flushing again
v3: (agd5f): only apply to 7xx+.  r6xx does not have the packet.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/radeon/cik.c       | 17 +++++++++++++++++
 drivers/gpu/drm/radeon/r600.c      | 18 ++++++++++++++++++
 drivers/gpu/drm/radeon/r600d.h     |  1 +
 drivers/gpu/drm/radeon/radeon_vm.c |  4 +---
 4 files changed, 37 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index 28e9be2..2d3bf39 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -3921,6 +3921,17 @@ void cik_fence_compute_ring_emit(struct radeon_device *rdev,
 	radeon_ring_write(ring, 0);
 }
 
+/**
+ * cik_semaphore_ring_emit - emit a semaphore on the CP ring
+ *
+ * @rdev: radeon_device pointer
+ * @ring: radeon ring buffer object
+ * @semaphore: radeon semaphore object
+ * @emit_wait: Is this a sempahore wait?
+ *
+ * Emits a semaphore signal/wait packet to the CP ring and prevents the PFP
+ * from running ahead of semaphore waits.
+ */
 bool cik_semaphore_ring_emit(struct radeon_device *rdev,
 			     struct radeon_ring *ring,
 			     struct radeon_semaphore *semaphore,
@@ -3933,6 +3944,12 @@ bool cik_semaphore_ring_emit(struct radeon_device *rdev,
 	radeon_ring_write(ring, lower_32_bits(addr));
 	radeon_ring_write(ring, (upper_32_bits(addr) & 0xffff) | sel);
 
+	if (emit_wait && ring->idx == RADEON_RING_TYPE_GFX_INDEX) {
+		/* Prevent the PFP from running ahead of the semaphore wait */
+		radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));
+		radeon_ring_write(ring, 0x0);
+	}
+
 	return true;
 }
 
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 1e47701..e8bf0ea 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -2753,6 +2753,17 @@ void r600_fence_ring_emit(struct radeon_device *rdev,
 	}
 }
 
+/**
+ * r600_semaphore_ring_emit - emit a semaphore on the CP ring
+ *
+ * @rdev: radeon_device pointer
+ * @ring: radeon ring buffer object
+ * @semaphore: radeon semaphore object
+ * @emit_wait: Is this a sempahore wait?
+ *
+ * Emits a semaphore signal/wait packet to the CP ring and prevents the PFP
+ * from running ahead of semaphore waits.
+ */
 bool r600_semaphore_ring_emit(struct radeon_device *rdev,
 			      struct radeon_ring *ring,
 			      struct radeon_semaphore *semaphore,
@@ -2768,6 +2779,13 @@ bool r600_semaphore_ring_emit(struct radeon_device *rdev,
 	radeon_ring_write(ring, lower_32_bits(addr));
 	radeon_ring_write(ring, (upper_32_bits(addr) & 0xff) | sel);
 
+	/* PFP_SYNC_ME packet only exists on 7xx+ */
+	if (emit_wait && (rdev->family >= CHIP_RV770)) {
+		/* Prevent the PFP from running ahead of the semaphore wait */
+		radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));
+		radeon_ring_write(ring, 0x0);
+	}
+
 	return true;
 }
 
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
index f94e7a9..1272c0d 100644
--- a/drivers/gpu/drm/radeon/r600d.h
+++ b/drivers/gpu/drm/radeon/r600d.h
@@ -1597,6 +1597,7 @@
 		 */
 #              define PACKET3_CP_DMA_CMD_SAIC      (1 << 28)
 #              define PACKET3_CP_DMA_CMD_DAIC      (1 << 29)
+#define PACKET3_PFP_SYNC_ME				0x42
 #define	PACKET3_SURFACE_SYNC				0x43
 #              define PACKET3_CB0_DEST_BASE_ENA    (1 << 6)
 #              define PACKET3_FULL_CACHE_ENA       (1 << 20) /* r7xx+ only */
diff --git a/drivers/gpu/drm/radeon/radeon_vm.c b/drivers/gpu/drm/radeon/radeon_vm.c
index 832ef32..088ffdc 100644
--- a/drivers/gpu/drm/radeon/radeon_vm.c
+++ b/drivers/gpu/drm/radeon/radeon_vm.c
@@ -238,9 +238,7 @@ void radeon_vm_flush(struct radeon_device *rdev,
 	uint64_t pd_addr = radeon_bo_gpu_offset(vm->page_directory);
 
 	/* if we can't remember our last VM flush then flush now! */
-	/* XXX figure out why we have to flush all the time before CIK */
-	if (rdev->family < CHIP_BONAIRE ||
-	    !vm->last_flush || pd_addr != vm->pd_gpu_addr) {
+	if (!vm->last_flush || pd_addr != vm->pd_gpu_addr) {
 		trace_radeon_vm_flush(pd_addr, ring, vm->id);
 		vm->pd_gpu_addr = pd_addr;
 		radeon_ring_vm_flush(rdev, ring, vm);
-- 
1.8.3.1


[-- Attachment #3: Type: text/plain, Size: 159 bytes --]

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^ permalink raw reply related	[flat|nested] 5+ messages in thread
* Re: [PATCH] drm/radeon: Sync ME and PFP after CP semaphore waits v2
  2014-08-18 15:02 ` Alex Deucher
@ 2014-08-18 15:14   ` Christian König
  2014-08-19  5:57   ` Michel Dänzer
  1 sibling, 0 replies; 5+ messages in thread
From: Christian König @ 2014-08-18 15:14 UTC (permalink / raw)
  To: Alex Deucher; +Cc: Michel Dänzer, Maling list - DRI developers

Am 18.08.2014 um 17:02 schrieb Alex Deucher:
> On Mon, Aug 18, 2014 at 10:30 AM, Christian König
> <deathsimple@vodafone.de> wrote:
>> From: Christian König <christian.koenig@amd.com>
>>
>> Fixes lockups due to CP read GPUVM faults when running piglit on Cape
>> Verde.
>>
>> v2 (chk): apply the fix to R600+ as well, on CIK only the GFX CP has
>>            a PFP, add more comments to R600 code, enable flushing again
>>
>> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
>> Signed-off-by: Christian König <christian.koenig@amd.com>
> I just checked the ucode.  This packet only exists on 7xx and newer.
> How about the attached change?

Works for me as well.

On a side note: Where did you find the documentation if that's present 
on R600? I could only confirm that it works on RV710 and so just assumed 
that it works on R6XX the same way.

Thanks for double checking that,
Christian.

>
> Alex
>
>> ---
>>   drivers/gpu/drm/radeon/cik.c       | 17 +++++++++++++++++
>>   drivers/gpu/drm/radeon/r600.c      | 17 +++++++++++++++++
>>   drivers/gpu/drm/radeon/r600d.h     |  1 +
>>   drivers/gpu/drm/radeon/radeon_vm.c |  4 +---
>>   4 files changed, 36 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
>> index e7d99e1..8b556f2 100644
>> --- a/drivers/gpu/drm/radeon/cik.c
>> +++ b/drivers/gpu/drm/radeon/cik.c
>> @@ -3920,6 +3920,17 @@ void cik_fence_compute_ring_emit(struct radeon_device *rdev,
>>          radeon_ring_write(ring, 0);
>>   }
>>
>> +/**
>> + * cik_semaphore_ring_emit - emit a semaphore on the CP ring
>> + *
>> + * @rdev: radeon_device pointer
>> + * @ring: radeon ring buffer object
>> + * @semaphore: radeon semaphore object
>> + * @emit_wait: Is this a sempahore wait?
>> + *
>> + * Emits a semaphore signal/wait packet to the CP ring and prevents the PFP
>> + * from running ahead of semaphore waits.
>> + */
>>   bool cik_semaphore_ring_emit(struct radeon_device *rdev,
>>                               struct radeon_ring *ring,
>>                               struct radeon_semaphore *semaphore,
>> @@ -3932,6 +3943,12 @@ bool cik_semaphore_ring_emit(struct radeon_device *rdev,
>>          radeon_ring_write(ring, lower_32_bits(addr));
>>          radeon_ring_write(ring, (upper_32_bits(addr) & 0xffff) | sel);
>>
>> +       if (emit_wait && ring->idx == RADEON_RING_TYPE_GFX_INDEX) {
>> +               /* Prevent the PFP from running ahead of the semaphore wait */
>> +               radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));
>> +               radeon_ring_write(ring, 0x0);
>> +       }
>> +
>>          return true;
>>   }
>>
>> diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
>> index c70a504..d659fa5 100644
>> --- a/drivers/gpu/drm/radeon/r600.c
>> +++ b/drivers/gpu/drm/radeon/r600.c
>> @@ -2753,6 +2753,17 @@ void r600_fence_ring_emit(struct radeon_device *rdev,
>>          }
>>   }
>>
>> +/**
>> + * r600_semaphore_ring_emit - emit a semaphore on the CP ring
>> + *
>> + * @rdev: radeon_device pointer
>> + * @ring: radeon ring buffer object
>> + * @semaphore: radeon semaphore object
>> + * @emit_wait: Is this a sempahore wait?
>> + *
>> + * Emits a semaphore signal/wait packet to the CP ring and prevents the PFP
>> + * from running ahead of semaphore waits.
>> + */
>>   bool r600_semaphore_ring_emit(struct radeon_device *rdev,
>>                                struct radeon_ring *ring,
>>                                struct radeon_semaphore *semaphore,
>> @@ -2768,6 +2779,12 @@ bool r600_semaphore_ring_emit(struct radeon_device *rdev,
>>          radeon_ring_write(ring, lower_32_bits(addr));
>>          radeon_ring_write(ring, (upper_32_bits(addr) & 0xff) | sel);
>>
>> +       if (emit_wait) {
>> +               /* Prevent the PFP from running ahead of the semaphore wait */
>> +               radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));
>> +               radeon_ring_write(ring, 0x0);
>> +       }
>> +
>>          return true;
>>   }
>>
>> diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
>> index f94e7a9..1272c0d 100644
>> --- a/drivers/gpu/drm/radeon/r600d.h
>> +++ b/drivers/gpu/drm/radeon/r600d.h
>> @@ -1597,6 +1597,7 @@
>>                   */
>>   #              define PACKET3_CP_DMA_CMD_SAIC      (1 << 28)
>>   #              define PACKET3_CP_DMA_CMD_DAIC      (1 << 29)
>> +#define PACKET3_PFP_SYNC_ME                            0x42
>>   #define        PACKET3_SURFACE_SYNC                            0x43
>>   #              define PACKET3_CB0_DEST_BASE_ENA    (1 << 6)
>>   #              define PACKET3_FULL_CACHE_ENA       (1 << 20) /* r7xx+ only */
>> diff --git a/drivers/gpu/drm/radeon/radeon_vm.c b/drivers/gpu/drm/radeon/radeon_vm.c
>> index 058f200..9c8358f 100644
>> --- a/drivers/gpu/drm/radeon/radeon_vm.c
>> +++ b/drivers/gpu/drm/radeon/radeon_vm.c
>> @@ -238,9 +238,7 @@ void radeon_vm_flush(struct radeon_device *rdev,
>>          uint64_t pd_addr = radeon_bo_gpu_offset(vm->page_directory);
>>
>>          /* if we can't remember our last VM flush then flush now! */
>> -       /* XXX figure out why we have to flush all the time before CIK */
>> -       if (rdev->family < CHIP_BONAIRE ||
>> -           !vm->last_flush || pd_addr != vm->pd_gpu_addr) {
>> +       if (!vm->last_flush || pd_addr != vm->pd_gpu_addr) {
>>                  trace_radeon_vm_flush(pd_addr, ring, vm->id);
>>                  vm->pd_gpu_addr = pd_addr;
>>                  radeon_ring_vm_flush(rdev, ring, vm);
>> --
>> 1.9.1
>>

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^ permalink raw reply	[flat|nested] 5+ messages in thread
* Re: [PATCH] drm/radeon: Sync ME and PFP after CP semaphore waits v2
  2014-08-18 15:02 ` Alex Deucher
  2014-08-18 15:14   ` Christian König
@ 2014-08-19  5:57   ` Michel Dänzer
  2014-08-19 16:03     ` Alex Deucher
  1 sibling, 1 reply; 5+ messages in thread
From: Michel Dänzer @ 2014-08-19  5:57 UTC (permalink / raw)
  To: Alex Deucher, Christian König; +Cc: Maling list - DRI developers

On 19.08.2014 00:02, Alex Deucher wrote:
> On Mon, Aug 18, 2014 at 10:30 AM, Christian König
> <deathsimple@vodafone.de> wrote:
>> From: Christian König <christian.koenig@amd.com>
>>
>> Fixes lockups due to CP read GPUVM faults when running piglit on Cape
>> Verde.
>>
>> v2 (chk): apply the fix to R600+ as well, on CIK only the GFX CP has
>>           a PFP, add more comments to R600 code, enable flushing again
>>
>> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
>> Signed-off-by: Christian König <christian.koenig@amd.com>
> 
> I just checked the ucode.  This packet only exists on 7xx and newer.
> How about the attached change?

Tested-by: Michel Dänzer <michel.daenzer@amd.com>

Just survived 10 piglit runs in a row on my Cape Verde. :)


>> diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
>> index f94e7a9..1272c0d 100644
>> --- a/drivers/gpu/drm/radeon/r600d.h
>> +++ b/drivers/gpu/drm/radeon/r600d.h
>> @@ -1597,6 +1597,7 @@
>>                  */
>>  #              define PACKET3_CP_DMA_CMD_SAIC      (1 << 28)
>>  #              define PACKET3_CP_DMA_CMD_DAIC      (1 << 29)
>> +#define PACKET3_PFP_SYNC_ME                            0x42
>>  #define        PACKET3_SURFACE_SYNC                            0x43
>>  #              define PACKET3_CB0_DEST_BASE_ENA    (1 << 6)
>>  #              define PACKET3_FULL_CACHE_ENA       (1 << 20) /* r7xx+ only */

The indentation doesn't seem to line up.


>> diff --git a/drivers/gpu/drm/radeon/radeon_vm.c b/drivers/gpu/drm/radeon/radeon_vm.c
>> index 058f200..9c8358f 100644
>> --- a/drivers/gpu/drm/radeon/radeon_vm.c
>> +++ b/drivers/gpu/drm/radeon/radeon_vm.c
>> @@ -238,9 +238,7 @@ void radeon_vm_flush(struct radeon_device *rdev,
>>         uint64_t pd_addr = radeon_bo_gpu_offset(vm->page_directory);
>>
>>         /* if we can't remember our last VM flush then flush now! */
>> -       /* XXX figure out why we have to flush all the time before CIK */
>> -       if (rdev->family < CHIP_BONAIRE ||
>> -           !vm->last_flush || pd_addr != vm->pd_gpu_addr) {
>> +       if (!vm->last_flush || pd_addr != vm->pd_gpu_addr) {
>>                 trace_radeon_vm_flush(pd_addr, ring, vm->id);
>>                 vm->pd_gpu_addr = pd_addr;
>>                 radeon_ring_vm_flush(rdev, ring, vm);

Might be better for this to be in a separate change.


-- 
Earthling Michel Dänzer            |                  http://www.amd.com
Libre software enthusiast          |                Mesa and X developer

^ permalink raw reply	[flat|nested] 5+ messages in thread
* Re: [PATCH] drm/radeon: Sync ME and PFP after CP semaphore waits v2
  2014-08-19  5:57   ` Michel Dänzer
@ 2014-08-19 16:03     ` Alex Deucher
  0 siblings, 0 replies; 5+ messages in thread
From: Alex Deucher @ 2014-08-19 16:03 UTC (permalink / raw)
  To: Michel Dänzer; +Cc: Maling list - DRI developers

On Tue, Aug 19, 2014 at 1:57 AM, Michel Dänzer <michel@daenzer.net> wrote:
> On 19.08.2014 00:02, Alex Deucher wrote:
>> On Mon, Aug 18, 2014 at 10:30 AM, Christian König
>> <deathsimple@vodafone.de> wrote:
>>> From: Christian König <christian.koenig@amd.com>
>>>
>>> Fixes lockups due to CP read GPUVM faults when running piglit on Cape
>>> Verde.
>>>
>>> v2 (chk): apply the fix to R600+ as well, on CIK only the GFX CP has
>>>           a PFP, add more comments to R600 code, enable flushing again
>>>
>>> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
>>> Signed-off-by: Christian König <christian.koenig@amd.com>
>>
>> I just checked the ucode.  This packet only exists on 7xx and newer.
>> How about the attached change?
>
> Tested-by: Michel Dänzer <michel.daenzer@amd.com>
>
> Just survived 10 piglit runs in a row on my Cape Verde. :)

I split the patch and fixed the formatting.

Alex

>
>
>>> diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
>>> index f94e7a9..1272c0d 100644
>>> --- a/drivers/gpu/drm/radeon/r600d.h
>>> +++ b/drivers/gpu/drm/radeon/r600d.h
>>> @@ -1597,6 +1597,7 @@
>>>                  */
>>>  #              define PACKET3_CP_DMA_CMD_SAIC      (1 << 28)
>>>  #              define PACKET3_CP_DMA_CMD_DAIC      (1 << 29)
>>> +#define PACKET3_PFP_SYNC_ME                            0x42
>>>  #define        PACKET3_SURFACE_SYNC                            0x43
>>>  #              define PACKET3_CB0_DEST_BASE_ENA    (1 << 6)
>>>  #              define PACKET3_FULL_CACHE_ENA       (1 << 20) /* r7xx+ only */
>
> The indentation doesn't seem to line up.
>
>
>>> diff --git a/drivers/gpu/drm/radeon/radeon_vm.c b/drivers/gpu/drm/radeon/radeon_vm.c
>>> index 058f200..9c8358f 100644
>>> --- a/drivers/gpu/drm/radeon/radeon_vm.c
>>> +++ b/drivers/gpu/drm/radeon/radeon_vm.c
>>> @@ -238,9 +238,7 @@ void radeon_vm_flush(struct radeon_device *rdev,
>>>         uint64_t pd_addr = radeon_bo_gpu_offset(vm->page_directory);
>>>
>>>         /* if we can't remember our last VM flush then flush now! */
>>> -       /* XXX figure out why we have to flush all the time before CIK */
>>> -       if (rdev->family < CHIP_BONAIRE ||
>>> -           !vm->last_flush || pd_addr != vm->pd_gpu_addr) {
>>> +       if (!vm->last_flush || pd_addr != vm->pd_gpu_addr) {
>>>                 trace_radeon_vm_flush(pd_addr, ring, vm->id);
>>>                 vm->pd_gpu_addr = pd_addr;
>>>                 radeon_ring_vm_flush(rdev, ring, vm);
>
> Might be better for this to be in a separate change.
>
>
> --
> Earthling Michel Dänzer            |                  http://www.amd.com
> Libre software enthusiast          |                Mesa and X developer
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply	[flat|nested] 5+ messages in thread
end of thread, other threads:[~2014-08-19 16:03 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2014-08-18 14:30 [PATCH] drm/radeon: Sync ME and PFP after CP semaphore waits v2 Christian König
2014-08-18 15:02 ` Alex Deucher
2014-08-18 15:14   ` Christian König
2014-08-19  5:57   ` Michel Dänzer
2014-08-19 16:03     ` Alex Deucher

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