From: Valentin Manea <qemu@mrs.ro>
To: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Cc: jia Liu <proljc@gmail.com>
Subject: [Qemu-devel] [PATCH v2 1/4] target-openrisc: Add IDE support to default machine
Date: Fri, 22 Aug 2014 20:02:11 +0300 [thread overview]
Message-ID: <53F77793.1080609@mrs.ro> (raw)
In-Reply-To: <53F77740.5030200@mrs.ro>
Add MMIO ide device support to the default openrisc machine.
Base address and IRQ line are the same as the or1ksim.
Signed-off-by: Valentin Manea <valentin.manea@gmail.com>
---
default-configs/or32-softmmu.mak | 3 +++
hw/openrisc/openrisc_sim.c | 32 ++++++++++++++++++++++++++++++++
2 files changed, 35 insertions(+)
diff --git a/default-configs/or32-softmmu.mak
b/default-configs/or32-softmmu.mak
index cce4746..c3ff078 100644
--- a/default-configs/or32-softmmu.mak
+++ b/default-configs/or32-softmmu.mak
@@ -2,3 +2,6 @@
CONFIG_SERIAL=y
CONFIG_OPENCORES_ETH=y
+CONFIG_IDE_CORE=y
+CONFIG_IDE_QDEV=y
+CONFIG_IDE_MMIO=y
diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
index b2b4f9b..da8647f 100644
--- a/hw/openrisc/openrisc_sim.c
+++ b/hw/openrisc/openrisc_sim.c
@@ -24,9 +24,11 @@
#include "hw/char/serial.h"
#include "net/net.h"
#include "hw/loader.h"
+#include "hw/ide.h"
#include "exec/address-spaces.h"
#include "sysemu/sysemu.h"
#include "hw/sysbus.h"
+#include "sysemu/blockdev.h"
#include "sysemu/qtest.h"
#define KERNEL_LOAD_ADDR 0x100
@@ -38,6 +40,32 @@ static void main_cpu_reset(void *opaque)
cpu_reset(CPU(cpu));
}
+static void openrisc_sim_ide_init(MemoryRegion *address_space,
+ hwaddr base,
+ hwaddr descriptors,
+ qemu_irq irq)
+{
+ DeviceState *dev;
+ SysBusDevice *busdev;
+ DriveInfo *dinfo;
+
+
+ dinfo = drive_get(IF_IDE, 0, 0);
+ if (!dinfo) {
+ return;
+ }
+ dev = qdev_create(NULL, "mmio-ide");
+ busdev = SYS_BUS_DEVICE(dev);
+ sysbus_connect_irq(busdev, 0, irq);
+ qdev_prop_set_uint32(dev, "shift", 2);
+ qdev_init_nofail(dev);
+ memory_region_add_subregion(address_space, base,
+ sysbus_mmio_get_region(busdev, 0));
+ memory_region_add_subregion(address_space, descriptors,
+ sysbus_mmio_get_region(busdev, 1));
+ mmio_ide_init_drives(dev, dinfo, NULL);
+}
+
static void openrisc_sim_net_init(MemoryRegion *address_space,
hwaddr base,
hwaddr descriptors,
@@ -129,6 +157,10 @@ static void openrisc_sim_init(MachineState *machine)
0x92000400, cpu->env.irq[4], nd_table);
}
+ /* Platform ATA device */
+ openrisc_sim_ide_init(get_system_memory(), 0x9e000000,
+ 0x9e000100, cpu->env.irq[15]);
+
cpu_openrisc_load_kernel(ram_size, kernel_filename, cpu);
}
-- 1.9.1
next prev parent reply other threads:[~2014-08-22 17:02 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-22 17:00 [Qemu-devel] [PATCH v2 0/4] target-openrisc: Machine improvements take two Valentin Manea
2014-08-22 17:02 ` Valentin Manea [this message]
2014-08-22 17:04 ` [Qemu-devel] [PATCH v2 2/4] target-openrisc: Add OpenCores FB device support Valentin Manea
2014-08-22 17:04 ` Valentin Manea
2014-08-22 17:05 ` [Qemu-devel] [PATCH v2 3/4] target-openrisc: Add OpenCores keyboard " Valentin Manea
2014-08-22 17:06 ` [Qemu-devel] [PATCH v2 4/4] target-openrisc: Add LPC32XX touchscreen device Valentin Manea
2014-08-22 17:36 ` Eric Blake
2014-08-22 18:33 ` Valentin Manea
2014-08-25 1:38 ` Jia Liu
2014-08-25 1:36 ` [Qemu-devel] [PATCH v2 3/4] target-openrisc: Add OpenCores keyboard device support Jia Liu
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