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From: Paolo Bonzini <pbonzini@redhat.com>
To: "Zhang, Yang Z" <yang.z.zhang@intel.com>,
	"Wang, Wei W" <wei.w.wang@intel.com>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>
Cc: "alex.williamson@redhat.com" <alex.williamson@redhat.com>
Subject: Re: [PATCH v2] KVM: x86: keep eoi exit bitmap accurate before loading it.
Date: Thu, 28 Aug 2014 10:44:04 +0200	[thread overview]
Message-ID: <53FEEBD4.8030202@redhat.com> (raw)
In-Reply-To: <A9667DDFB95DB7438FA9D7D576C3D87E0AB6FEA1@SHSMSX104.ccr.corp.intel.com>

Il 28/08/2014 08:17, Zhang, Yang Z ha scritto:
> >     Program edge-triggered MSI for vector 123
> >     Interrupt comes in, ISR[123]=1
> >     Mask MSI
> >     Program level-triggered IOAPIC interrupt for vector 123
> 
> You cannot assign the vector 123 to another trigger mode interrupt
> before previous IRQ handler finished (means issue EOI). If there is an
> interrupt comes from the IOAPIC entry immediately after you reprogram
> the entry, it will update the TMR to 1. Since we are still in previous
> IRQ handler, it will get confused to see the TMR becomes 1.

Yeah, that could be confusing to real hardware as well.  Still, I'm a
bit nervous at the possibility of races introduced by these patches...

I wouldn't mind a second review.

Paolo

  reply	other threads:[~2014-08-28  8:44 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-08-27 14:05 [PATCH v2] KVM: x86: keep eoi exit bitmap accurate before loading it Wei Wang
2014-08-27 14:27 ` Paolo Bonzini
2014-08-28  6:17   ` Zhang, Yang Z
2014-08-28  8:44     ` Paolo Bonzini [this message]
2014-08-28 10:14       ` Wang, Wei W
2014-08-28 11:00         ` Paolo Bonzini
2014-08-29  0:59           ` Wang, Wei W
2014-09-04  2:23             ` Wang, Wei W

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