* [PATCH] MIPS: Loongson: Fix the write-combine CCA value setting
@ 2014-08-29 3:36 Huacai Chen
2014-08-29 9:07 ` Markos Chandras
0 siblings, 1 reply; 4+ messages in thread
From: Huacai Chen @ 2014-08-29 3:36 UTC (permalink / raw)
To: Ralf Baechle
Cc: John Crispin, Steven J. Hill, Aurelien Jarno, linux-mips,
Fuxin Zhang, Zhangjin Wu, Huacai Chen
All Loongson-2/3 processors support _CACHE_UNCACHED_ACCELERATED, not
only Loongson-3A.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
---
arch/mips/kernel/cpu-probe.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 94c4a0c..08dc945 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -765,7 +765,6 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
break;
case PRID_REV_LOONGSON3A:
c->cputype = CPU_LOONGSON3;
- c->writecombine = _CACHE_UNCACHED_ACCELERATED;
__cpu_name[cpu] = "ICT Loongson-3";
set_elf_platform(cpu, "loongson3a");
break;
@@ -782,6 +781,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
MIPS_CPU_FPU | MIPS_CPU_LLSC |
MIPS_CPU_32FPR;
c->tlbsize = 64;
+ c->writecombine = _CACHE_UNCACHED_ACCELERATED;
break;
case PRID_IMP_LOONGSON_32: /* Loongson-1 */
decode_configs(c);
--
1.7.7.3
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] MIPS: Loongson: Fix the write-combine CCA value setting
@ 2014-08-29 9:07 ` Markos Chandras
0 siblings, 0 replies; 4+ messages in thread
From: Markos Chandras @ 2014-08-29 9:07 UTC (permalink / raw)
To: linux-mips
On 08/29/2014 04:36 AM, Huacai Chen wrote:
> All Loongson-2/3 processors support _CACHE_UNCACHED_ACCELERATED, not
> only Loongson-3A.
>
> Signed-off-by: Huacai Chen <chenhc@lemote.com>
> ---
Hi,
Thanks for the patch.
Ralf, perhaps you can merge it with
http://git.linux-mips.org/?p=ralf/upstream-sfr.git;a=commit;h=2ac2118deca510649c15b0ba6ce433c37bba345c
Thanks in advance.
--
markos
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] MIPS: Loongson: Fix the write-combine CCA value setting
@ 2014-08-29 9:07 ` Markos Chandras
0 siblings, 0 replies; 4+ messages in thread
From: Markos Chandras @ 2014-08-29 9:07 UTC (permalink / raw)
To: linux-mips
On 08/29/2014 04:36 AM, Huacai Chen wrote:
> All Loongson-2/3 processors support _CACHE_UNCACHED_ACCELERATED, not
> only Loongson-3A.
>
> Signed-off-by: Huacai Chen <chenhc@lemote.com>
> ---
Hi,
Thanks for the patch.
Ralf, perhaps you can merge it with
http://git.linux-mips.org/?p=ralf/upstream-sfr.git;a=commit;h=2ac2118deca510649c15b0ba6ce433c37bba345c
Thanks in advance.
--
markos
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] MIPS: Loongson: Fix the write-combine CCA value setting
2014-08-29 9:07 ` Markos Chandras
(?)
@ 2014-10-26 1:39 ` Huacai Chen
-1 siblings, 0 replies; 4+ messages in thread
From: Huacai Chen @ 2014-10-26 1:39 UTC (permalink / raw)
To: Markos Chandras, Ralf Baechle; +Cc: Linux MIPS Mailing List
Hi, Ralf,
Can this patch be merged in 3.18?
Huacai
On Fri, Aug 29, 2014 at 5:07 PM, Markos Chandras
<Markos.Chandras@imgtec.com> wrote:
> On 08/29/2014 04:36 AM, Huacai Chen wrote:
>> All Loongson-2/3 processors support _CACHE_UNCACHED_ACCELERATED, not
>> only Loongson-3A.
>>
>> Signed-off-by: Huacai Chen <chenhc@lemote.com>
>> ---
> Hi,
>
> Thanks for the patch.
>
> Ralf, perhaps you can merge it with
>
> http://git.linux-mips.org/?p=ralf/upstream-sfr.git;a=commit;h=2ac2118deca510649c15b0ba6ce433c37bba345c
>
> Thanks in advance.
>
> --
> markos
>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2014-10-26 1:39 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2014-08-29 3:36 [PATCH] MIPS: Loongson: Fix the write-combine CCA value setting Huacai Chen
2014-08-29 9:07 ` Markos Chandras
2014-08-29 9:07 ` Markos Chandras
2014-10-26 1:39 ` Huacai Chen
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