Re: [PATCH 1/3] can: flexcan.c: Correctly initialize mailboxes

[Marc Kleine-Budde <mkl@pengutronix.de>]

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On 09/02/2014 01:15 PM, David Jander wrote:

>> Yes, 0d1862e was not complete, the initialisation was fixes with:
>>
>> d5a7b40 can: flexcan: flexcan_chip_start: fix regression,
>>                        mark one MB for TX and abort pending TX
>>
>> Which sets FLEXCAN_MCR_MAXMB to 8, which is the only mailbox used for tx
>> and the code of the tx mailbox is set to 0x4 == tx, inactive.
>>
>> This should be enough in FIFO mode, correct?
> 
> AFAICS not. There could still be other MB's with reception or transmission
> enabled (randomly) causing potential data loss, extra frames sent and/or errors
> in the statistics.

> If the FIFO is full for example it should overflow with the next message, but
> if the next message instead hits an (randomly) empty and readied RX MB
> somewhere, the overflow is undetected and one (or more) frame(s) is lost.

Is FIFO to normal mailbox overflow a new feature of the imx6 flexcan
core? The mx35 data sheet states:

> If the FIFO is full and more frames continue to be received, an
> OVERFLOW interrupt is issued to the ARM and subsequent frames are not
> accepted until the ARM creates space in the FIFO by reading one or
> more frames.

While the mx6 states:

> Note that the flag will not be asserted when the Rx FIFO is
> full and the message was captured by a Mailbox.

But later in the imx35:

> In the event that the FIFO is full, the matching algorithm always
> looks for a matching message buffer outside the FIFO region.

This probably means even on the mx35 the _FIFO_ does not accept any more
message if it's full, but the other mailboxes may....

Marc

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