From: nicolas.ferre@atmel.com (Nicolas Ferre)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 2/2] ARM: dts: at_xdmac: add bindings documentation
Date: Wed, 17 Sep 2014 10:30:34 +0200 [thread overview]
Message-ID: <541946AA.6070407@atmel.com> (raw)
In-Reply-To: <1410792622-22621-3-git-send-email-ludovic.desroches@atmel.com>
On 15/09/2014 16:50, Ludovic Desroches :
> Add bindings documentation for the new Atmel DMA controller (XDMAC)
> introduced with SAMA5D4.
>
> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
> ---
> .../devicetree/bindings/dma/atmel-xdma.txt | 48 ++++++++++++++++++++++
> 1 file changed, 48 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/dma/atmel-xdma.txt
>
> diff --git a/Documentation/devicetree/bindings/dma/atmel-xdma.txt b/Documentation/devicetree/bindings/dma/atmel-xdma.txt
> new file mode 100644
> index 0000000..647f099
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/atmel-xdma.txt
> @@ -0,0 +1,48 @@
> +* Atmel Extensible Direct Memory Access Controller (XDMAC)
> +
> +* XDMA Controller
> +Required properties:
> +- compatible: Should be "atmel,<chip>-dma".
You must add the "chip" used here: like:
<chip> compatible description:
- sama5d4: first SoC adding the XDMAC
> +- reg: Should contain DMA registers location and length.
> +- interrupts: Should contain DMA interrupt.
> +- #dma-cells: Must be <2>, used to represent the number of integer cells in
> +the dmas property of client devices.
> + - The 1st cell specifies the memory interface (16 most significant bits) and
> + the peripheral interface (16 less significant bits) to use.
> + - The 2nd cell specifies the channel configuration register:
> + - bit 30-24: PERID, peripheral identifier.
> +
> +Example:
> +
> +dma1: dma-controller at f0004000 {
> + compatible = "atmel,sama5d4-dma";
> + reg = <0xf0004000 0x200>;
> + interrupts = <50 4 0>;
> + #dma-cells = <2>;
> +};
> +
> +
> +* DMA clients
> +DMA clients connected to the Atmel XDMA controller must use the format
> +described in the dma.txt file, using a two-cell specifier for each channel.
> +The three cells in order are:
> +1. A phandle pointing to the DMA controller.
> +2. The memory interface (16 most significant bits), the peripheral interface
> +(16 less significant bits).
> +3. Channel configuration register. Configurable fields are:
> + - bit 30-24: PERID, peripheral identifier.
> +
> +Example:
> +
> +i2c2: i2c at f8024000 {
> + compatible = "atmel,at91sam9x5-i2c";
> + reg = <0xf8024000 0x4000>;
> + interrupts = <34 4 6>;
> + dmas = <&dma1
> + (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))
> + AT91_XDMAC_DT_PERID(6)>,
> + <&dma1
> + (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))
> + AT91_XDMAC_DT_PERID(7)>;
> + dma-names = "tx", "rx";
> +};
>
Otherwise, you can add my:
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Thanks, bye,
--
Nicolas Ferre
WARNING: multiple messages have this Message-ID (diff)
From: Nicolas Ferre <nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
To: Ludovic Desroches
<ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>,
dmaengine-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
vinod.koul-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org
Cc: plagnioj-sclMFOaUSTBWk0Htik3J/w@public.gmane.org,
dan.j.williams-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
josh.wu-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org,
maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org,
arnd-r2nGTMty4D4@public.gmane.org,
sergei.shtylyov-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org
Subject: Re: [PATCH v4 2/2] ARM: dts: at_xdmac: add bindings documentation
Date: Wed, 17 Sep 2014 10:30:34 +0200 [thread overview]
Message-ID: <541946AA.6070407@atmel.com> (raw)
In-Reply-To: <1410792622-22621-3-git-send-email-ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
On 15/09/2014 16:50, Ludovic Desroches :
> Add bindings documentation for the new Atmel DMA controller (XDMAC)
> introduced with SAMA5D4.
>
> Signed-off-by: Ludovic Desroches <ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
> ---
> .../devicetree/bindings/dma/atmel-xdma.txt | 48 ++++++++++++++++++++++
> 1 file changed, 48 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/dma/atmel-xdma.txt
>
> diff --git a/Documentation/devicetree/bindings/dma/atmel-xdma.txt b/Documentation/devicetree/bindings/dma/atmel-xdma.txt
> new file mode 100644
> index 0000000..647f099
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/atmel-xdma.txt
> @@ -0,0 +1,48 @@
> +* Atmel Extensible Direct Memory Access Controller (XDMAC)
> +
> +* XDMA Controller
> +Required properties:
> +- compatible: Should be "atmel,<chip>-dma".
You must add the "chip" used here: like:
<chip> compatible description:
- sama5d4: first SoC adding the XDMAC
> +- reg: Should contain DMA registers location and length.
> +- interrupts: Should contain DMA interrupt.
> +- #dma-cells: Must be <2>, used to represent the number of integer cells in
> +the dmas property of client devices.
> + - The 1st cell specifies the memory interface (16 most significant bits) and
> + the peripheral interface (16 less significant bits) to use.
> + - The 2nd cell specifies the channel configuration register:
> + - bit 30-24: PERID, peripheral identifier.
> +
> +Example:
> +
> +dma1: dma-controller@f0004000 {
> + compatible = "atmel,sama5d4-dma";
> + reg = <0xf0004000 0x200>;
> + interrupts = <50 4 0>;
> + #dma-cells = <2>;
> +};
> +
> +
> +* DMA clients
> +DMA clients connected to the Atmel XDMA controller must use the format
> +described in the dma.txt file, using a two-cell specifier for each channel.
> +The three cells in order are:
> +1. A phandle pointing to the DMA controller.
> +2. The memory interface (16 most significant bits), the peripheral interface
> +(16 less significant bits).
> +3. Channel configuration register. Configurable fields are:
> + - bit 30-24: PERID, peripheral identifier.
> +
> +Example:
> +
> +i2c2: i2c@f8024000 {
> + compatible = "atmel,at91sam9x5-i2c";
> + reg = <0xf8024000 0x4000>;
> + interrupts = <34 4 6>;
> + dmas = <&dma1
> + (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))
> + AT91_XDMAC_DT_PERID(6)>,
> + <&dma1
> + (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))
> + AT91_XDMAC_DT_PERID(7)>;
> + dma-names = "tx", "rx";
> +};
>
Otherwise, you can add my:
Acked-by: Nicolas Ferre <nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
Thanks, bye,
--
Nicolas Ferre
--
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next prev parent reply other threads:[~2014-09-17 8:30 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-15 14:50 [PATCH v4 0/2] new Atmel DMA controller Ludovic Desroches
2014-09-15 14:50 ` Ludovic Desroches
2014-09-15 14:50 ` [PATCH v4 1/2] dma: at_xdmac: creation of the atmel eXtended DMA Controller driver Ludovic Desroches
2014-09-15 14:50 ` Ludovic Desroches
2014-09-15 16:47 ` Arnd Bergmann
2014-09-15 16:47 ` Arnd Bergmann
2014-09-16 9:34 ` Ludovic Desroches
2014-09-16 9:34 ` Ludovic Desroches
2014-09-17 12:10 ` Nicolas Ferre
2014-09-17 12:10 ` Nicolas Ferre
2014-09-15 14:50 ` [PATCH v4 2/2] ARM: dts: at_xdmac: add bindings documentation Ludovic Desroches
2014-09-15 14:50 ` Ludovic Desroches
2014-09-17 8:30 ` Nicolas Ferre [this message]
2014-09-17 8:30 ` Nicolas Ferre
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