Re: [PATCH 00/24] MIPS GIC cleanup, part 1

[Qais Yousef <qais.yousef@imgtec.com>]

On 09/17/2014 06:42 PM, Andrew Bresticker wrote:
> On Wed, Sep 17, 2014 at 3:20 AM, Qais Yousef <qais.yousef@imgtec.com> wrote:
>> On 09/16/2014 12:51 AM, Andrew Bresticker wrote:
>>> The current MIPS GIC driver and the platform code using it are rather
>>> ugly and could use a good cleanup before adding device-tree support [0].
>>> This major issues addressed in this series are converting the GIC (and
>>> platforms using it) to use IRQ domains and properly mapping interrupts
>>> through the GIC instead of using it transparently.  For part 2 I plan
>>> on: updating the driver to use proper iomem accessors, cleaning up and
>>> moving the GIC clocksource driver to drivers/clocksource/, adding DT
>>> support, and possibly converting the GIC driver to use generic irqchip.
>>>
>>> Patches 1-16 are cleanups for the existing GIC driver and prepare
>>> platforms
>>> using it for the switch to IRQ domains and using the GIC in a
>>> non-transparent
>>> way.
>>>
>>> Patches 17-24 convert the GIC driver to use IRQ domains and updates the
>>> platforms using it to properly map GIC interrupts instead of using the
>>> static
>>> routing tables to make the GIC appear transparent.
>>>
>>> I've tested this series on Malta and, with additional patches, on the
>>> DT-enabled Danube platform.  Unfortunately I do not have SEAD-3 hardware,
>>> so that has only been compile tested.  Compile tested on all other
>>> affected
>>> architectures (ath79, ralink, lantiq).
>>
>> I boot tested this on sead3 without problems.
> Thanks Qais!  Can I add your Tested-by for the series?

Tested-and-reviewed-by: Qais Yousef <qais.yousef@imgtec.com>