* [RESEND PATCH 0/4] Enables STMicroelectronics Flexgen Clock support
@ 2014-08-25 14:44 ` Gabriel FERNANDEZ
0 siblings, 0 replies; 23+ messages in thread
From: Gabriel FERNANDEZ @ 2014-08-25 14:44 UTC (permalink / raw)
To: Srinivas Kandagatla, Maxime Coquelin, Patrice Chotard,
Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
Russell King, olof
Cc: linux-arm-kernel, kernel, devicetree, linux-kernel, Lee Jones,
Gabriel Fernandez
These patches enables clock drivers for STih407 boards.
Gabriel Fernandez (4):
ARM: STi: DT: STiH407: 407 DT Entry for clockgen A0
ARM: STi: DT: STiH407: 407 DT Entry for clockgen C0
ARM: STi: DT: STiH407: 407 DT Entry for clockgen D0/D2/D3
ARM: STi: DT: STiH407: 407 DT Entry for clockgenA9
arch/arm/boot/dts/stih407-clock.dtsi | 295 ++++++++++++++++++++++++++++++-
arch/arm/boot/dts/stih407.dtsi | 18 +-
include/dt-bindings/clock/stih407-clks.h | 11 ++
3 files changed, 307 insertions(+), 17 deletions(-)
create mode 100644 include/dt-bindings/clock/stih407-clks.h
--
1.9.1
^ permalink raw reply [flat|nested] 23+ messages in thread
* [RESEND PATCH 0/4] Enables STMicroelectronics Flexgen Clock support
@ 2014-08-25 14:44 ` Gabriel FERNANDEZ
0 siblings, 0 replies; 23+ messages in thread
From: Gabriel FERNANDEZ @ 2014-08-25 14:44 UTC (permalink / raw)
To: Srinivas Kandagatla, Maxime Coquelin, Patrice Chotard,
Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
Russell King, olof
Cc: devicetree, kernel, linux-kernel, linux-arm-kernel, Lee Jones,
Gabriel Fernandez
These patches enables clock drivers for STih407 boards.
Gabriel Fernandez (4):
ARM: STi: DT: STiH407: 407 DT Entry for clockgen A0
ARM: STi: DT: STiH407: 407 DT Entry for clockgen C0
ARM: STi: DT: STiH407: 407 DT Entry for clockgen D0/D2/D3
ARM: STi: DT: STiH407: 407 DT Entry for clockgenA9
arch/arm/boot/dts/stih407-clock.dtsi | 295 ++++++++++++++++++++++++++++++-
arch/arm/boot/dts/stih407.dtsi | 18 +-
include/dt-bindings/clock/stih407-clks.h | 11 ++
3 files changed, 307 insertions(+), 17 deletions(-)
create mode 100644 include/dt-bindings/clock/stih407-clks.h
--
1.9.1
^ permalink raw reply [flat|nested] 23+ messages in thread
* [RESEND PATCH 1/4] ARM: STi: DT: STiH407: 407 DT Entry for clockgen A0
2014-08-25 14:44 ` Gabriel FERNANDEZ
(?)
@ 2014-08-25 14:44 ` Gabriel FERNANDEZ
-1 siblings, 0 replies; 23+ messages in thread
From: Gabriel FERNANDEZ @ 2014-08-25 14:44 UTC (permalink / raw)
To: linux-arm-kernel
Patch adds DT entries for clockgen A0
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
---
arch/arm/boot/dts/stih407-clock.dtsi | 32 ++++++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
index 800f46f..e03e86e 100644
--- a/arch/arm/boot/dts/stih407-clock.dtsi
+++ b/arch/arm/boot/dts/stih407-clock.dtsi
@@ -7,6 +7,10 @@
*/
/ {
clocks {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
/*
* Fixed 30MHz oscillator inputs to SoC
*/
@@ -35,5 +39,33 @@
clock-frequency = <200000000>;
clock-output-names = "clk-s-icn-reg-0";
};
+
+ /*
+ * ClockGenAs on SASG2
+ */
+ clockgen-a at 090ff000 {
+ compatible = "st,clkgen-c32";
+ reg = <0x90ff000 0x1000>;
+
+ clk_s_a0_pll: clk-s-a0-pll {
+ #clock-cells = <1>;
+ compatible = "st,stih407-plls-c32-a0", "st,clkgen-plls-c32";
+
+ clocks = <&clk_sysin>;
+
+ clock-output-names = "clk-s-a0-pll-ofd-0";
+ };
+
+ clk_s_a0_flexgen: clk-s-a0-flexgen {
+ compatible = "st,flexgen";
+
+ #clock-cells = <1>;
+
+ clocks = <&clk_s_a0_pll 0>,
+ <&clk_sysin>;
+
+ clock-output-names = "clk-ic-lmi0";
+ };
+ };
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 23+ messages in thread* [RESEND PATCH 1/4] ARM: STi: DT: STiH407: 407 DT Entry for clockgen A0
@ 2014-08-25 14:44 ` Gabriel FERNANDEZ
0 siblings, 0 replies; 23+ messages in thread
From: Gabriel FERNANDEZ @ 2014-08-25 14:44 UTC (permalink / raw)
To: Srinivas Kandagatla, Maxime Coquelin, Patrice Chotard,
Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
Russell King, olof
Cc: linux-arm-kernel, kernel, devicetree, linux-kernel, Lee Jones,
Gabriel Fernandez, Olivier Bideau
Patch adds DT entries for clockgen A0
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
---
arch/arm/boot/dts/stih407-clock.dtsi | 32 ++++++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
index 800f46f..e03e86e 100644
--- a/arch/arm/boot/dts/stih407-clock.dtsi
+++ b/arch/arm/boot/dts/stih407-clock.dtsi
@@ -7,6 +7,10 @@
*/
/ {
clocks {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
/*
* Fixed 30MHz oscillator inputs to SoC
*/
@@ -35,5 +39,33 @@
clock-frequency = <200000000>;
clock-output-names = "clk-s-icn-reg-0";
};
+
+ /*
+ * ClockGenAs on SASG2
+ */
+ clockgen-a@090ff000 {
+ compatible = "st,clkgen-c32";
+ reg = <0x90ff000 0x1000>;
+
+ clk_s_a0_pll: clk-s-a0-pll {
+ #clock-cells = <1>;
+ compatible = "st,stih407-plls-c32-a0", "st,clkgen-plls-c32";
+
+ clocks = <&clk_sysin>;
+
+ clock-output-names = "clk-s-a0-pll-ofd-0";
+ };
+
+ clk_s_a0_flexgen: clk-s-a0-flexgen {
+ compatible = "st,flexgen";
+
+ #clock-cells = <1>;
+
+ clocks = <&clk_s_a0_pll 0>,
+ <&clk_sysin>;
+
+ clock-output-names = "clk-ic-lmi0";
+ };
+ };
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 23+ messages in thread* [RESEND PATCH 1/4] ARM: STi: DT: STiH407: 407 DT Entry for clockgen A0
@ 2014-08-25 14:44 ` Gabriel FERNANDEZ
0 siblings, 0 replies; 23+ messages in thread
From: Gabriel FERNANDEZ @ 2014-08-25 14:44 UTC (permalink / raw)
To: Srinivas Kandagatla, Maxime Coquelin, Patrice Chotard,
Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
Russell King, olof
Cc: devicetree, kernel, Olivier Bideau, linux-kernel,
linux-arm-kernel, Lee Jones, Gabriel Fernandez
Patch adds DT entries for clockgen A0
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
---
arch/arm/boot/dts/stih407-clock.dtsi | 32 ++++++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
index 800f46f..e03e86e 100644
--- a/arch/arm/boot/dts/stih407-clock.dtsi
+++ b/arch/arm/boot/dts/stih407-clock.dtsi
@@ -7,6 +7,10 @@
*/
/ {
clocks {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
/*
* Fixed 30MHz oscillator inputs to SoC
*/
@@ -35,5 +39,33 @@
clock-frequency = <200000000>;
clock-output-names = "clk-s-icn-reg-0";
};
+
+ /*
+ * ClockGenAs on SASG2
+ */
+ clockgen-a@090ff000 {
+ compatible = "st,clkgen-c32";
+ reg = <0x90ff000 0x1000>;
+
+ clk_s_a0_pll: clk-s-a0-pll {
+ #clock-cells = <1>;
+ compatible = "st,stih407-plls-c32-a0", "st,clkgen-plls-c32";
+
+ clocks = <&clk_sysin>;
+
+ clock-output-names = "clk-s-a0-pll-ofd-0";
+ };
+
+ clk_s_a0_flexgen: clk-s-a0-flexgen {
+ compatible = "st,flexgen";
+
+ #clock-cells = <1>;
+
+ clocks = <&clk_s_a0_pll 0>,
+ <&clk_sysin>;
+
+ clock-output-names = "clk-ic-lmi0";
+ };
+ };
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 23+ messages in thread* [RESEND PATCH 1/4] ARM: STi: DT: STiH407: 407 DT Entry for clockgen A0
2014-08-25 14:44 ` Gabriel FERNANDEZ
(?)
@ 2014-09-23 7:44 ` Maxime Coquelin
-1 siblings, 0 replies; 23+ messages in thread
From: Maxime Coquelin @ 2014-09-23 7:44 UTC (permalink / raw)
To: linux-arm-kernel
On 08/25/2014 04:44 PM, Gabriel FERNANDEZ wrote:
> Patch adds DT entries for clockgen A0
>
> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
> Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
> ---
> arch/arm/boot/dts/stih407-clock.dtsi | 32 ++++++++++++++++++++++++++++++++
> 1 file changed, 32 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
> index 800f46f..e03e86e 100644
> --- a/arch/arm/boot/dts/stih407-clock.dtsi
> +++ b/arch/arm/boot/dts/stih407-clock.dtsi
> @@ -7,6 +7,10 @@
> */
> / {
> clocks {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> /*
> * Fixed 30MHz oscillator inputs to SoC
> */
> @@ -35,5 +39,33 @@
> clock-frequency = <200000000>;
> clock-output-names = "clk-s-icn-reg-0";
> };
> +
> + /*
> + * ClockGenAs on SASG2
> + */
Note that I removed this comment since no SASG2 on STiH407.
> + clockgen-a at 090ff000 {
> + compatible = "st,clkgen-c32";
> + reg = <0x90ff000 0x1000>;
...
^ permalink raw reply [flat|nested] 23+ messages in thread* Re: [RESEND PATCH 1/4] ARM: STi: DT: STiH407: 407 DT Entry for clockgen A0
@ 2014-09-23 7:44 ` Maxime Coquelin
0 siblings, 0 replies; 23+ messages in thread
From: Maxime Coquelin @ 2014-09-23 7:44 UTC (permalink / raw)
To: Gabriel FERNANDEZ, Srinivas Kandagatla, Patrice Chotard,
Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
Russell King, olof
Cc: linux-arm-kernel, kernel, devicetree, linux-kernel, Lee Jones,
Gabriel Fernandez, Olivier Bideau
On 08/25/2014 04:44 PM, Gabriel FERNANDEZ wrote:
> Patch adds DT entries for clockgen A0
>
> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
> Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
> ---
> arch/arm/boot/dts/stih407-clock.dtsi | 32 ++++++++++++++++++++++++++++++++
> 1 file changed, 32 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
> index 800f46f..e03e86e 100644
> --- a/arch/arm/boot/dts/stih407-clock.dtsi
> +++ b/arch/arm/boot/dts/stih407-clock.dtsi
> @@ -7,6 +7,10 @@
> */
> / {
> clocks {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> /*
> * Fixed 30MHz oscillator inputs to SoC
> */
> @@ -35,5 +39,33 @@
> clock-frequency = <200000000>;
> clock-output-names = "clk-s-icn-reg-0";
> };
> +
> + /*
> + * ClockGenAs on SASG2
> + */
Note that I removed this comment since no SASG2 on STiH407.
> + clockgen-a@090ff000 {
> + compatible = "st,clkgen-c32";
> + reg = <0x90ff000 0x1000>;
...
^ permalink raw reply [flat|nested] 23+ messages in thread* Re: [RESEND PATCH 1/4] ARM: STi: DT: STiH407: 407 DT Entry for clockgen A0
@ 2014-09-23 7:44 ` Maxime Coquelin
0 siblings, 0 replies; 23+ messages in thread
From: Maxime Coquelin @ 2014-09-23 7:44 UTC (permalink / raw)
To: Gabriel FERNANDEZ, Srinivas Kandagatla, Patrice Chotard,
Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
Russell King, olof
Cc: linux-arm-kernel, kernel, devicetree, linux-kernel, Lee Jones,
Gabriel Fernandez, Olivier Bideau
On 08/25/2014 04:44 PM, Gabriel FERNANDEZ wrote:
> Patch adds DT entries for clockgen A0
>
> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
> Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
> ---
> arch/arm/boot/dts/stih407-clock.dtsi | 32 ++++++++++++++++++++++++++++++++
> 1 file changed, 32 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
> index 800f46f..e03e86e 100644
> --- a/arch/arm/boot/dts/stih407-clock.dtsi
> +++ b/arch/arm/boot/dts/stih407-clock.dtsi
> @@ -7,6 +7,10 @@
> */
> / {
> clocks {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> /*
> * Fixed 30MHz oscillator inputs to SoC
> */
> @@ -35,5 +39,33 @@
> clock-frequency = <200000000>;
> clock-output-names = "clk-s-icn-reg-0";
> };
> +
> + /*
> + * ClockGenAs on SASG2
> + */
Note that I removed this comment since no SASG2 on STiH407.
> + clockgen-a@090ff000 {
> + compatible = "st,clkgen-c32";
> + reg = <0x90ff000 0x1000>;
...
^ permalink raw reply [flat|nested] 23+ messages in thread* [RESEND PATCH 1/4] ARM: STi: DT: STiH407: 407 DT Entry for clockgen A0
@ 2014-09-23 7:58 ` Gabriel Fernandez
0 siblings, 0 replies; 23+ messages in thread
From: Gabriel Fernandez @ 2014-09-23 7:58 UTC (permalink / raw)
To: linux-arm-kernel
Thanks Maxime !
On 09/23/2014 09:44 AM, Maxime Coquelin wrote:
>
>
> On 08/25/2014 04:44 PM, Gabriel FERNANDEZ wrote:
>> Patch adds DT entries for clockgen A0
>>
>> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
>> Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
>> ---
>> arch/arm/boot/dts/stih407-clock.dtsi | 32
>> ++++++++++++++++++++++++++++++++
>> 1 file changed, 32 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/stih407-clock.dtsi
>> b/arch/arm/boot/dts/stih407-clock.dtsi
>> index 800f46f..e03e86e 100644
>> --- a/arch/arm/boot/dts/stih407-clock.dtsi
>> +++ b/arch/arm/boot/dts/stih407-clock.dtsi
>> @@ -7,6 +7,10 @@
>> */
>> / {
>> clocks {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges;
>> +
>> /*
>> * Fixed 30MHz oscillator inputs to SoC
>> */
>> @@ -35,5 +39,33 @@
>> clock-frequency = <200000000>;
>> clock-output-names = "clk-s-icn-reg-0";
>> };
>> +
>> + /*
>> + * ClockGenAs on SASG2
>> + */
> Note that I removed this comment since no SASG2 on STiH407.
>
>> + clockgen-a at 090ff000 {
>> + compatible = "st,clkgen-c32";
>> + reg = <0x90ff000 0x1000>;
> ...
^ permalink raw reply [flat|nested] 23+ messages in thread* Re: [RESEND PATCH 1/4] ARM: STi: DT: STiH407: 407 DT Entry for clockgen A0
@ 2014-09-23 7:58 ` Gabriel Fernandez
0 siblings, 0 replies; 23+ messages in thread
From: Gabriel Fernandez @ 2014-09-23 7:58 UTC (permalink / raw)
To: Maxime Coquelin, Srinivas Kandagatla, Patrice Chotard,
Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
Russell King, olof
Cc: linux-arm-kernel, kernel, devicetree, linux-kernel, Lee Jones,
Gabriel Fernandez, Olivier Bideau
Thanks Maxime !
On 09/23/2014 09:44 AM, Maxime Coquelin wrote:
>
>
> On 08/25/2014 04:44 PM, Gabriel FERNANDEZ wrote:
>> Patch adds DT entries for clockgen A0
>>
>> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
>> Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
>> ---
>> arch/arm/boot/dts/stih407-clock.dtsi | 32
>> ++++++++++++++++++++++++++++++++
>> 1 file changed, 32 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/stih407-clock.dtsi
>> b/arch/arm/boot/dts/stih407-clock.dtsi
>> index 800f46f..e03e86e 100644
>> --- a/arch/arm/boot/dts/stih407-clock.dtsi
>> +++ b/arch/arm/boot/dts/stih407-clock.dtsi
>> @@ -7,6 +7,10 @@
>> */
>> / {
>> clocks {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges;
>> +
>> /*
>> * Fixed 30MHz oscillator inputs to SoC
>> */
>> @@ -35,5 +39,33 @@
>> clock-frequency = <200000000>;
>> clock-output-names = "clk-s-icn-reg-0";
>> };
>> +
>> + /*
>> + * ClockGenAs on SASG2
>> + */
> Note that I removed this comment since no SASG2 on STiH407.
>
>> + clockgen-a@090ff000 {
>> + compatible = "st,clkgen-c32";
>> + reg = <0x90ff000 0x1000>;
> ...
^ permalink raw reply [flat|nested] 23+ messages in thread* Re: [RESEND PATCH 1/4] ARM: STi: DT: STiH407: 407 DT Entry for clockgen A0
@ 2014-09-23 7:58 ` Gabriel Fernandez
0 siblings, 0 replies; 23+ messages in thread
From: Gabriel Fernandez @ 2014-09-23 7:58 UTC (permalink / raw)
To: Maxime Coquelin, Srinivas Kandagatla, Patrice Chotard,
Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
Russell King, olof-nZhT3qVonbNeoWH0uzbU5w
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
kernel-F5mvAk5X5gdBDgjK7y7TUQ, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Lee Jones, Gabriel Fernandez,
Olivier Bideau
Thanks Maxime !
On 09/23/2014 09:44 AM, Maxime Coquelin wrote:
>
>
> On 08/25/2014 04:44 PM, Gabriel FERNANDEZ wrote:
>> Patch adds DT entries for clockgen A0
>>
>> Signed-off-by: Gabriel Fernandez <gabriel.fernandez-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
>> Signed-off-by: Olivier Bideau <olivier.bideau-qxv4g6HH51o@public.gmane.org>
>> ---
>> arch/arm/boot/dts/stih407-clock.dtsi | 32
>> ++++++++++++++++++++++++++++++++
>> 1 file changed, 32 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/stih407-clock.dtsi
>> b/arch/arm/boot/dts/stih407-clock.dtsi
>> index 800f46f..e03e86e 100644
>> --- a/arch/arm/boot/dts/stih407-clock.dtsi
>> +++ b/arch/arm/boot/dts/stih407-clock.dtsi
>> @@ -7,6 +7,10 @@
>> */
>> / {
>> clocks {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges;
>> +
>> /*
>> * Fixed 30MHz oscillator inputs to SoC
>> */
>> @@ -35,5 +39,33 @@
>> clock-frequency = <200000000>;
>> clock-output-names = "clk-s-icn-reg-0";
>> };
>> +
>> + /*
>> + * ClockGenAs on SASG2
>> + */
> Note that I removed this comment since no SASG2 on STiH407.
>
>> + clockgen-a@090ff000 {
>> + compatible = "st,clkgen-c32";
>> + reg = <0x90ff000 0x1000>;
> ...
--
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^ permalink raw reply [flat|nested] 23+ messages in thread
* [RESEND PATCH 2/4] ARM: STi: DT: STiH407: 407 DT Entry for clockgen C0
2014-08-25 14:44 ` Gabriel FERNANDEZ
(?)
@ 2014-08-25 14:44 ` Gabriel FERNANDEZ
-1 siblings, 0 replies; 23+ messages in thread
From: Gabriel FERNANDEZ @ 2014-08-25 14:44 UTC (permalink / raw)
To: linux-arm-kernel
Patch adds DT entries for clockgen C0
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
---
arch/arm/boot/dts/stih407-clock.dtsi | 94 ++++++++++++++++++++++++++++----
arch/arm/boot/dts/stih407.dtsi | 18 +++---
include/dt-bindings/clock/stih407-clks.h | 11 ++++
3 files changed, 103 insertions(+), 20 deletions(-)
create mode 100644 include/dt-bindings/clock/stih407-clks.h
diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
index e03e86e..85cc135 100644
--- a/arch/arm/boot/dts/stih407-clock.dtsi
+++ b/arch/arm/boot/dts/stih407-clock.dtsi
@@ -5,6 +5,7 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
+#include <dt-bindings/clock/stih407-clks.h>
/ {
clocks {
#address-cells = <1>;
@@ -30,17 +31,6 @@
};
/*
- * Bootloader initialized system infrastructure clock for
- * serial devices.
- */
- clk_ext2f_a9: clockgen-c0 at 13 {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <200000000>;
- clock-output-names = "clk-s-icn-reg-0";
- };
-
- /*
* ClockGenAs on SASG2
*/
clockgen-a at 090ff000 {
@@ -67,5 +57,87 @@
clock-output-names = "clk-ic-lmi0";
};
};
+
+ clk_s_c0_quadfs: clk-s-c0-quadfs at 9103000 {
+ #clock-cells = <1>;
+ compatible = "st,stih407-quadfs660-C", "st,quadfs";
+ reg = <0x9103000 0x1000>;
+
+ clocks = <&clk_sysin>;
+
+ clock-output-names = "clk-s-c0-fs0-ch0",
+ "clk-s-c0-fs0-ch1",
+ "clk-s-c0-fs0-ch2",
+ "clk-s-c0-fs0-ch3";
+ };
+
+ clk_s_c0: clockgen-c at 09103000 {
+ compatible = "st,clkgen-c32";
+ reg = <0x9103000 0x1000>;
+
+ clk_s_c0_pll0: clk-s-c0-pll0 {
+ #clock-cells = <1>;
+ compatible = "st,stih407-plls-c32-c0_0", "st,clkgen-plls-c32";
+
+ clocks = <&clk_sysin>;
+
+ clock-output-names = "clk-s-c0-pll0-odf-0";
+ };
+
+ clk_s_c0_pll1: clk-s-c0-pll1 {
+ #clock-cells = <1>;
+ compatible = "st,stih407-plls-c32-c0_1", "st,clkgen-plls-c32";
+
+ clocks = <&clk_sysin>;
+
+ clock-output-names = "clk-s-c0-pll1-odf-0";
+ };
+
+ clk_s_c0_flexgen: clk-s-c0-flexgen {
+ #clock-cells = <1>;
+ compatible = "st,flexgen";
+
+ clocks = <&clk_s_c0_pll0 0>,
+ <&clk_s_c0_pll1 0>,
+ <&clk_s_c0_quadfs 0>,
+ <&clk_s_c0_quadfs 1>,
+ <&clk_s_c0_quadfs 2>,
+ <&clk_s_c0_quadfs 3>,
+ <&clk_sysin>;
+
+ clock-output-names = "clk-icn-gpu",
+ "clk-fdma",
+ "clk-nand",
+ "clk-hva",
+ "clk-proc-stfe",
+ "clk-proc-tp",
+ "clk-rx-icn-dmu",
+ "clk-rx-icn-hva",
+ "clk-icn-cpu",
+ "clk-tx-icn-dmu",
+ "clk-mmc-0",
+ "clk-mmc-1",
+ "clk-jpegdec",
+ "clk-ext2fa9",
+ "clk-ic-bdisp-0",
+ "clk-ic-bdisp-1",
+ "clk-pp-dmu",
+ "clk-vid-dmu",
+ "clk-dss-lpc",
+ "clk-st231-aud-0",
+ "clk-st231-gp-1",
+ "clk-st231-dmu",
+ "clk-icn-lmi",
+ "clk-tx-icn-disp-1",
+ "clk-icn-sbc",
+ "clk-stfe-frc2",
+ "clk-eth-phy",
+ "clk-eth-ref-phyclk",
+ "clk-flash-promip",
+ "clk-main-disp",
+ "clk-aux-disp",
+ "clk-compo-dvp";
+ };
+ };
};
};
diff --git a/arch/arm/boot/dts/stih407.dtsi b/arch/arm/boot/dts/stih407.dtsi
index 4f9024f..f539627 100644
--- a/arch/arm/boot/dts/stih407.dtsi
+++ b/arch/arm/boot/dts/stih407.dtsi
@@ -104,7 +104,7 @@
interrupts = <GIC_SPI 122 IRQ_TYPE_NONE>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_serial0>;
- clocks = <&clk_ext2f_a9>;
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
status = "disabled";
};
@@ -115,7 +115,7 @@
interrupts = <GIC_SPI 123 IRQ_TYPE_NONE>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_serial1>;
- clocks = <&clk_ext2f_a9>;
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
status = "disabled";
};
@@ -126,7 +126,7 @@
interrupts = <GIC_SPI 124 IRQ_TYPE_NONE>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_serial2>;
- clocks = <&clk_ext2f_a9>;
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
status = "disabled";
};
@@ -158,7 +158,7 @@
compatible = "st,comms-ssc4-i2c";
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x9840000 0x110>;
- clocks = <&clk_ext2f_a9>;
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
@@ -171,7 +171,7 @@
compatible = "st,comms-ssc4-i2c";
reg = <0x9841000 0x110>;
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_ext2f_a9>;
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
@@ -184,7 +184,7 @@
compatible = "st,comms-ssc4-i2c";
reg = <0x9842000 0x110>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_ext2f_a9>;
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
@@ -197,7 +197,7 @@
compatible = "st,comms-ssc4-i2c";
reg = <0x9843000 0x110>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_ext2f_a9>;
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
@@ -210,7 +210,7 @@
compatible = "st,comms-ssc4-i2c";
reg = <0x9844000 0x110>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_ext2f_a9>;
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
@@ -223,7 +223,7 @@
compatible = "st,comms-ssc4-i2c";
reg = <0x9845000 0x110>;
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_ext2f_a9>;
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
diff --git a/include/dt-bindings/clock/stih407-clks.h b/include/dt-bindings/clock/stih407-clks.h
new file mode 100644
index 0000000..1f9bfe0
--- /dev/null
+++ b/include/dt-bindings/clock/stih407-clks.h
@@ -0,0 +1,11 @@
+/*
+ * This header provides constants clk index STMicroelectronics
+ * STiH407 SoC.
+ */
+#ifndef _DT_BINDINGS_CLK_STIH407
+#define _DT_BINDINGS_CLK_STIH407
+
+/* CLOCKGEN C0 */
+#define CLK_EXT2F_A9 13
+
+#endif
--
1.9.1
^ permalink raw reply related [flat|nested] 23+ messages in thread* [RESEND PATCH 2/4] ARM: STi: DT: STiH407: 407 DT Entry for clockgen C0
@ 2014-08-25 14:44 ` Gabriel FERNANDEZ
0 siblings, 0 replies; 23+ messages in thread
From: Gabriel FERNANDEZ @ 2014-08-25 14:44 UTC (permalink / raw)
To: Srinivas Kandagatla, Maxime Coquelin, Patrice Chotard,
Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
Russell King, olof
Cc: linux-arm-kernel, kernel, devicetree, linux-kernel, Lee Jones,
Gabriel Fernandez, Olivier Bideau
Patch adds DT entries for clockgen C0
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
---
arch/arm/boot/dts/stih407-clock.dtsi | 94 ++++++++++++++++++++++++++++----
arch/arm/boot/dts/stih407.dtsi | 18 +++---
include/dt-bindings/clock/stih407-clks.h | 11 ++++
3 files changed, 103 insertions(+), 20 deletions(-)
create mode 100644 include/dt-bindings/clock/stih407-clks.h
diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
index e03e86e..85cc135 100644
--- a/arch/arm/boot/dts/stih407-clock.dtsi
+++ b/arch/arm/boot/dts/stih407-clock.dtsi
@@ -5,6 +5,7 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
+#include <dt-bindings/clock/stih407-clks.h>
/ {
clocks {
#address-cells = <1>;
@@ -30,17 +31,6 @@
};
/*
- * Bootloader initialized system infrastructure clock for
- * serial devices.
- */
- clk_ext2f_a9: clockgen-c0@13 {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <200000000>;
- clock-output-names = "clk-s-icn-reg-0";
- };
-
- /*
* ClockGenAs on SASG2
*/
clockgen-a@090ff000 {
@@ -67,5 +57,87 @@
clock-output-names = "clk-ic-lmi0";
};
};
+
+ clk_s_c0_quadfs: clk-s-c0-quadfs@9103000 {
+ #clock-cells = <1>;
+ compatible = "st,stih407-quadfs660-C", "st,quadfs";
+ reg = <0x9103000 0x1000>;
+
+ clocks = <&clk_sysin>;
+
+ clock-output-names = "clk-s-c0-fs0-ch0",
+ "clk-s-c0-fs0-ch1",
+ "clk-s-c0-fs0-ch2",
+ "clk-s-c0-fs0-ch3";
+ };
+
+ clk_s_c0: clockgen-c@09103000 {
+ compatible = "st,clkgen-c32";
+ reg = <0x9103000 0x1000>;
+
+ clk_s_c0_pll0: clk-s-c0-pll0 {
+ #clock-cells = <1>;
+ compatible = "st,stih407-plls-c32-c0_0", "st,clkgen-plls-c32";
+
+ clocks = <&clk_sysin>;
+
+ clock-output-names = "clk-s-c0-pll0-odf-0";
+ };
+
+ clk_s_c0_pll1: clk-s-c0-pll1 {
+ #clock-cells = <1>;
+ compatible = "st,stih407-plls-c32-c0_1", "st,clkgen-plls-c32";
+
+ clocks = <&clk_sysin>;
+
+ clock-output-names = "clk-s-c0-pll1-odf-0";
+ };
+
+ clk_s_c0_flexgen: clk-s-c0-flexgen {
+ #clock-cells = <1>;
+ compatible = "st,flexgen";
+
+ clocks = <&clk_s_c0_pll0 0>,
+ <&clk_s_c0_pll1 0>,
+ <&clk_s_c0_quadfs 0>,
+ <&clk_s_c0_quadfs 1>,
+ <&clk_s_c0_quadfs 2>,
+ <&clk_s_c0_quadfs 3>,
+ <&clk_sysin>;
+
+ clock-output-names = "clk-icn-gpu",
+ "clk-fdma",
+ "clk-nand",
+ "clk-hva",
+ "clk-proc-stfe",
+ "clk-proc-tp",
+ "clk-rx-icn-dmu",
+ "clk-rx-icn-hva",
+ "clk-icn-cpu",
+ "clk-tx-icn-dmu",
+ "clk-mmc-0",
+ "clk-mmc-1",
+ "clk-jpegdec",
+ "clk-ext2fa9",
+ "clk-ic-bdisp-0",
+ "clk-ic-bdisp-1",
+ "clk-pp-dmu",
+ "clk-vid-dmu",
+ "clk-dss-lpc",
+ "clk-st231-aud-0",
+ "clk-st231-gp-1",
+ "clk-st231-dmu",
+ "clk-icn-lmi",
+ "clk-tx-icn-disp-1",
+ "clk-icn-sbc",
+ "clk-stfe-frc2",
+ "clk-eth-phy",
+ "clk-eth-ref-phyclk",
+ "clk-flash-promip",
+ "clk-main-disp",
+ "clk-aux-disp",
+ "clk-compo-dvp";
+ };
+ };
};
};
diff --git a/arch/arm/boot/dts/stih407.dtsi b/arch/arm/boot/dts/stih407.dtsi
index 4f9024f..f539627 100644
--- a/arch/arm/boot/dts/stih407.dtsi
+++ b/arch/arm/boot/dts/stih407.dtsi
@@ -104,7 +104,7 @@
interrupts = <GIC_SPI 122 IRQ_TYPE_NONE>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_serial0>;
- clocks = <&clk_ext2f_a9>;
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
status = "disabled";
};
@@ -115,7 +115,7 @@
interrupts = <GIC_SPI 123 IRQ_TYPE_NONE>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_serial1>;
- clocks = <&clk_ext2f_a9>;
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
status = "disabled";
};
@@ -126,7 +126,7 @@
interrupts = <GIC_SPI 124 IRQ_TYPE_NONE>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_serial2>;
- clocks = <&clk_ext2f_a9>;
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
status = "disabled";
};
@@ -158,7 +158,7 @@
compatible = "st,comms-ssc4-i2c";
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x9840000 0x110>;
- clocks = <&clk_ext2f_a9>;
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
@@ -171,7 +171,7 @@
compatible = "st,comms-ssc4-i2c";
reg = <0x9841000 0x110>;
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_ext2f_a9>;
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
@@ -184,7 +184,7 @@
compatible = "st,comms-ssc4-i2c";
reg = <0x9842000 0x110>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_ext2f_a9>;
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
@@ -197,7 +197,7 @@
compatible = "st,comms-ssc4-i2c";
reg = <0x9843000 0x110>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_ext2f_a9>;
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
@@ -210,7 +210,7 @@
compatible = "st,comms-ssc4-i2c";
reg = <0x9844000 0x110>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_ext2f_a9>;
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
@@ -223,7 +223,7 @@
compatible = "st,comms-ssc4-i2c";
reg = <0x9845000 0x110>;
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_ext2f_a9>;
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
diff --git a/include/dt-bindings/clock/stih407-clks.h b/include/dt-bindings/clock/stih407-clks.h
new file mode 100644
index 0000000..1f9bfe0
--- /dev/null
+++ b/include/dt-bindings/clock/stih407-clks.h
@@ -0,0 +1,11 @@
+/*
+ * This header provides constants clk index STMicroelectronics
+ * STiH407 SoC.
+ */
+#ifndef _DT_BINDINGS_CLK_STIH407
+#define _DT_BINDINGS_CLK_STIH407
+
+/* CLOCKGEN C0 */
+#define CLK_EXT2F_A9 13
+
+#endif
--
1.9.1
^ permalink raw reply related [flat|nested] 23+ messages in thread* [RESEND PATCH 2/4] ARM: STi: DT: STiH407: 407 DT Entry for clockgen C0
@ 2014-08-25 14:44 ` Gabriel FERNANDEZ
0 siblings, 0 replies; 23+ messages in thread
From: Gabriel FERNANDEZ @ 2014-08-25 14:44 UTC (permalink / raw)
To: Srinivas Kandagatla, Maxime Coquelin, Patrice Chotard,
Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
Russell King, olof
Cc: devicetree, kernel, Olivier Bideau, linux-kernel,
linux-arm-kernel, Lee Jones, Gabriel Fernandez
Patch adds DT entries for clockgen C0
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
---
arch/arm/boot/dts/stih407-clock.dtsi | 94 ++++++++++++++++++++++++++++----
arch/arm/boot/dts/stih407.dtsi | 18 +++---
include/dt-bindings/clock/stih407-clks.h | 11 ++++
3 files changed, 103 insertions(+), 20 deletions(-)
create mode 100644 include/dt-bindings/clock/stih407-clks.h
diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
index e03e86e..85cc135 100644
--- a/arch/arm/boot/dts/stih407-clock.dtsi
+++ b/arch/arm/boot/dts/stih407-clock.dtsi
@@ -5,6 +5,7 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
+#include <dt-bindings/clock/stih407-clks.h>
/ {
clocks {
#address-cells = <1>;
@@ -30,17 +31,6 @@
};
/*
- * Bootloader initialized system infrastructure clock for
- * serial devices.
- */
- clk_ext2f_a9: clockgen-c0@13 {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <200000000>;
- clock-output-names = "clk-s-icn-reg-0";
- };
-
- /*
* ClockGenAs on SASG2
*/
clockgen-a@090ff000 {
@@ -67,5 +57,87 @@
clock-output-names = "clk-ic-lmi0";
};
};
+
+ clk_s_c0_quadfs: clk-s-c0-quadfs@9103000 {
+ #clock-cells = <1>;
+ compatible = "st,stih407-quadfs660-C", "st,quadfs";
+ reg = <0x9103000 0x1000>;
+
+ clocks = <&clk_sysin>;
+
+ clock-output-names = "clk-s-c0-fs0-ch0",
+ "clk-s-c0-fs0-ch1",
+ "clk-s-c0-fs0-ch2",
+ "clk-s-c0-fs0-ch3";
+ };
+
+ clk_s_c0: clockgen-c@09103000 {
+ compatible = "st,clkgen-c32";
+ reg = <0x9103000 0x1000>;
+
+ clk_s_c0_pll0: clk-s-c0-pll0 {
+ #clock-cells = <1>;
+ compatible = "st,stih407-plls-c32-c0_0", "st,clkgen-plls-c32";
+
+ clocks = <&clk_sysin>;
+
+ clock-output-names = "clk-s-c0-pll0-odf-0";
+ };
+
+ clk_s_c0_pll1: clk-s-c0-pll1 {
+ #clock-cells = <1>;
+ compatible = "st,stih407-plls-c32-c0_1", "st,clkgen-plls-c32";
+
+ clocks = <&clk_sysin>;
+
+ clock-output-names = "clk-s-c0-pll1-odf-0";
+ };
+
+ clk_s_c0_flexgen: clk-s-c0-flexgen {
+ #clock-cells = <1>;
+ compatible = "st,flexgen";
+
+ clocks = <&clk_s_c0_pll0 0>,
+ <&clk_s_c0_pll1 0>,
+ <&clk_s_c0_quadfs 0>,
+ <&clk_s_c0_quadfs 1>,
+ <&clk_s_c0_quadfs 2>,
+ <&clk_s_c0_quadfs 3>,
+ <&clk_sysin>;
+
+ clock-output-names = "clk-icn-gpu",
+ "clk-fdma",
+ "clk-nand",
+ "clk-hva",
+ "clk-proc-stfe",
+ "clk-proc-tp",
+ "clk-rx-icn-dmu",
+ "clk-rx-icn-hva",
+ "clk-icn-cpu",
+ "clk-tx-icn-dmu",
+ "clk-mmc-0",
+ "clk-mmc-1",
+ "clk-jpegdec",
+ "clk-ext2fa9",
+ "clk-ic-bdisp-0",
+ "clk-ic-bdisp-1",
+ "clk-pp-dmu",
+ "clk-vid-dmu",
+ "clk-dss-lpc",
+ "clk-st231-aud-0",
+ "clk-st231-gp-1",
+ "clk-st231-dmu",
+ "clk-icn-lmi",
+ "clk-tx-icn-disp-1",
+ "clk-icn-sbc",
+ "clk-stfe-frc2",
+ "clk-eth-phy",
+ "clk-eth-ref-phyclk",
+ "clk-flash-promip",
+ "clk-main-disp",
+ "clk-aux-disp",
+ "clk-compo-dvp";
+ };
+ };
};
};
diff --git a/arch/arm/boot/dts/stih407.dtsi b/arch/arm/boot/dts/stih407.dtsi
index 4f9024f..f539627 100644
--- a/arch/arm/boot/dts/stih407.dtsi
+++ b/arch/arm/boot/dts/stih407.dtsi
@@ -104,7 +104,7 @@
interrupts = <GIC_SPI 122 IRQ_TYPE_NONE>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_serial0>;
- clocks = <&clk_ext2f_a9>;
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
status = "disabled";
};
@@ -115,7 +115,7 @@
interrupts = <GIC_SPI 123 IRQ_TYPE_NONE>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_serial1>;
- clocks = <&clk_ext2f_a9>;
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
status = "disabled";
};
@@ -126,7 +126,7 @@
interrupts = <GIC_SPI 124 IRQ_TYPE_NONE>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_serial2>;
- clocks = <&clk_ext2f_a9>;
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
status = "disabled";
};
@@ -158,7 +158,7 @@
compatible = "st,comms-ssc4-i2c";
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x9840000 0x110>;
- clocks = <&clk_ext2f_a9>;
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
@@ -171,7 +171,7 @@
compatible = "st,comms-ssc4-i2c";
reg = <0x9841000 0x110>;
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_ext2f_a9>;
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
@@ -184,7 +184,7 @@
compatible = "st,comms-ssc4-i2c";
reg = <0x9842000 0x110>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_ext2f_a9>;
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
@@ -197,7 +197,7 @@
compatible = "st,comms-ssc4-i2c";
reg = <0x9843000 0x110>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_ext2f_a9>;
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
@@ -210,7 +210,7 @@
compatible = "st,comms-ssc4-i2c";
reg = <0x9844000 0x110>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_ext2f_a9>;
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
@@ -223,7 +223,7 @@
compatible = "st,comms-ssc4-i2c";
reg = <0x9845000 0x110>;
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_ext2f_a9>;
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
diff --git a/include/dt-bindings/clock/stih407-clks.h b/include/dt-bindings/clock/stih407-clks.h
new file mode 100644
index 0000000..1f9bfe0
--- /dev/null
+++ b/include/dt-bindings/clock/stih407-clks.h
@@ -0,0 +1,11 @@
+/*
+ * This header provides constants clk index STMicroelectronics
+ * STiH407 SoC.
+ */
+#ifndef _DT_BINDINGS_CLK_STIH407
+#define _DT_BINDINGS_CLK_STIH407
+
+/* CLOCKGEN C0 */
+#define CLK_EXT2F_A9 13
+
+#endif
--
1.9.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [RESEND PATCH 3/4] ARM: STi: DT: STiH407: 407 DT Entry for clockgen D0/D2/D3
2014-08-25 14:44 ` Gabriel FERNANDEZ
@ 2014-08-25 14:44 ` Gabriel FERNANDEZ
-1 siblings, 0 replies; 23+ messages in thread
From: Gabriel FERNANDEZ @ 2014-08-25 14:44 UTC (permalink / raw)
To: linux-arm-kernel
Patch adds DT entries for clockgen D0/D2/D3
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
---
arch/arm/boot/dts/stih407-clock.dtsi | 126 +++++++++++++++++++++++++++++++++++
1 file changed, 126 insertions(+)
diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
index 85cc135..6e59011 100644
--- a/arch/arm/boot/dts/stih407-clock.dtsi
+++ b/arch/arm/boot/dts/stih407-clock.dtsi
@@ -139,5 +139,131 @@
"clk-compo-dvp";
};
};
+
+ clk_s_d0_quadfs: clk-s-d0-quadfs at 9104000 {
+ #clock-cells = <1>;
+ compatible = "st,stih407-quadfs660-D", "st,quadfs";
+ reg = <0x9104000 0x1000>;
+
+ clocks = <&clk_sysin>;
+
+ clock-output-names = "clk-s-d0-fs0-ch0",
+ "clk-s-d0-fs0-ch1",
+ "clk-s-d0-fs0-ch2",
+ "clk-s-d0-fs0-ch3";
+ };
+
+ clockgen-d0 at 09104000 {
+ compatible = "st,clkgen-c32";
+ reg = <0x9104000 0x1000>;
+
+ clk_s_d0_flexgen: clk-s-d0-flexgen {
+ #clock-cells = <1>;
+ compatible = "st,flexgen";
+
+ clocks = <&clk_s_d0_quadfs 0>,
+ <&clk_s_d0_quadfs 1>,
+ <&clk_s_d0_quadfs 2>,
+ <&clk_s_d0_quadfs 3>,
+ <&clk_sysin>;
+
+ clock-output-names = "clk-pcm-0",
+ "clk-pcm-1",
+ "clk-pcm-2",
+ "clk-spdiff";
+ };
+ };
+
+ clk_s_d2_quadfs: clk-s-d2-quadfs at 9106000 {
+ #clock-cells = <1>;
+ compatible = "st,stih407-quadfs660-D", "st,quadfs";
+ reg = <0x9106000 0x1000>;
+
+ clocks = <&clk_sysin>;
+
+ clock-output-names = "clk-s-d2-fs0-ch0",
+ "clk-s-d2-fs0-ch1",
+ "clk-s-d2-fs0-ch2",
+ "clk-s-d2-fs0-ch3";
+ };
+
+ clk_tmdsout_hdmi: clk-tmdsout-hdmi {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <0>;
+ };
+
+ clockgen-d2 at x9106000 {
+ compatible = "st,clkgen-c32";
+ reg = <0x9106000 0x1000>;
+
+ clk_s_d2_flexgen: clk-s-d2-flexgen {
+ #clock-cells = <1>;
+ compatible = "st,flexgen";
+
+ clocks = <&clk_s_d2_quadfs 0>,
+ <&clk_s_d2_quadfs 1>,
+ <&clk_s_d2_quadfs 2>,
+ <&clk_s_d2_quadfs 3>,
+ <&clk_sysin>,
+ <&clk_sysin>,
+ <&clk_tmdsout_hdmi>;
+
+ clock-output-names = "clk-pix-main-disp",
+ "clk-pix-pip",
+ "clk-pix-gdp1",
+ "clk-pix-gdp2",
+ "clk-pix-gdp3",
+ "clk-pix-gdp4",
+ "clk-pix-aux-disp",
+ "clk-denc",
+ "clk-pix-hddac",
+ "clk-hddac",
+ "clk-sddac",
+ "clk-pix-dvo",
+ "clk-dvo",
+ "clk-pix-hdmi",
+ "",
+ "clk-ref-hdmiphy";
+ };
+ };
+
+ clk_s_d3_quadfs: clk-s-d3-quadfs at 9107000 {
+ #clock-cells = <1>;
+ compatible = "st,stih407-quadfs660-D", "st,quadfs";
+ reg = <0x9107000 0x1000>;
+
+ clocks = <&clk_sysin>;
+
+ clock-output-names = "clk-s-d3-fs0-ch0",
+ "clk-s-d3-fs0-ch1",
+ "clk-s-d3-fs0-ch2",
+ "clk-s-d3-fs0-ch3";
+ };
+
+ clockgen-d3 at 9107000 {
+ compatible = "st,clkgen-c32";
+ reg = <0x9107000 0x1000>;
+
+ clk_s_d3_flexgen: clk-s-d3-flexgen {
+ #clock-cells = <1>;
+ compatible = "st,flexgen";
+
+ clocks = <&clk_s_d3_quadfs 0>,
+ <&clk_s_d3_quadfs 1>,
+ <&clk_s_d3_quadfs 2>,
+ <&clk_s_d3_quadfs 3>,
+ <&clk_sysin>;
+
+ clock-output-names = "clk-stfe-frc1",
+ "clk-tsout-0",
+ "clk-tsout-1",
+ "clk-mchi",
+ "clk-vsens-compo",
+ "clk-frc1-remote",
+ "clk-lpc-0",
+ "clk-lpc-1";
+ };
+ };
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 23+ messages in thread* [RESEND PATCH 3/4] ARM: STi: DT: STiH407: 407 DT Entry for clockgen D0/D2/D3
@ 2014-08-25 14:44 ` Gabriel FERNANDEZ
0 siblings, 0 replies; 23+ messages in thread
From: Gabriel FERNANDEZ @ 2014-08-25 14:44 UTC (permalink / raw)
To: Srinivas Kandagatla, Maxime Coquelin, Patrice Chotard,
Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
Russell King, olof
Cc: linux-arm-kernel, kernel, devicetree, linux-kernel, Lee Jones,
Gabriel Fernandez, Olivier Bideau
Patch adds DT entries for clockgen D0/D2/D3
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
---
arch/arm/boot/dts/stih407-clock.dtsi | 126 +++++++++++++++++++++++++++++++++++
1 file changed, 126 insertions(+)
diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
index 85cc135..6e59011 100644
--- a/arch/arm/boot/dts/stih407-clock.dtsi
+++ b/arch/arm/boot/dts/stih407-clock.dtsi
@@ -139,5 +139,131 @@
"clk-compo-dvp";
};
};
+
+ clk_s_d0_quadfs: clk-s-d0-quadfs@9104000 {
+ #clock-cells = <1>;
+ compatible = "st,stih407-quadfs660-D", "st,quadfs";
+ reg = <0x9104000 0x1000>;
+
+ clocks = <&clk_sysin>;
+
+ clock-output-names = "clk-s-d0-fs0-ch0",
+ "clk-s-d0-fs0-ch1",
+ "clk-s-d0-fs0-ch2",
+ "clk-s-d0-fs0-ch3";
+ };
+
+ clockgen-d0@09104000 {
+ compatible = "st,clkgen-c32";
+ reg = <0x9104000 0x1000>;
+
+ clk_s_d0_flexgen: clk-s-d0-flexgen {
+ #clock-cells = <1>;
+ compatible = "st,flexgen";
+
+ clocks = <&clk_s_d0_quadfs 0>,
+ <&clk_s_d0_quadfs 1>,
+ <&clk_s_d0_quadfs 2>,
+ <&clk_s_d0_quadfs 3>,
+ <&clk_sysin>;
+
+ clock-output-names = "clk-pcm-0",
+ "clk-pcm-1",
+ "clk-pcm-2",
+ "clk-spdiff";
+ };
+ };
+
+ clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 {
+ #clock-cells = <1>;
+ compatible = "st,stih407-quadfs660-D", "st,quadfs";
+ reg = <0x9106000 0x1000>;
+
+ clocks = <&clk_sysin>;
+
+ clock-output-names = "clk-s-d2-fs0-ch0",
+ "clk-s-d2-fs0-ch1",
+ "clk-s-d2-fs0-ch2",
+ "clk-s-d2-fs0-ch3";
+ };
+
+ clk_tmdsout_hdmi: clk-tmdsout-hdmi {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <0>;
+ };
+
+ clockgen-d2@x9106000 {
+ compatible = "st,clkgen-c32";
+ reg = <0x9106000 0x1000>;
+
+ clk_s_d2_flexgen: clk-s-d2-flexgen {
+ #clock-cells = <1>;
+ compatible = "st,flexgen";
+
+ clocks = <&clk_s_d2_quadfs 0>,
+ <&clk_s_d2_quadfs 1>,
+ <&clk_s_d2_quadfs 2>,
+ <&clk_s_d2_quadfs 3>,
+ <&clk_sysin>,
+ <&clk_sysin>,
+ <&clk_tmdsout_hdmi>;
+
+ clock-output-names = "clk-pix-main-disp",
+ "clk-pix-pip",
+ "clk-pix-gdp1",
+ "clk-pix-gdp2",
+ "clk-pix-gdp3",
+ "clk-pix-gdp4",
+ "clk-pix-aux-disp",
+ "clk-denc",
+ "clk-pix-hddac",
+ "clk-hddac",
+ "clk-sddac",
+ "clk-pix-dvo",
+ "clk-dvo",
+ "clk-pix-hdmi",
+ "",
+ "clk-ref-hdmiphy";
+ };
+ };
+
+ clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 {
+ #clock-cells = <1>;
+ compatible = "st,stih407-quadfs660-D", "st,quadfs";
+ reg = <0x9107000 0x1000>;
+
+ clocks = <&clk_sysin>;
+
+ clock-output-names = "clk-s-d3-fs0-ch0",
+ "clk-s-d3-fs0-ch1",
+ "clk-s-d3-fs0-ch2",
+ "clk-s-d3-fs0-ch3";
+ };
+
+ clockgen-d3@9107000 {
+ compatible = "st,clkgen-c32";
+ reg = <0x9107000 0x1000>;
+
+ clk_s_d3_flexgen: clk-s-d3-flexgen {
+ #clock-cells = <1>;
+ compatible = "st,flexgen";
+
+ clocks = <&clk_s_d3_quadfs 0>,
+ <&clk_s_d3_quadfs 1>,
+ <&clk_s_d3_quadfs 2>,
+ <&clk_s_d3_quadfs 3>,
+ <&clk_sysin>;
+
+ clock-output-names = "clk-stfe-frc1",
+ "clk-tsout-0",
+ "clk-tsout-1",
+ "clk-mchi",
+ "clk-vsens-compo",
+ "clk-frc1-remote",
+ "clk-lpc-0",
+ "clk-lpc-1";
+ };
+ };
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [RESEND PATCH 4/4] ARM: STi: DT: STiH407: 407 DT Entry for clockgenA9
2014-08-25 14:44 ` Gabriel FERNANDEZ
(?)
@ 2014-08-25 14:44 ` Gabriel FERNANDEZ
-1 siblings, 0 replies; 23+ messages in thread
From: Gabriel FERNANDEZ @ 2014-08-25 14:44 UTC (permalink / raw)
To: linux-arm-kernel
Patch adds DT entries for clockgen A9
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
---
arch/arm/boot/dts/stih407-clock.dtsi | 55 ++++++++++++++++++++++++++++++++++--
1 file changed, 52 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
index 6e59011..b4318e1 100644
--- a/arch/arm/boot/dts/stih407-clock.dtsi
+++ b/arch/arm/boot/dts/stih407-clock.dtsi
@@ -24,10 +24,59 @@
/*
* ARM Peripheral clock for timers
*/
- arm_periph_clk: arm-periph-clk {
+ arm_periph_clk: clk-m-a9-periphs {
#clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <600000000>;
+ compatible = "fixed-factor-clock";
+
+ clocks = <&clk_m_a9>;
+ clock-div = <2>;
+ clock-mult = <1>;
+ };
+
+ /*
+ * A9 PLL.
+ */
+ clockgen-a9 at 92b0000 {
+ compatible = "st,clkgen-c32";
+ reg = <0x92b0000 0xffff>;
+
+ clockgen_a9_pll: clockgen-a9-pll {
+ #clock-cells = <1>;
+ compatible = "st,stih407-plls-c32-a9", "st,clkgen-plls-c32";
+
+ clocks = <&clk_sysin>;
+
+ clock-output-names = "clockgen-a9-pll-odf";
+ };
+ };
+
+ /*
+ * ARM CPU related clocks.
+ */
+ clk_m_a9: clk-m-a9 at 92b0000 {
+ #clock-cells = <0>;
+ compatible = "st,stih407-clkgen-a9-mux", "st,clkgen-mux";
+ reg = <0x92b0000 0x10000>;
+
+ clocks = <&clockgen_a9_pll 0>,
+ <&clockgen_a9_pll 0>,
+ <&clk_s_c0_flexgen 13>,
+ <&clk_m_a9_ext2f_div2>;
+ };
+
+ /*
+ * ARM Peripheral clock for timers
+ */
+ clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {
+ #clock-cells = <0>;
+ compatible = "fixed-factor-clock";
+
+ clocks = <&clk_s_c0_flexgen 13>;
+
+ clock-output-names = "clk-m-a9-ext2f-div2";
+
+ clock-div = <2>;
+ clock-mult = <1>;
};
/*
--
1.9.1
^ permalink raw reply related [flat|nested] 23+ messages in thread* [RESEND PATCH 4/4] ARM: STi: DT: STiH407: 407 DT Entry for clockgenA9
@ 2014-08-25 14:44 ` Gabriel FERNANDEZ
0 siblings, 0 replies; 23+ messages in thread
From: Gabriel FERNANDEZ @ 2014-08-25 14:44 UTC (permalink / raw)
To: Srinivas Kandagatla, Maxime Coquelin, Patrice Chotard,
Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
Russell King, olof
Cc: linux-arm-kernel, kernel, devicetree, linux-kernel, Lee Jones,
Gabriel Fernandez, Olivier Bideau
Patch adds DT entries for clockgen A9
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
---
arch/arm/boot/dts/stih407-clock.dtsi | 55 ++++++++++++++++++++++++++++++++++--
1 file changed, 52 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
index 6e59011..b4318e1 100644
--- a/arch/arm/boot/dts/stih407-clock.dtsi
+++ b/arch/arm/boot/dts/stih407-clock.dtsi
@@ -24,10 +24,59 @@
/*
* ARM Peripheral clock for timers
*/
- arm_periph_clk: arm-periph-clk {
+ arm_periph_clk: clk-m-a9-periphs {
#clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <600000000>;
+ compatible = "fixed-factor-clock";
+
+ clocks = <&clk_m_a9>;
+ clock-div = <2>;
+ clock-mult = <1>;
+ };
+
+ /*
+ * A9 PLL.
+ */
+ clockgen-a9@92b0000 {
+ compatible = "st,clkgen-c32";
+ reg = <0x92b0000 0xffff>;
+
+ clockgen_a9_pll: clockgen-a9-pll {
+ #clock-cells = <1>;
+ compatible = "st,stih407-plls-c32-a9", "st,clkgen-plls-c32";
+
+ clocks = <&clk_sysin>;
+
+ clock-output-names = "clockgen-a9-pll-odf";
+ };
+ };
+
+ /*
+ * ARM CPU related clocks.
+ */
+ clk_m_a9: clk-m-a9@92b0000 {
+ #clock-cells = <0>;
+ compatible = "st,stih407-clkgen-a9-mux", "st,clkgen-mux";
+ reg = <0x92b0000 0x10000>;
+
+ clocks = <&clockgen_a9_pll 0>,
+ <&clockgen_a9_pll 0>,
+ <&clk_s_c0_flexgen 13>,
+ <&clk_m_a9_ext2f_div2>;
+ };
+
+ /*
+ * ARM Peripheral clock for timers
+ */
+ clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {
+ #clock-cells = <0>;
+ compatible = "fixed-factor-clock";
+
+ clocks = <&clk_s_c0_flexgen 13>;
+
+ clock-output-names = "clk-m-a9-ext2f-div2";
+
+ clock-div = <2>;
+ clock-mult = <1>;
};
/*
--
1.9.1
^ permalink raw reply related [flat|nested] 23+ messages in thread* [RESEND PATCH 4/4] ARM: STi: DT: STiH407: 407 DT Entry for clockgenA9
@ 2014-08-25 14:44 ` Gabriel FERNANDEZ
0 siblings, 0 replies; 23+ messages in thread
From: Gabriel FERNANDEZ @ 2014-08-25 14:44 UTC (permalink / raw)
To: Srinivas Kandagatla, Maxime Coquelin, Patrice Chotard,
Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
Russell King, olof
Cc: devicetree, kernel, Olivier Bideau, linux-kernel,
linux-arm-kernel, Lee Jones, Gabriel Fernandez
Patch adds DT entries for clockgen A9
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
---
arch/arm/boot/dts/stih407-clock.dtsi | 55 ++++++++++++++++++++++++++++++++++--
1 file changed, 52 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
index 6e59011..b4318e1 100644
--- a/arch/arm/boot/dts/stih407-clock.dtsi
+++ b/arch/arm/boot/dts/stih407-clock.dtsi
@@ -24,10 +24,59 @@
/*
* ARM Peripheral clock for timers
*/
- arm_periph_clk: arm-periph-clk {
+ arm_periph_clk: clk-m-a9-periphs {
#clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <600000000>;
+ compatible = "fixed-factor-clock";
+
+ clocks = <&clk_m_a9>;
+ clock-div = <2>;
+ clock-mult = <1>;
+ };
+
+ /*
+ * A9 PLL.
+ */
+ clockgen-a9@92b0000 {
+ compatible = "st,clkgen-c32";
+ reg = <0x92b0000 0xffff>;
+
+ clockgen_a9_pll: clockgen-a9-pll {
+ #clock-cells = <1>;
+ compatible = "st,stih407-plls-c32-a9", "st,clkgen-plls-c32";
+
+ clocks = <&clk_sysin>;
+
+ clock-output-names = "clockgen-a9-pll-odf";
+ };
+ };
+
+ /*
+ * ARM CPU related clocks.
+ */
+ clk_m_a9: clk-m-a9@92b0000 {
+ #clock-cells = <0>;
+ compatible = "st,stih407-clkgen-a9-mux", "st,clkgen-mux";
+ reg = <0x92b0000 0x10000>;
+
+ clocks = <&clockgen_a9_pll 0>,
+ <&clockgen_a9_pll 0>,
+ <&clk_s_c0_flexgen 13>,
+ <&clk_m_a9_ext2f_div2>;
+ };
+
+ /*
+ * ARM Peripheral clock for timers
+ */
+ clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {
+ #clock-cells = <0>;
+ compatible = "fixed-factor-clock";
+
+ clocks = <&clk_s_c0_flexgen 13>;
+
+ clock-output-names = "clk-m-a9-ext2f-div2";
+
+ clock-div = <2>;
+ clock-mult = <1>;
};
/*
--
1.9.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [RESEND PATCH 0/4] Enables STMicroelectronics Flexgen Clock support
@ 2014-09-23 7:43 ` Maxime Coquelin
0 siblings, 0 replies; 23+ messages in thread
From: Maxime Coquelin @ 2014-09-23 7:43 UTC (permalink / raw)
To: linux-arm-kernel
Hi Gabi,
Series applied to sti-dt-for-v3.18.
Thanks!
Maxime
On 08/25/2014 04:44 PM, Gabriel FERNANDEZ wrote:
> These patches enables clock drivers for STih407 boards.
>
> Gabriel Fernandez (4):
> ARM: STi: DT: STiH407: 407 DT Entry for clockgen A0
> ARM: STi: DT: STiH407: 407 DT Entry for clockgen C0
> ARM: STi: DT: STiH407: 407 DT Entry for clockgen D0/D2/D3
> ARM: STi: DT: STiH407: 407 DT Entry for clockgenA9
>
> arch/arm/boot/dts/stih407-clock.dtsi | 295 ++++++++++++++++++++++++++++++-
> arch/arm/boot/dts/stih407.dtsi | 18 +-
> include/dt-bindings/clock/stih407-clks.h | 11 ++
> 3 files changed, 307 insertions(+), 17 deletions(-)
> create mode 100644 include/dt-bindings/clock/stih407-clks.h
>
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [RESEND PATCH 0/4] Enables STMicroelectronics Flexgen Clock support
@ 2014-09-23 7:43 ` Maxime Coquelin
0 siblings, 0 replies; 23+ messages in thread
From: Maxime Coquelin @ 2014-09-23 7:43 UTC (permalink / raw)
To: Gabriel FERNANDEZ, Srinivas Kandagatla, Patrice Chotard,
Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
Russell King, olof
Cc: linux-arm-kernel, kernel, devicetree, linux-kernel, Lee Jones,
Gabriel Fernandez
Hi Gabi,
Series applied to sti-dt-for-v3.18.
Thanks!
Maxime
On 08/25/2014 04:44 PM, Gabriel FERNANDEZ wrote:
> These patches enables clock drivers for STih407 boards.
>
> Gabriel Fernandez (4):
> ARM: STi: DT: STiH407: 407 DT Entry for clockgen A0
> ARM: STi: DT: STiH407: 407 DT Entry for clockgen C0
> ARM: STi: DT: STiH407: 407 DT Entry for clockgen D0/D2/D3
> ARM: STi: DT: STiH407: 407 DT Entry for clockgenA9
>
> arch/arm/boot/dts/stih407-clock.dtsi | 295 ++++++++++++++++++++++++++++++-
> arch/arm/boot/dts/stih407.dtsi | 18 +-
> include/dt-bindings/clock/stih407-clks.h | 11 ++
> 3 files changed, 307 insertions(+), 17 deletions(-)
> create mode 100644 include/dt-bindings/clock/stih407-clks.h
>
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [RESEND PATCH 0/4] Enables STMicroelectronics Flexgen Clock support
@ 2014-09-23 7:43 ` Maxime Coquelin
0 siblings, 0 replies; 23+ messages in thread
From: Maxime Coquelin @ 2014-09-23 7:43 UTC (permalink / raw)
To: Gabriel FERNANDEZ, Srinivas Kandagatla, Patrice Chotard,
Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
Russell King, olof-nZhT3qVonbNeoWH0uzbU5w
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
kernel-F5mvAk5X5gdBDgjK7y7TUQ, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Lee Jones, Gabriel Fernandez
Hi Gabi,
Series applied to sti-dt-for-v3.18.
Thanks!
Maxime
On 08/25/2014 04:44 PM, Gabriel FERNANDEZ wrote:
> These patches enables clock drivers for STih407 boards.
>
> Gabriel Fernandez (4):
> ARM: STi: DT: STiH407: 407 DT Entry for clockgen A0
> ARM: STi: DT: STiH407: 407 DT Entry for clockgen C0
> ARM: STi: DT: STiH407: 407 DT Entry for clockgen D0/D2/D3
> ARM: STi: DT: STiH407: 407 DT Entry for clockgenA9
>
> arch/arm/boot/dts/stih407-clock.dtsi | 295 ++++++++++++++++++++++++++++++-
> arch/arm/boot/dts/stih407.dtsi | 18 +-
> include/dt-bindings/clock/stih407-clks.h | 11 ++
> 3 files changed, 307 insertions(+), 17 deletions(-)
> create mode 100644 include/dt-bindings/clock/stih407-clks.h
>
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^ permalink raw reply [flat|nested] 23+ messages in thread