Re: [PATCH v3 0/5] enhance DMA CMA on x86

[Peter Hurley <peter-WaGBZJeGNqdsbIuE7sb01tBPR1lH4CV8@public.gmane.org>]

On 09/27/2014 08:31 PM, Akinobu Mita wrote:
> 2014-09-27 23:30 GMT+09:00 Peter Hurley <peter-WaGBZJeGNqdsbIuE7sb01tBPR1lH4CV8@public.gmane.org>:
>> On 04/15/2014 09:08 AM, Akinobu Mita wrote:
>>> This patch set enhances the DMA Contiguous Memory Allocator on x86.

[...]

>> What this patchset does is restrict all iommu configurations which can
>> map all of system memory to one _very_ small physical region, thus disabling
>> the whole point of an iommu.
>>
>> Now I know why my GPU is causing paging to disk! And why my RAID controller
>> stalls for ages when I do a git log at the same time as a kernel build!
> 
> The solution I have for this is that instead of trying to
> dma_alloc_from_contiguous() firstly, call alloc_pages() in dma_alloc_coherent().
> dma_alloc_from_contiguous() should be called only when alloc_pages() is failed
> or DMA_ATTR_FORCE_CONTIGUOUS is specified in dma_attr.

Why is all this extra complexity being added when there are no X86 users
of DMA_ATTR_FORCE_CONTIGUOUS?


>> And the apparent goal of this patchset is to enable DMA allocation below
>> 4GB, which is already supported in the existing page allocator with the
>> GFP_DMA32 flag?!
> 
> The goal of this patchset is to enable huge DMA allocation which
> alloc_pages() can't (> MAX_ORDER) for the devices that require it.

What x86 devices need > MAX_ORDER DMA allocation and why can't they allocate
directly from dma_alloc_from_contiguous()?

Regards,
Peter Hurley