From: Richard Henderson <rth@twiddle.net>
To: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: Re: [Qemu-devel] [PATCH v2 5/5] target-tricore: Add instructions of BO opcode format
Date: Wed, 01 Oct 2014 09:02:06 -0700 [thread overview]
Message-ID: <542C257E.80309@twiddle.net> (raw)
In-Reply-To: <1412156136-28899-6-git-send-email-kbastian@mail.uni-paderborn.de>
On 10/01/2014 02:35 AM, Bastian Koppelmann wrote:
> + case OPC2_32_BO_ST_A_PREINC:
> + tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);
> + tcg_gen_qemu_st_tl(cpu_gpr_a[r1], cpu_gpr_a[r2], ctx->mem_idx,
> + MO_LESL);
> + break;
The writeback to A[r2] should not happen until after the memory operation, so
that if a memory exception occurs, A[r2] is not adjusted.
r~
prev parent reply other threads:[~2014-10-01 16:02 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-01 9:35 [Qemu-devel] [PATCH v2 0/5] Add TriCore ABS, ABSB, B, BIT, BO instructions Bastian Koppelmann
2014-10-01 9:35 ` [Qemu-devel] [PATCH v2 1/5] target-tricore: Cleanup and Bugfixes Bastian Koppelmann
2014-10-01 9:35 ` [Qemu-devel] [PATCH v2 2/5] target-tricore: Add instructions of ABS, ABSB opcode format Bastian Koppelmann
2014-10-01 15:46 ` Richard Henderson
2014-10-01 9:35 ` [Qemu-devel] [PATCH v2 3/5] target-tricore: Add instructions of B " Bastian Koppelmann
2014-10-01 9:35 ` [Qemu-devel] [PATCH v2 4/5] target-tricore: Add instructions of BIT " Bastian Koppelmann
2014-10-01 15:51 ` Richard Henderson
2014-10-01 9:35 ` [Qemu-devel] [PATCH v2 5/5] target-tricore: Add instructions of BO " Bastian Koppelmann
2014-10-01 16:02 ` Richard Henderson [this message]
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