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From: York Sun <yorksun@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] Commit 294b91a5817147d4b7f47be2ac69bac2a1f26491 broke mpc85xx
Date: Wed, 1 Oct 2014 20:29:10 -0700	[thread overview]
Message-ID: <542CC686.9090208@freescale.com> (raw)
In-Reply-To: <1412216135.13320.388.camel@snotra.buserror.net>

On 10/01/2014 07:15 PM, Scott Wood wrote:
>>
>> I can change init sequence as far as I put initr_unlock_ram_in_cache before
>> initr_malloc, T4240QDS still boots.
> 
> Yes, we shouldn't have any reason to keep the cache locked that long.
> 
>> I examine the code but don't understand why I have to do so. P4080DS doesn't
>> suffer this issue. I am going to seek some help from Scott and other in-house
>> experts.
> 
> My guess is that it has to do with the way caches work on e6500.  We try
> to lock lines in L1, but L1 can't hold dirty lines, so perhaps the hang
> comes when the DDR activity evicts the dirty lines from L2 (where they
> weren't locked).
> 

Scott,

Thanks for looking into this. I can propose a fix, but first I will have to do a
thorough test on all varieties of 85xx board we have.

York

      reply	other threads:[~2014-10-02  3:29 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-10-01  4:06 [U-Boot] Commit 294b91a5817147d4b7f47be2ac69bac2a1f26491 broke mpc85xx York Sun
2014-10-01 15:11 ` Simon Glass
2014-10-01 16:27   ` York Sun
2014-10-01 16:37     ` Simon Glass
2014-10-01 16:52       ` York Sun
2014-10-01 18:01         ` Simon Glass
2014-10-01 18:25           ` York Sun
2014-10-02  2:15     ` Scott Wood
2014-10-02  3:29       ` York Sun [this message]

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