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From: Razvan Cojocaru <rcojocaru@bitdefender.com>
To: Tamas K Lengyel <tamas.lengyel@zentific.com>
Cc: "xen-devel@lists.xen.org" <xen-devel@lists.xen.org>
Subject: Re: Blocking CR and MSR writes via mem_access?
Date: Fri, 03 Oct 2014 15:42:30 +0300	[thread overview]
Message-ID: <542E99B6.2090100@bitdefender.com> (raw)
In-Reply-To: <CAErYnsisDLsi6ZZateJNEQSrF7x=vp-5FXAo24rgg43-TKKtBw@mail.gmail.com>

On 10/03/14 15:32, Tamas K Lengyel wrote:
> 
> On Thu, Oct 2, 2014 at 12:49 PM, Razvan Cojocaru
> <rcojocaru@bitdefender.com <mailto:rcojocaru@bitdefender.com>> wrote:
> 
>     Hello,
> 
>     Currently hvm_memory_event_cr3() and the other hvm_memory_event_*()
>     functions in hvm.c can pause the VCPU and send a mem_event with the new
>     value of the respective register, but especially in the case of CR
>     events (as opposed to MSR events), this is done _after_ the value is set
>     (please see hvm_set_cr3() in hvm.c).
> 
>     It would be interesting from a memory introspection application's point
>     of view to be able to receive a mem_event _before_ the value is set, and
>     important to be able to veto the change.
> 
>     A few questions:
> 
>     1. Would it be acceptable to move the CR3 event sending code so that a
>     mem_access client would receive the event _before_ the write takes
>     place? Is this likely to break other mem_event clients that might rely
>     on the event being received _after_ the value has been set?
> 
>  
> Yes, it would break existing applications.

Hello Tamas, thanks for the reply! I was hoping to hear from a fellow
mem_event user. :)

Noted, as per your (and Jan's) suggestion, I won't touch the existing CR
events.

>     2. I see that mem_event responses from all these cases (EPT violations,
>     CR, MSR) are handled in p2m.c's p2m_mem_access_resume() (seems to be
>     confirmed by testing). Is this correct?
> 
>     3. What would be the sanest, most elegant way to modify Xen so that
>     after a mem_event reply is being received for one of these cases (CR,
>     MSR), the write will then be rejected? I'm asking because, as always,
>     ideally this would also benefit other Xen users and an elegant patch is
>     always more likely to find its way into mainline than a quick hack.
> 
> 
> You can already block such writes with the existing post-write event
> delivery. If you are continuously watching for writes, you know what the
> previous value was (for CR events it is actually delivered to you by Xen
> as well as per my recent patch). If you don't like a particular new
> value that was set, just reset it to the value you had / want.

Indeed, thanks for the idea! I was thinking doing that (rather than than
just rejecting a pre-write event) might impact performance, but for one
your solution is more elegant (doesn't duplicate CR events), and I don't
think there would be many instances of when the value needs to be
changed back anyway.


Thanks,
Razvan Cojocaru

      parent reply	other threads:[~2014-10-03 12:42 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-10-02 10:49 Blocking CR and MSR writes via mem_access? Razvan Cojocaru
2014-10-02 11:39 ` Jan Beulich
2014-10-02 11:46   ` Razvan Cojocaru
2014-10-02 11:51     ` Andrew Cooper
2014-10-02 11:54       ` Razvan Cojocaru
2014-10-02 11:51     ` Jan Beulich
2014-10-02 12:04       ` Razvan Cojocaru
2014-10-03 12:32 ` Tamas K Lengyel
2014-10-03 12:37   ` Andrew Cooper
2014-10-03 13:00     ` Razvan Cojocaru
2014-10-03 16:22     ` Tamas K Lengyel
2014-10-03 18:13       ` Razvan Cojocaru
2014-10-06 14:25       ` Razvan Cojocaru
2014-10-07  8:59         ` Tamas K Lengyel
2014-10-07 10:21           ` Razvan Cojocaru
2014-10-07 10:48             ` Razvan Cojocaru
2014-10-07 12:30               ` Tamas K Lengyel
2014-10-07 12:40                 ` Jan Beulich
2014-10-07 12:46                   ` Tamas K Lengyel
2014-10-07 12:49                     ` Andrew Cooper
2014-10-07 12:55                       ` Razvan Cojocaru
2014-10-07 12:58                         ` Tamas K Lengyel
2014-10-07 13:06                           ` Razvan Cojocaru
2014-10-07 12:48                   ` Razvan Cojocaru
2014-10-27 16:10         ` Razvan Cojocaru
2014-10-03 12:42   ` Razvan Cojocaru [this message]

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