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From: sebastian.hesselbarth@gmail.com (Sebastian Hesselbarth)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM: mvebu: Fix the Aurora L2 cache node with the required cache-unified property
Date: Mon, 06 Oct 2014 12:35:41 +0200	[thread overview]
Message-ID: <5432707D.6050703@gmail.com> (raw)
In-Reply-To: <1412588276-4514-1-git-send-email-gregory.clement@free-electrons.com>

On 10/06/2014 11:37 AM, Gregory CLEMENT wrote:
> The L2 cache controller on the Armada 370 and Armada XP SoCs is a
> unified cache. Moreover, the Aurora cache controller is compatible
> with the L2x0 cache controller: the "cache-unified" property is
> required by its binding.
>
> This patch fixes the Aurora L2 cache node for the Armada 370 and
> Armada XP SoCs by adding this property.
>
> Reported-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

Thanks for the quick patch!

Sebastian

> ---
>   arch/arm/boot/dts/armada-370.dtsi | 1 +
>   arch/arm/boot/dts/armada-xp.dtsi  | 1 +
>   2 files changed, 2 insertions(+)
>
> diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
> index 21b588b6f6bd..095ae7e1d8c7 100644
> --- a/arch/arm/boot/dts/armada-370.dtsi
> +++ b/arch/arm/boot/dts/armada-370.dtsi
> @@ -95,6 +95,7 @@
>   				compatible = "marvell,aurora-outer-cache";
>   				reg = <0x08000 0x1000>;
>   				cache-id-part = <0x100>;
> +				cache-unified;
>   				wt-override;
>   			};
>
> diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
> index bff9f6c18db1..e1707133ee18 100644
> --- a/arch/arm/boot/dts/armada-xp.dtsi
> +++ b/arch/arm/boot/dts/armada-xp.dtsi
> @@ -39,6 +39,7 @@
>   				compatible = "marvell,aurora-system-cache";
>   				reg = <0x08000 0x1000>;
>   				cache-id-part = <0x100>;
> +				cache-unified;
>   				wt-override;
>   			};
>
>

WARNING: multiple messages have this Message-ID (diff)
From: Sebastian Hesselbarth <sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Gregory CLEMENT
	<gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
	Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org>,
	Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>
Cc: Thomas Petazzoni
	<thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
	Ezequiel Garcia
	<ezequiel.garcia-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	Lior Amsalem <alior-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>,
	Tawfik Bayouk <tawfik-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>,
	Nadav Haklai <nadavh-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>,
	Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH] ARM: mvebu: Fix the Aurora L2 cache node with the required cache-unified property
Date: Mon, 06 Oct 2014 12:35:41 +0200	[thread overview]
Message-ID: <5432707D.6050703@gmail.com> (raw)
In-Reply-To: <1412588276-4514-1-git-send-email-gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>

On 10/06/2014 11:37 AM, Gregory CLEMENT wrote:
> The L2 cache controller on the Armada 370 and Armada XP SoCs is a
> unified cache. Moreover, the Aurora cache controller is compatible
> with the L2x0 cache controller: the "cache-unified" property is
> required by its binding.
>
> This patch fixes the Aurora L2 cache node for the Armada 370 and
> Armada XP SoCs by adding this property.
>
> Reported-by: Sebastian Hesselbarth <sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> Signed-off-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>

Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

Thanks for the quick patch!

Sebastian

> ---
>   arch/arm/boot/dts/armada-370.dtsi | 1 +
>   arch/arm/boot/dts/armada-xp.dtsi  | 1 +
>   2 files changed, 2 insertions(+)
>
> diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
> index 21b588b6f6bd..095ae7e1d8c7 100644
> --- a/arch/arm/boot/dts/armada-370.dtsi
> +++ b/arch/arm/boot/dts/armada-370.dtsi
> @@ -95,6 +95,7 @@
>   				compatible = "marvell,aurora-outer-cache";
>   				reg = <0x08000 0x1000>;
>   				cache-id-part = <0x100>;
> +				cache-unified;
>   				wt-override;
>   			};
>
> diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
> index bff9f6c18db1..e1707133ee18 100644
> --- a/arch/arm/boot/dts/armada-xp.dtsi
> +++ b/arch/arm/boot/dts/armada-xp.dtsi
> @@ -39,6 +39,7 @@
>   				compatible = "marvell,aurora-system-cache";
>   				reg = <0x08000 0x1000>;
>   				cache-id-part = <0x100>;
> +				cache-unified;
>   				wt-override;
>   			};
>
>

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  reply	other threads:[~2014-10-06 10:35 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-10-06  9:37 [PATCH] ARM: mvebu: Fix the Aurora L2 cache node with the required cache-unified property Gregory CLEMENT
2014-10-06  9:37 ` Gregory CLEMENT
2014-10-06 10:35 ` Sebastian Hesselbarth [this message]
2014-10-06 10:35   ` Sebastian Hesselbarth
2014-11-01 22:39 ` Jason Cooper
2014-11-01 22:39   ` Jason Cooper

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