From: Thor Thayer <tthayer@opensource.altera.com>
To: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Cc: <broonie@kernel.org>, <jkosina@suse.cz>, <pawel.moll@arm.com>,
<robh+dt@kernel.org>, <mark.rutland@arm.com>,
<ijc+devicetree@hellion.org.uk>, <galak@codeaurora.org>,
<dinguyen@opensource.altera.com>, <linux-spi@vger.kernel.org>,
<linux-doc@vger.kernel.org>, <devicetree@vger.kernel.org>,
<tthayer.linux@gmail.com>, <tthayer@altera.com>,
<axel.lin@ingics.com>, <baruch@tkos.co.il>,
<andriy.shevchenko@linux.intel.com>
Subject: Re: [PATCH 2/2] arm: dts: socfpga: Add SPI nodes & update copyright.
Date: Tue, 7 Oct 2014 15:55:54 -0500 [thread overview]
Message-ID: <5434535A.9070101@opensource.altera.com> (raw)
In-Reply-To: <20141007203123.GA15799@pengutronix.de>
On 10/07/2014 03:31 PM, Steffen Trumtrar wrote:
> Hi!
>
> On Tue, Oct 07, 2014 at 02:48:17PM -0500, tthayer@opensource.altera.com wrote:
>> From: Thor Thayer <tthayer@opensource.altera.com>
>>
>> Add 2 SPI nodes to SOCFPGA device tree. Update copyright.
>> Update spi-dw.txt with bus-num as an optional property.
>>
>> Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
>> ---
>> Documentation/devicetree/bindings/spi/spi-dw.txt | 1 +
>> arch/arm/boot/dts/socfpga.dtsi | 52 ++++++++++++++++++----
>> 2 files changed, 45 insertions(+), 8 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/spi/spi-dw.txt b/Documentation/devicetree/bindings/spi/spi-dw.txt
>> index 7b63ed6..f1d54e6 100644
>> --- a/Documentation/devicetree/bindings/spi/spi-dw.txt
>> +++ b/Documentation/devicetree/bindings/spi/spi-dw.txt
>> @@ -11,6 +11,7 @@ Required properties:
>>
>> Optional properties:
>> - cs-gpios: see spi-bus.txt
>> +- bus-num: see spi-bus.txt
>>
>> Example:
>>
>> diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
>> index 4d77ad6..42855bc 100644
>> --- a/arch/arm/boot/dts/socfpga.dtsi
>> +++ b/arch/arm/boot/dts/socfpga.dtsi
>> @@ -1,15 +1,14 @@
>> /*
>> - * Copyright (C) 2012 Altera <www.altera.com>
>> + * Copyright Altera Corporation (C) 2012-2014. All rights reserved.
>> *
>> * This program is free software; you can redistribute it and/or modify
>> - * it under the terms of the GNU General Public License as published by
>> - * the Free Software Foundation; either version 2 of the License, or
>> - * (at your option) any later version.
>> + * it under the terms and conditions of the GNU General Public License,
>> + * version 2, as published by the Free Software Foundation.
>> *
>> - * This program is distributed in the hope that it will be useful,
>> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> - * GNU General Public License for more details.
>> + * This program is distributed in the hope it will be useful, but WITHOUT
>> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
>> + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
>> + * more details.
> This shouldn't be in the same patch IMHO.
Hi Steffen,
Are you saying the socfpga.dtsi changes shouldn't be in the patch or the
copyright update?
If the copyright update, it seemed like a good time since there were
other changes.
>> *
>> * You should have received a copy of the GNU General Public License
>> * along with this program. If not, see <http://www.gnu.org/licenses/>.
>> @@ -628,6 +627,43 @@
>> clock-names = "biu", "ciu";
>> };
>>
>> + spi0: spi@fff00000 {
>> + compatible = "snps,dw-apb-ssi";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + reg = <0xfff00000 0x1000>;
>> + interrupts = <0 154 4>;
>> + num-cs = <4>;
>> + bus-num = <0>;
>> + clocks = <&per_base_clk>;
>> +
>> + spidev@0 {
>> + compatible = "spidev";
>> + reg = <0>; /* chip select */
>> + spi-max-frequency = <100000000>;
>> + enable-dma = <1>;
>> + };
>> + };
>> +
>> + spi1: spi@fff01000 {
>> + compatible = "snps,dw-apb-ssi";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + reg = <0xfff01000 0x1000>;
>> + interrupts = <0 156 4>;
>> + num-cs = <4>;
>> + bus-num = <1>;
>> + clocks = <&per_base_clk>;
>> + status = "disabled";
>> +
>> + spidev@0 {
>> + compatible = "spidev";
>> + reg = <0>;
>> + spi-max-frequency = <100000000>;
>> + enable-dma = <1>;
>> + };
>> + };
>> +
> I don't think, this is the right place. Put it in the board dts.
> Oh, and why is spi0 not disabled but spi1 is?
OK. I can put it in the board dts. I thought the IP would go in the
socfpga.dtsi file since it describes the chip.
I understand your point which is why the 2nd SPI is disabled - it is not
pinned out on the Development Kit board.
Thanks,
Thor
>
> Regards,
> Steffen
>
WARNING: multiple messages have this Message-ID (diff)
From: Thor Thayer <tthayer@opensource.altera.com>
To: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Cc: broonie@kernel.org, jkosina@suse.cz, pawel.moll@arm.com,
robh+dt@kernel.org, mark.rutland@arm.com,
ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
dinguyen@opensource.altera.com, linux-spi@vger.kernel.org,
linux-doc@vger.kernel.org, devicetree@vger.kernel.org,
tthayer.linux@gmail.com, tthayer@altera.com, axel.lin@ingics.com,
baruch@tkos.co.il, andriy.shevchenko@linux.intel.com
Subject: Re: [PATCH 2/2] arm: dts: socfpga: Add SPI nodes & update copyright.
Date: Tue, 7 Oct 2014 15:55:54 -0500 [thread overview]
Message-ID: <5434535A.9070101@opensource.altera.com> (raw)
In-Reply-To: <20141007203123.GA15799@pengutronix.de>
On 10/07/2014 03:31 PM, Steffen Trumtrar wrote:
> Hi!
>
> On Tue, Oct 07, 2014 at 02:48:17PM -0500, tthayer@opensource.altera.com wrote:
>> From: Thor Thayer <tthayer@opensource.altera.com>
>>
>> Add 2 SPI nodes to SOCFPGA device tree. Update copyright.
>> Update spi-dw.txt with bus-num as an optional property.
>>
>> Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
>> ---
>> Documentation/devicetree/bindings/spi/spi-dw.txt | 1 +
>> arch/arm/boot/dts/socfpga.dtsi | 52 ++++++++++++++++++----
>> 2 files changed, 45 insertions(+), 8 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/spi/spi-dw.txt b/Documentation/devicetree/bindings/spi/spi-dw.txt
>> index 7b63ed6..f1d54e6 100644
>> --- a/Documentation/devicetree/bindings/spi/spi-dw.txt
>> +++ b/Documentation/devicetree/bindings/spi/spi-dw.txt
>> @@ -11,6 +11,7 @@ Required properties:
>>
>> Optional properties:
>> - cs-gpios: see spi-bus.txt
>> +- bus-num: see spi-bus.txt
>>
>> Example:
>>
>> diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
>> index 4d77ad6..42855bc 100644
>> --- a/arch/arm/boot/dts/socfpga.dtsi
>> +++ b/arch/arm/boot/dts/socfpga.dtsi
>> @@ -1,15 +1,14 @@
>> /*
>> - * Copyright (C) 2012 Altera <www.altera.com>
>> + * Copyright Altera Corporation (C) 2012-2014. All rights reserved.
>> *
>> * This program is free software; you can redistribute it and/or modify
>> - * it under the terms of the GNU General Public License as published by
>> - * the Free Software Foundation; either version 2 of the License, or
>> - * (at your option) any later version.
>> + * it under the terms and conditions of the GNU General Public License,
>> + * version 2, as published by the Free Software Foundation.
>> *
>> - * This program is distributed in the hope that it will be useful,
>> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> - * GNU General Public License for more details.
>> + * This program is distributed in the hope it will be useful, but WITHOUT
>> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
>> + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
>> + * more details.
> This shouldn't be in the same patch IMHO.
Hi Steffen,
Are you saying the socfpga.dtsi changes shouldn't be in the patch or the
copyright update?
If the copyright update, it seemed like a good time since there were
other changes.
>> *
>> * You should have received a copy of the GNU General Public License
>> * along with this program. If not, see <http://www.gnu.org/licenses/>.
>> @@ -628,6 +627,43 @@
>> clock-names = "biu", "ciu";
>> };
>>
>> + spi0: spi@fff00000 {
>> + compatible = "snps,dw-apb-ssi";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + reg = <0xfff00000 0x1000>;
>> + interrupts = <0 154 4>;
>> + num-cs = <4>;
>> + bus-num = <0>;
>> + clocks = <&per_base_clk>;
>> +
>> + spidev@0 {
>> + compatible = "spidev";
>> + reg = <0>; /* chip select */
>> + spi-max-frequency = <100000000>;
>> + enable-dma = <1>;
>> + };
>> + };
>> +
>> + spi1: spi@fff01000 {
>> + compatible = "snps,dw-apb-ssi";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + reg = <0xfff01000 0x1000>;
>> + interrupts = <0 156 4>;
>> + num-cs = <4>;
>> + bus-num = <1>;
>> + clocks = <&per_base_clk>;
>> + status = "disabled";
>> +
>> + spidev@0 {
>> + compatible = "spidev";
>> + reg = <0>;
>> + spi-max-frequency = <100000000>;
>> + enable-dma = <1>;
>> + };
>> + };
>> +
> I don't think, this is the right place. Put it in the board dts.
> Oh, and why is spi0 not disabled but spi1 is?
OK. I can put it in the board dts. I thought the IP would go in the
socfpga.dtsi file since it describes the chip.
I understand your point which is why the 2nd SPI is disabled - it is not
pinned out on the Development Kit board.
Thanks,
Thor
>
> Regards,
> Steffen
>
next prev parent reply other threads:[~2014-10-07 20:55 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-07 19:48 [PATCH 0/2] SPI: Enable devicetree spi child nodes tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
2014-10-07 19:48 ` tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
[not found] ` <1412711297-31857-1-git-send-email-tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2014-10-07 19:48 ` [PATCH 1/2] spi: dw: Initialize of_node to discover DT node children tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
2014-10-07 19:48 ` tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
[not found] ` <1412711297-31857-2-git-send-email-tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2014-10-07 19:42 ` Dinh Nguyen
2014-10-07 19:42 ` Dinh Nguyen
[not found] ` <54344237.9010809-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2014-10-07 19:55 ` Thor Thayer
2014-10-07 19:55 ` Thor Thayer
2014-10-07 20:40 ` Mark Brown
[not found] ` <20141007204026.GK4609-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2014-10-07 20:59 ` Thor Thayer
2014-10-07 20:59 ` Thor Thayer
2014-10-08 8:17 ` Andy Shevchenko
2014-10-08 18:27 ` Thor Thayer
2014-10-08 18:27 ` Thor Thayer
2014-10-07 19:48 ` [PATCH 2/2] arm: dts: socfpga: Add SPI nodes & update copyright tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
2014-10-07 19:48 ` tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
[not found] ` <1412711297-31857-3-git-send-email-tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2014-10-07 20:31 ` Steffen Trumtrar
2014-10-07 20:55 ` Thor Thayer [this message]
2014-10-07 20:55 ` Thor Thayer
[not found] ` <5434535A.9070101-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2014-10-08 8:01 ` Steffen Trumtrar
2014-10-08 18:07 ` Thor Thayer
2014-10-08 18:07 ` Thor Thayer
2014-10-07 23:12 ` Mark Brown
2014-10-08 18:05 ` Thor Thayer
2014-10-08 18:05 ` Thor Thayer
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