Re: [Qemu-devel] [PULL 12/51] target-arm: A64: Implement DC ZVA

Re: [Qemu-devel] [PULL 12/51] target-arm: A64: Implement DC ZVA

[Christopher Covington]

Hi Peter,

On 04/17/2014 06:33 AM, Peter Maydell wrote:
> Implement the DC ZVA instruction, which clears a block of memory.
> The fast path obtains a pointer to the underlying RAM via the TCG TLB
> data structure so we can do a direct memset(), with fallback to a
> simple byte-store loop in the slow path.

> diff --git a/target-arm/helper.c b/target-arm/helper.c
> index 62f7fd3..2ffc588 100644
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c

> +static uint64_t aa64_dczid_read(CPUARMState *env, const ARMCPRegInfo *ri)
> +{
> +    ARMCPU *cpu = arm_env_get_cpu(env);
> +    int dzp_bit = 1 << 4;
> +
> +    /* DZP indicates whether DC ZVA access is allowed */
> +    if (aa64_zva_access(env, NULL) != CP_ACCESS_OK) {

I believe this logic for the Data Zero Prohibited field is inverted, causing
eglibc to use STP rather than DC ZVA for __memset.

> +        dzp_bit = 0;
> +    }
> +    return cpu->dcz_blocksize | dzp_bit;
> +}

Thanks,
Christopher

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