From: "Michel Dänzer" <michel@daenzer.net>
To: "Адонай Элохим" <algonkvel@gmail.com>
Cc: Maling list - DRI developers <dri-devel@lists.freedesktop.org>
Subject: Re: GTT explanation request
Date: Wed, 15 Oct 2014 16:40:00 +0900 [thread overview]
Message-ID: <543E24D0.1060406@daenzer.net> (raw)
In-Reply-To: <CAH1Y=qrs4HC4Zb6Obi2qS7BRP6mKMzukUG+1nycdcOxGXG_Vtw@mail.gmail.com>
On 14.10.2014 15:44, Адонай Элохим wrote:
>
> I'm tinkering around in radeon DRM code as a hobby so if you have a
> couple of minutes, could you explain, how GTT works for Radeon module?
> I've seen mentions of it here and there on the Internet, and tried to
> ping developers on IRC, but the overall picture is still unreachable
> for me.
GTT (or GART) is a mechanism for making physically non-contiguous pages
of system RAM accessible to the GPU in a linear address range. This is
achieved using a translation table (the TT in GTT) which maps the linear
range addresses to physical (bus) addresses.
The linear address range is managed by TTM (same TT), the radeon driver
just provides the radeon_ttm_backend_bind/unbind() hooks to it for
binding the pages corresponding to a buffer object (BO) into the linear
range and for unbinding them from it.
> I also looked through the code in radeon_object.c, radeon_ttm.c and
> radeon_gem.c. In my mind, the GEM and the TTM do the same thing, so
> why is there a need for GEM and TTM coupled?..
The functionalities of TTM and GEM are overlapping, but not identical.
The radeon driver uses memory management functionality of TTM and
userspace interface functionality of GEM.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
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prev parent reply other threads:[~2014-10-15 7:40 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-14 6:44 GTT explanation request Адонай Элохим
2014-10-15 7:40 ` Michel Dänzer [this message]
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