diff for duplicates of <54513435.9050803@gmail.com> diff --git a/a/1.txt b/N1/1.txt index ff16f3c..de26fce 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -2,7 +2,7 @@ On 22.10.2014 20:26, Sebastian Hesselbarth wrote: > Marvell BG2 has two fast ethernet controllers with internal PHY, > add the corresponding nodes to SoC dtsi. > -> Tested-by: Antoine T?nart <antoine.tenart@free-electrons.com> +> Tested-by: Antoine Ténart <antoine.tenart@free-electrons.com> > Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> > Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> @@ -17,14 +17,14 @@ Sebastian > (Reported by Sergei Shtylyov) > > Cc: "David S. Miller" <davem@davemloft.net> -> Cc: "Antoine T?nart" <antoine.tenart@free-electrons.com> +> Cc: "Antoine Ténart" <antoine.tenart@free-electrons.com> > Cc: Florian Fainelli <f.fainelli@gmail.com> > Cc: Eric Miao <eric.y.miao@gmail.com> > Cc: Haojian Zhuang <haojian.zhuang@gmail.com> -> Cc: linux-arm-kernel at lists.infradead.org -> Cc: netdev at vger.kernel.org -> Cc: devicetree at vger.kernel.org -> Cc: linux-kernel at vger.kernel.org +> Cc: linux-arm-kernel@lists.infradead.org +> Cc: netdev@vger.kernel.org +> Cc: devicetree@vger.kernel.org +> Cc: linux-kernel@vger.kernel.org > --- > arch/arm/boot/dts/berlin2.dtsi | 36 ++++++++++++++++++++++++++++++++++++ > 1 file changed, 36 insertions(+) @@ -37,7 +37,7 @@ Sebastian > clocks = <&chip CLKID_TWD>; > }; > -> + eth1: ethernet at b90000 { +> + eth1: ethernet@b90000 { > + compatible = "marvell,pxa168-eth"; > + reg = <0xb90000 0x10000>; > + clocks = <&chip CLKID_GETH1>; @@ -50,17 +50,17 @@ Sebastian > + phy-handle = <ðphy1>; > + status = "disabled"; > + -> + ethphy1: ethernet-phy at 0 { +> + ethphy1: ethernet-phy@0 { > + reg = <0>; > + }; > + }; > + -> cpu-ctrl at dd0000 { +> cpu-ctrl@dd0000 { > compatible = "marvell,berlin-cpu-ctrl"; > reg = <0xdd0000 0x10000>; > }; > -> + eth0: ethernet at e50000 { +> + eth0: ethernet@e50000 { > + compatible = "marvell,pxa168-eth"; > + reg = <0xe50000 0x10000>; > + clocks = <&chip CLKID_GETH0>; @@ -73,12 +73,12 @@ Sebastian > + phy-handle = <ðphy0>; > + status = "disabled"; > + -> + ethphy0: ethernet-phy at 0 { +> + ethphy0: ethernet-phy@0 { > + reg = <0>; > + }; > + }; > + -> apb at e80000 { +> apb@e80000 { > compatible = "simple-bus"; > #address-cells = <1>; > diff --git a/a/content_digest b/N1/content_digest index 4ce5dbc..627f656 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,16 +1,24 @@ "ref\01414002412-13615-1-git-send-email-sebastian.hesselbarth@gmail.com\0" "ref\01414002412-13615-7-git-send-email-sebastian.hesselbarth@gmail.com\0" - "From\0sebastian.hesselbarth@gmail.com (Sebastian Hesselbarth)\0" - "Subject\0[PATCH v2 6/9] ARM: berlin: Add BG2 ethernet DT nodes\0" + "From\0Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>\0" + "Subject\0Re: [PATCH v2 6/9] ARM: berlin: Add BG2 ethernet DT nodes\0" "Date\0Wed, 29 Oct 2014 19:38:45 +0100\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "Cc\0David S. Miller <davem@davemloft.net>" + " Antoine T\303\251nart <antoine.tenart@free-electrons.com>" + Florian Fainelli <f.fainelli@gmail.com> + Eric Miao <eric.y.miao@gmail.com> + Haojian Zhuang <haojian.zhuang@gmail.com> + linux-arm-kernel@lists.infradead.org + netdev@vger.kernel.org + devicetree@vger.kernel.org + " linux-kernel@vger.kernel.org\0" "\00:1\0" "b\0" "On 22.10.2014 20:26, Sebastian Hesselbarth wrote:\n" "> Marvell BG2 has two fast ethernet controllers with internal PHY,\n" "> add the corresponding nodes to SoC dtsi.\n" ">\n" - "> Tested-by: Antoine T?nart <antoine.tenart@free-electrons.com>\n" + "> Tested-by: Antoine T\303\203\302\251nart <antoine.tenart@free-electrons.com>\n" "> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>\n" "> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>\n" "\n" @@ -25,14 +33,14 @@ "> (Reported by Sergei Shtylyov)\n" ">\n" "> Cc: \"David S. Miller\" <davem@davemloft.net>\n" - "> Cc: \"Antoine T?nart\" <antoine.tenart@free-electrons.com>\n" + "> Cc: \"Antoine T\303\203\302\251nart\" <antoine.tenart@free-electrons.com>\n" "> Cc: Florian Fainelli <f.fainelli@gmail.com>\n" "> Cc: Eric Miao <eric.y.miao@gmail.com>\n" "> Cc: Haojian Zhuang <haojian.zhuang@gmail.com>\n" - "> Cc: linux-arm-kernel at lists.infradead.org\n" - "> Cc: netdev at vger.kernel.org\n" - "> Cc: devicetree at vger.kernel.org\n" - "> Cc: linux-kernel at vger.kernel.org\n" + "> Cc: linux-arm-kernel@lists.infradead.org\n" + "> Cc: netdev@vger.kernel.org\n" + "> Cc: devicetree@vger.kernel.org\n" + "> Cc: linux-kernel@vger.kernel.org\n" "> ---\n" "> arch/arm/boot/dts/berlin2.dtsi | 36 ++++++++++++++++++++++++++++++++++++\n" "> 1 file changed, 36 insertions(+)\n" @@ -45,7 +53,7 @@ "> \t\t\tclocks = <&chip CLKID_TWD>;\n" "> \t\t};\n" ">\n" - "> +\t\teth1: ethernet at b90000 {\n" + "> +\t\teth1: ethernet@b90000 {\n" "> +\t\t\tcompatible = \"marvell,pxa168-eth\";\n" "> +\t\t\treg = <0xb90000 0x10000>;\n" "> +\t\t\tclocks = <&chip CLKID_GETH1>;\n" @@ -58,17 +66,17 @@ "> +\t\t\tphy-handle = <ðphy1>;\n" "> +\t\t\tstatus = \"disabled\";\n" "> +\n" - "> +\t\t\tethphy1: ethernet-phy at 0 {\n" + "> +\t\t\tethphy1: ethernet-phy@0 {\n" "> +\t\t\t\treg = <0>;\n" "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> \t\tcpu-ctrl at dd0000 {\n" + "> \t\tcpu-ctrl@dd0000 {\n" "> \t\t\tcompatible = \"marvell,berlin-cpu-ctrl\";\n" "> \t\t\treg = <0xdd0000 0x10000>;\n" "> \t\t};\n" ">\n" - "> +\t\teth0: ethernet at e50000 {\n" + "> +\t\teth0: ethernet@e50000 {\n" "> +\t\t\tcompatible = \"marvell,pxa168-eth\";\n" "> +\t\t\treg = <0xe50000 0x10000>;\n" "> +\t\t\tclocks = <&chip CLKID_GETH0>;\n" @@ -81,14 +89,14 @@ "> +\t\t\tphy-handle = <ðphy0>;\n" "> +\t\t\tstatus = \"disabled\";\n" "> +\n" - "> +\t\t\tethphy0: ethernet-phy at 0 {\n" + "> +\t\t\tethphy0: ethernet-phy@0 {\n" "> +\t\t\t\treg = <0>;\n" "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> \t\tapb at e80000 {\n" + "> \t\tapb@e80000 {\n" "> \t\t\tcompatible = \"simple-bus\";\n" "> \t\t\t#address-cells = <1>;\n" > -a40cd19573fa1437b82fdaaaa241b79d9cd635cfa5e97afdf706eed1407a809b +0da8222ccd479b769fff6d419b288c36689f66a5dfb9a8d87b8642f6d5ae4c10
diff --git a/a/1.txt b/N2/1.txt index ff16f3c..fdf0a0a 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -2,7 +2,7 @@ On 22.10.2014 20:26, Sebastian Hesselbarth wrote: > Marvell BG2 has two fast ethernet controllers with internal PHY, > add the corresponding nodes to SoC dtsi. > -> Tested-by: Antoine T?nart <antoine.tenart@free-electrons.com> +> Tested-by: Antoine Ténart <antoine.tenart@free-electrons.com> > Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> > Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> @@ -17,14 +17,14 @@ Sebastian > (Reported by Sergei Shtylyov) > > Cc: "David S. Miller" <davem@davemloft.net> -> Cc: "Antoine T?nart" <antoine.tenart@free-electrons.com> +> Cc: "Antoine Ténart" <antoine.tenart@free-electrons.com> > Cc: Florian Fainelli <f.fainelli@gmail.com> > Cc: Eric Miao <eric.y.miao@gmail.com> > Cc: Haojian Zhuang <haojian.zhuang@gmail.com> -> Cc: linux-arm-kernel at lists.infradead.org -> Cc: netdev at vger.kernel.org -> Cc: devicetree at vger.kernel.org -> Cc: linux-kernel at vger.kernel.org +> Cc: linux-arm-kernel@lists.infradead.org +> Cc: netdev@vger.kernel.org +> Cc: devicetree@vger.kernel.org +> Cc: linux-kernel@vger.kernel.org > --- > arch/arm/boot/dts/berlin2.dtsi | 36 ++++++++++++++++++++++++++++++++++++ > 1 file changed, 36 insertions(+) @@ -37,7 +37,7 @@ Sebastian > clocks = <&chip CLKID_TWD>; > }; > -> + eth1: ethernet at b90000 { +> + eth1: ethernet@b90000 { > + compatible = "marvell,pxa168-eth"; > + reg = <0xb90000 0x10000>; > + clocks = <&chip CLKID_GETH1>; @@ -50,17 +50,17 @@ Sebastian > + phy-handle = <ðphy1>; > + status = "disabled"; > + -> + ethphy1: ethernet-phy at 0 { +> + ethphy1: ethernet-phy@0 { > + reg = <0>; > + }; > + }; > + -> cpu-ctrl at dd0000 { +> cpu-ctrl@dd0000 { > compatible = "marvell,berlin-cpu-ctrl"; > reg = <0xdd0000 0x10000>; > }; > -> + eth0: ethernet at e50000 { +> + eth0: ethernet@e50000 { > + compatible = "marvell,pxa168-eth"; > + reg = <0xe50000 0x10000>; > + clocks = <&chip CLKID_GETH0>; @@ -73,12 +73,12 @@ Sebastian > + phy-handle = <ðphy0>; > + status = "disabled"; > + -> + ethphy0: ethernet-phy at 0 { +> + ethphy0: ethernet-phy@0 { > + reg = <0>; > + }; > + }; > + -> apb at e80000 { +> apb@e80000 { > compatible = "simple-bus"; > #address-cells = <1>; > diff --git a/a/content_digest b/N2/content_digest index 4ce5dbc..828cfa1 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,16 +1,25 @@ "ref\01414002412-13615-1-git-send-email-sebastian.hesselbarth@gmail.com\0" "ref\01414002412-13615-7-git-send-email-sebastian.hesselbarth@gmail.com\0" - "From\0sebastian.hesselbarth@gmail.com (Sebastian Hesselbarth)\0" - "Subject\0[PATCH v2 6/9] ARM: berlin: Add BG2 ethernet DT nodes\0" + "From\0Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>\0" + "Subject\0Re: [PATCH v2 6/9] ARM: berlin: Add BG2 ethernet DT nodes\0" "Date\0Wed, 29 Oct 2014 19:38:45 +0100\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0unlisted-recipients:; (no To-header on input)\0" + "Cc\0David S. Miller <davem@davemloft.net>" + " Antoine T\303\251nart <antoine.tenart@free-electrons.com>" + Florian Fainelli <f.fainelli@gmail.com> + Eric Miao <eric.y.miao@gmail.com> + Haojian Zhuang <haojian.zhuang@gmail.com> + linux-arm-kernel@lists.infradead.org + netdev@vger.kernel.org + devicetree@vger.kernel.org + " linux-kernel@vger.kernel.org\0" "\00:1\0" "b\0" "On 22.10.2014 20:26, Sebastian Hesselbarth wrote:\n" "> Marvell BG2 has two fast ethernet controllers with internal PHY,\n" "> add the corresponding nodes to SoC dtsi.\n" ">\n" - "> Tested-by: Antoine T?nart <antoine.tenart@free-electrons.com>\n" + "> Tested-by: Antoine T\303\251nart <antoine.tenart@free-electrons.com>\n" "> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>\n" "> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>\n" "\n" @@ -25,14 +34,14 @@ "> (Reported by Sergei Shtylyov)\n" ">\n" "> Cc: \"David S. Miller\" <davem@davemloft.net>\n" - "> Cc: \"Antoine T?nart\" <antoine.tenart@free-electrons.com>\n" + "> Cc: \"Antoine T\303\251nart\" <antoine.tenart@free-electrons.com>\n" "> Cc: Florian Fainelli <f.fainelli@gmail.com>\n" "> Cc: Eric Miao <eric.y.miao@gmail.com>\n" "> Cc: Haojian Zhuang <haojian.zhuang@gmail.com>\n" - "> Cc: linux-arm-kernel at lists.infradead.org\n" - "> Cc: netdev at vger.kernel.org\n" - "> Cc: devicetree at vger.kernel.org\n" - "> Cc: linux-kernel at vger.kernel.org\n" + "> Cc: linux-arm-kernel@lists.infradead.org\n" + "> Cc: netdev@vger.kernel.org\n" + "> Cc: devicetree@vger.kernel.org\n" + "> Cc: linux-kernel@vger.kernel.org\n" "> ---\n" "> arch/arm/boot/dts/berlin2.dtsi | 36 ++++++++++++++++++++++++++++++++++++\n" "> 1 file changed, 36 insertions(+)\n" @@ -45,7 +54,7 @@ "> \t\t\tclocks = <&chip CLKID_TWD>;\n" "> \t\t};\n" ">\n" - "> +\t\teth1: ethernet at b90000 {\n" + "> +\t\teth1: ethernet@b90000 {\n" "> +\t\t\tcompatible = \"marvell,pxa168-eth\";\n" "> +\t\t\treg = <0xb90000 0x10000>;\n" "> +\t\t\tclocks = <&chip CLKID_GETH1>;\n" @@ -58,17 +67,17 @@ "> +\t\t\tphy-handle = <ðphy1>;\n" "> +\t\t\tstatus = \"disabled\";\n" "> +\n" - "> +\t\t\tethphy1: ethernet-phy at 0 {\n" + "> +\t\t\tethphy1: ethernet-phy@0 {\n" "> +\t\t\t\treg = <0>;\n" "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> \t\tcpu-ctrl at dd0000 {\n" + "> \t\tcpu-ctrl@dd0000 {\n" "> \t\t\tcompatible = \"marvell,berlin-cpu-ctrl\";\n" "> \t\t\treg = <0xdd0000 0x10000>;\n" "> \t\t};\n" ">\n" - "> +\t\teth0: ethernet at e50000 {\n" + "> +\t\teth0: ethernet@e50000 {\n" "> +\t\t\tcompatible = \"marvell,pxa168-eth\";\n" "> +\t\t\treg = <0xe50000 0x10000>;\n" "> +\t\t\tclocks = <&chip CLKID_GETH0>;\n" @@ -81,14 +90,14 @@ "> +\t\t\tphy-handle = <ðphy0>;\n" "> +\t\t\tstatus = \"disabled\";\n" "> +\n" - "> +\t\t\tethphy0: ethernet-phy at 0 {\n" + "> +\t\t\tethphy0: ethernet-phy@0 {\n" "> +\t\t\t\treg = <0>;\n" "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> \t\tapb at e80000 {\n" + "> \t\tapb@e80000 {\n" "> \t\t\tcompatible = \"simple-bus\";\n" "> \t\t\t#address-cells = <1>;\n" > -a40cd19573fa1437b82fdaaaa241b79d9cd635cfa5e97afdf706eed1407a809b +638036e3fc12b806a5badef516cc66c153190a6c85777f3897db115dee6d7e18
diff --git a/a/1.txt b/N3/1.txt index ff16f3c..de26fce 100644 --- a/a/1.txt +++ b/N3/1.txt @@ -2,7 +2,7 @@ On 22.10.2014 20:26, Sebastian Hesselbarth wrote: > Marvell BG2 has two fast ethernet controllers with internal PHY, > add the corresponding nodes to SoC dtsi. > -> Tested-by: Antoine T?nart <antoine.tenart@free-electrons.com> +> Tested-by: Antoine Ténart <antoine.tenart@free-electrons.com> > Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> > Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> @@ -17,14 +17,14 @@ Sebastian > (Reported by Sergei Shtylyov) > > Cc: "David S. Miller" <davem@davemloft.net> -> Cc: "Antoine T?nart" <antoine.tenart@free-electrons.com> +> Cc: "Antoine Ténart" <antoine.tenart@free-electrons.com> > Cc: Florian Fainelli <f.fainelli@gmail.com> > Cc: Eric Miao <eric.y.miao@gmail.com> > Cc: Haojian Zhuang <haojian.zhuang@gmail.com> -> Cc: linux-arm-kernel at lists.infradead.org -> Cc: netdev at vger.kernel.org -> Cc: devicetree at vger.kernel.org -> Cc: linux-kernel at vger.kernel.org +> Cc: linux-arm-kernel@lists.infradead.org +> Cc: netdev@vger.kernel.org +> Cc: devicetree@vger.kernel.org +> Cc: linux-kernel@vger.kernel.org > --- > arch/arm/boot/dts/berlin2.dtsi | 36 ++++++++++++++++++++++++++++++++++++ > 1 file changed, 36 insertions(+) @@ -37,7 +37,7 @@ Sebastian > clocks = <&chip CLKID_TWD>; > }; > -> + eth1: ethernet at b90000 { +> + eth1: ethernet@b90000 { > + compatible = "marvell,pxa168-eth"; > + reg = <0xb90000 0x10000>; > + clocks = <&chip CLKID_GETH1>; @@ -50,17 +50,17 @@ Sebastian > + phy-handle = <ðphy1>; > + status = "disabled"; > + -> + ethphy1: ethernet-phy at 0 { +> + ethphy1: ethernet-phy@0 { > + reg = <0>; > + }; > + }; > + -> cpu-ctrl at dd0000 { +> cpu-ctrl@dd0000 { > compatible = "marvell,berlin-cpu-ctrl"; > reg = <0xdd0000 0x10000>; > }; > -> + eth0: ethernet at e50000 { +> + eth0: ethernet@e50000 { > + compatible = "marvell,pxa168-eth"; > + reg = <0xe50000 0x10000>; > + clocks = <&chip CLKID_GETH0>; @@ -73,12 +73,12 @@ Sebastian > + phy-handle = <ðphy0>; > + status = "disabled"; > + -> + ethphy0: ethernet-phy at 0 { +> + ethphy0: ethernet-phy@0 { > + reg = <0>; > + }; > + }; > + -> apb at e80000 { +> apb@e80000 { > compatible = "simple-bus"; > #address-cells = <1>; > diff --git a/a/content_digest b/N3/content_digest index 4ce5dbc..a8f2ebb 100644 --- a/a/content_digest +++ b/N3/content_digest @@ -1,16 +1,25 @@ "ref\01414002412-13615-1-git-send-email-sebastian.hesselbarth@gmail.com\0" "ref\01414002412-13615-7-git-send-email-sebastian.hesselbarth@gmail.com\0" - "From\0sebastian.hesselbarth@gmail.com (Sebastian Hesselbarth)\0" - "Subject\0[PATCH v2 6/9] ARM: berlin: Add BG2 ethernet DT nodes\0" + "From\0Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>\0" + "Subject\0Re: [PATCH v2 6/9] ARM: berlin: Add BG2 ethernet DT nodes\0" "Date\0Wed, 29 Oct 2014 19:38:45 +0100\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0unlisted-recipients:; (no To-header on input)\0" + "Cc\0David S. Miller <davem@davemloft.net>" + " Antoine T\303\251nart <antoine.tenart@free-electrons.com>" + Florian Fainelli <f.fainelli@gmail.com> + Eric Miao <eric.y.miao@gmail.com> + Haojian Zhuang <haojian.zhuang@gmail.com> + linux-arm-kernel@lists.infradead.org + netdev@vger.kernel.org + devicetree@vger.kernel.org + " linux-kernel@vger.kernel.org\0" "\00:1\0" "b\0" "On 22.10.2014 20:26, Sebastian Hesselbarth wrote:\n" "> Marvell BG2 has two fast ethernet controllers with internal PHY,\n" "> add the corresponding nodes to SoC dtsi.\n" ">\n" - "> Tested-by: Antoine T?nart <antoine.tenart@free-electrons.com>\n" + "> Tested-by: Antoine T\303\203\302\251nart <antoine.tenart@free-electrons.com>\n" "> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>\n" "> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>\n" "\n" @@ -25,14 +34,14 @@ "> (Reported by Sergei Shtylyov)\n" ">\n" "> Cc: \"David S. Miller\" <davem@davemloft.net>\n" - "> Cc: \"Antoine T?nart\" <antoine.tenart@free-electrons.com>\n" + "> Cc: \"Antoine T\303\203\302\251nart\" <antoine.tenart@free-electrons.com>\n" "> Cc: Florian Fainelli <f.fainelli@gmail.com>\n" "> Cc: Eric Miao <eric.y.miao@gmail.com>\n" "> Cc: Haojian Zhuang <haojian.zhuang@gmail.com>\n" - "> Cc: linux-arm-kernel at lists.infradead.org\n" - "> Cc: netdev at vger.kernel.org\n" - "> Cc: devicetree at vger.kernel.org\n" - "> Cc: linux-kernel at vger.kernel.org\n" + "> Cc: linux-arm-kernel@lists.infradead.org\n" + "> Cc: netdev@vger.kernel.org\n" + "> Cc: devicetree@vger.kernel.org\n" + "> Cc: linux-kernel@vger.kernel.org\n" "> ---\n" "> arch/arm/boot/dts/berlin2.dtsi | 36 ++++++++++++++++++++++++++++++++++++\n" "> 1 file changed, 36 insertions(+)\n" @@ -45,7 +54,7 @@ "> \t\t\tclocks = <&chip CLKID_TWD>;\n" "> \t\t};\n" ">\n" - "> +\t\teth1: ethernet at b90000 {\n" + "> +\t\teth1: ethernet@b90000 {\n" "> +\t\t\tcompatible = \"marvell,pxa168-eth\";\n" "> +\t\t\treg = <0xb90000 0x10000>;\n" "> +\t\t\tclocks = <&chip CLKID_GETH1>;\n" @@ -58,17 +67,17 @@ "> +\t\t\tphy-handle = <ðphy1>;\n" "> +\t\t\tstatus = \"disabled\";\n" "> +\n" - "> +\t\t\tethphy1: ethernet-phy at 0 {\n" + "> +\t\t\tethphy1: ethernet-phy@0 {\n" "> +\t\t\t\treg = <0>;\n" "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> \t\tcpu-ctrl at dd0000 {\n" + "> \t\tcpu-ctrl@dd0000 {\n" "> \t\t\tcompatible = \"marvell,berlin-cpu-ctrl\";\n" "> \t\t\treg = <0xdd0000 0x10000>;\n" "> \t\t};\n" ">\n" - "> +\t\teth0: ethernet at e50000 {\n" + "> +\t\teth0: ethernet@e50000 {\n" "> +\t\t\tcompatible = \"marvell,pxa168-eth\";\n" "> +\t\t\treg = <0xe50000 0x10000>;\n" "> +\t\t\tclocks = <&chip CLKID_GETH0>;\n" @@ -81,14 +90,14 @@ "> +\t\t\tphy-handle = <ðphy0>;\n" "> +\t\t\tstatus = \"disabled\";\n" "> +\n" - "> +\t\t\tethphy0: ethernet-phy at 0 {\n" + "> +\t\t\tethphy0: ethernet-phy@0 {\n" "> +\t\t\t\treg = <0>;\n" "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> \t\tapb at e80000 {\n" + "> \t\tapb@e80000 {\n" "> \t\t\tcompatible = \"simple-bus\";\n" "> \t\t\t#address-cells = <1>;\n" > -a40cd19573fa1437b82fdaaaa241b79d9cd635cfa5e97afdf706eed1407a809b +2f5dd249f01ad8f50df2b3690f2c8cb7408a7a3f6423a45ac34be7a466da9676
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