From: sebastian.hesselbarth@gmail.com (Sebastian Hesselbarth)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 4/5] ARM: berlin: Add AHCI and SATA PHY nodes to BG2
Date: Wed, 12 Nov 2014 00:23:07 +0100 [thread overview]
Message-ID: <54629A5B.9050209@gmail.com> (raw)
In-Reply-To: <1414664488-5911-5-git-send-email-sebastian.hesselbarth@gmail.com>
On 30.10.2014 11:21, Sebastian Hesselbarth wrote:
> Add DT nodes for the AHCI controller and SATA PHY found on Marvell
> Berlin2 SoCs.
>
> Acked-by: Antoine T?nart <antoine.tenart@free-electrons.com>
> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Applied both DT patches to berlin/dt.
Sebastian
> ---
> arch/arm/boot/dts/berlin2.dtsi | 39 +++++++++++++++++++++++++++++++++++++++
> 1 file changed, 39 insertions(+)
>
> diff --git a/arch/arm/boot/dts/berlin2.dtsi b/arch/arm/boot/dts/berlin2.dtsi
> index 9d7c810ebd0b..f39090491eb2 100644
> --- a/arch/arm/boot/dts/berlin2.dtsi
> +++ b/arch/arm/boot/dts/berlin2.dtsi
> @@ -246,6 +246,45 @@
> };
> };
>
> + ahci: sata at e90000 {
> + compatible = "marvell,berlin2-ahci", "generic-ahci";
> + reg = <0xe90000 0x1000>;
> + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&chip CLKID_SATA>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + sata0: sata-port at 0 {
> + reg = <0>;
> + phys = <&sata_phy 0>;
> + status = "disabled";
> + };
> +
> + sata1: sata-port at 1 {
> + reg = <1>;
> + phys = <&sata_phy 1>;
> + status = "disabled";
> + };
> + };
> +
> + sata_phy: phy at e900a0 {
> + compatible = "marvell,berlin2-sata-phy";
> + reg = <0xe900a0 0x200>;
> + clocks = <&chip CLKID_SATA>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + #phy-cells = <1>;
> + status = "disabled";
> +
> + sata-phy at 0 {
> + reg = <0>;
> + };
> +
> + sata-phy at 1 {
> + reg = <1>;
> + };
> + };
> +
> chip: chip-control at ea0000 {
> compatible = "marvell,berlin2-chip-ctrl";
> #clock-cells = <1>;
>
WARNING: multiple messages have this Message-ID (diff)
From: Sebastian Hesselbarth <sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: "Kishon Vijay Abraham I" <kishon-l0cyMroinI0@public.gmane.org>,
"Antoine Ténart"
<antoine.tenart-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH v3 4/5] ARM: berlin: Add AHCI and SATA PHY nodes to BG2
Date: Wed, 12 Nov 2014 00:23:07 +0100 [thread overview]
Message-ID: <54629A5B.9050209@gmail.com> (raw)
In-Reply-To: <1414664488-5911-5-git-send-email-sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
On 30.10.2014 11:21, Sebastian Hesselbarth wrote:
> Add DT nodes for the AHCI controller and SATA PHY found on Marvell
> Berlin2 SoCs.
>
> Acked-by: Antoine Ténart <antoine.tenart-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Applied both DT patches to berlin/dt.
Sebastian
> ---
> arch/arm/boot/dts/berlin2.dtsi | 39 +++++++++++++++++++++++++++++++++++++++
> 1 file changed, 39 insertions(+)
>
> diff --git a/arch/arm/boot/dts/berlin2.dtsi b/arch/arm/boot/dts/berlin2.dtsi
> index 9d7c810ebd0b..f39090491eb2 100644
> --- a/arch/arm/boot/dts/berlin2.dtsi
> +++ b/arch/arm/boot/dts/berlin2.dtsi
> @@ -246,6 +246,45 @@
> };
> };
>
> + ahci: sata@e90000 {
> + compatible = "marvell,berlin2-ahci", "generic-ahci";
> + reg = <0xe90000 0x1000>;
> + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&chip CLKID_SATA>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + sata0: sata-port@0 {
> + reg = <0>;
> + phys = <&sata_phy 0>;
> + status = "disabled";
> + };
> +
> + sata1: sata-port@1 {
> + reg = <1>;
> + phys = <&sata_phy 1>;
> + status = "disabled";
> + };
> + };
> +
> + sata_phy: phy@e900a0 {
> + compatible = "marvell,berlin2-sata-phy";
> + reg = <0xe900a0 0x200>;
> + clocks = <&chip CLKID_SATA>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + #phy-cells = <1>;
> + status = "disabled";
> +
> + sata-phy@0 {
> + reg = <0>;
> + };
> +
> + sata-phy@1 {
> + reg = <1>;
> + };
> + };
> +
> chip: chip-control@ea0000 {
> compatible = "marvell,berlin2-chip-ctrl";
> #clock-cells = <1>;
>
--
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WARNING: multiple messages have this Message-ID (diff)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
To: unlisted-recipients:; (no To-header on input)
Cc: "Kishon Vijay Abraham I" <kishon@ti.com>,
"Antoine Ténart" <antoine.tenart@free-electrons.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 4/5] ARM: berlin: Add AHCI and SATA PHY nodes to BG2
Date: Wed, 12 Nov 2014 00:23:07 +0100 [thread overview]
Message-ID: <54629A5B.9050209@gmail.com> (raw)
In-Reply-To: <1414664488-5911-5-git-send-email-sebastian.hesselbarth@gmail.com>
On 30.10.2014 11:21, Sebastian Hesselbarth wrote:
> Add DT nodes for the AHCI controller and SATA PHY found on Marvell
> Berlin2 SoCs.
>
> Acked-by: Antoine Ténart <antoine.tenart@free-electrons.com>
> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Applied both DT patches to berlin/dt.
Sebastian
> ---
> arch/arm/boot/dts/berlin2.dtsi | 39 +++++++++++++++++++++++++++++++++++++++
> 1 file changed, 39 insertions(+)
>
> diff --git a/arch/arm/boot/dts/berlin2.dtsi b/arch/arm/boot/dts/berlin2.dtsi
> index 9d7c810ebd0b..f39090491eb2 100644
> --- a/arch/arm/boot/dts/berlin2.dtsi
> +++ b/arch/arm/boot/dts/berlin2.dtsi
> @@ -246,6 +246,45 @@
> };
> };
>
> + ahci: sata@e90000 {
> + compatible = "marvell,berlin2-ahci", "generic-ahci";
> + reg = <0xe90000 0x1000>;
> + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&chip CLKID_SATA>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + sata0: sata-port@0 {
> + reg = <0>;
> + phys = <&sata_phy 0>;
> + status = "disabled";
> + };
> +
> + sata1: sata-port@1 {
> + reg = <1>;
> + phys = <&sata_phy 1>;
> + status = "disabled";
> + };
> + };
> +
> + sata_phy: phy@e900a0 {
> + compatible = "marvell,berlin2-sata-phy";
> + reg = <0xe900a0 0x200>;
> + clocks = <&chip CLKID_SATA>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + #phy-cells = <1>;
> + status = "disabled";
> +
> + sata-phy@0 {
> + reg = <0>;
> + };
> +
> + sata-phy@1 {
> + reg = <1>;
> + };
> + };
> +
> chip: chip-control@ea0000 {
> compatible = "marvell,berlin2-chip-ctrl";
> #clock-cells = <1>;
>
next prev parent reply other threads:[~2014-11-11 23:23 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-21 9:07 [PATCH v2 0/5] Berlin BG2 AHCI and SATA PHY Sebastian Hesselbarth
2014-10-21 9:07 ` Sebastian Hesselbarth
2014-10-21 9:07 ` Sebastian Hesselbarth
2014-10-21 9:07 ` [PATCH v2 1/5] phy: berlin-sata: Move PHY_BASE into private data struct Sebastian Hesselbarth
2014-10-21 9:07 ` Sebastian Hesselbarth
2014-10-21 9:07 ` Sebastian Hesselbarth
2014-10-21 9:33 ` Kishon Vijay Abraham I
2014-10-21 9:33 ` Kishon Vijay Abraham I
2014-10-21 9:40 ` Sebastian Hesselbarth
2014-10-21 9:40 ` Sebastian Hesselbarth
2014-10-21 9:40 ` Sebastian Hesselbarth
2014-10-24 20:14 ` Sebastian Hesselbarth
2014-10-24 20:14 ` Sebastian Hesselbarth
2014-10-24 20:14 ` Sebastian Hesselbarth
2014-10-24 20:25 ` Felipe Balbi
2014-10-24 20:25 ` Felipe Balbi
2014-10-24 20:35 ` Sebastian Hesselbarth
2014-10-24 20:35 ` Sebastian Hesselbarth
2014-10-27 12:27 ` Kishon Vijay Abraham I
2014-10-27 12:27 ` Kishon Vijay Abraham I
2014-10-27 12:27 ` Kishon Vijay Abraham I
2014-10-27 18:32 ` Sebastian Hesselbarth
2014-10-27 18:32 ` Sebastian Hesselbarth
2014-10-30 5:27 ` Kishon Vijay Abraham I
2014-10-30 5:27 ` Kishon Vijay Abraham I
2014-10-30 5:27 ` Kishon Vijay Abraham I
2014-10-21 9:07 ` [PATCH v2 2/5] phy: berlin-sata: Add support for BG2 SATA PHY Sebastian Hesselbarth
2014-10-21 9:07 ` Sebastian Hesselbarth
2014-10-21 9:07 ` Sebastian Hesselbarth
2014-10-21 9:07 ` [PATCH v2 3/5] phy: berlin-sata: Document BG2 compatible Sebastian Hesselbarth
2014-10-21 9:07 ` Sebastian Hesselbarth
2014-10-21 9:07 ` Sebastian Hesselbarth
2014-10-21 9:07 ` [PATCH v2 4/5] ARM: berlin: Add AHCI and SATA PHY nodes to BG2 Sebastian Hesselbarth
2014-10-21 9:07 ` Sebastian Hesselbarth
2014-10-21 9:07 ` Sebastian Hesselbarth
2014-10-21 9:07 ` [PATCH v2 5/5] ARM: berlin: Enable SATA on Sony NSZ-GS7 Sebastian Hesselbarth
2014-10-21 9:07 ` Sebastian Hesselbarth
2014-10-21 9:07 ` Sebastian Hesselbarth
2014-10-30 10:21 ` [PATCH v3 0/5] Berlin BG2 AHCI and SATA PHY Sebastian Hesselbarth
2014-10-30 10:21 ` Sebastian Hesselbarth
2014-10-30 10:21 ` Sebastian Hesselbarth
2014-10-30 10:21 ` [PATCH v3 1/5] phy: berlin-sata: Move PHY_BASE into private data struct Sebastian Hesselbarth
2014-10-30 10:21 ` Sebastian Hesselbarth
2014-10-30 10:21 ` Sebastian Hesselbarth
2014-10-30 10:21 ` [PATCH v3 2/5] phy: berlin-sata: Add support for BG2 SATA PHY Sebastian Hesselbarth
2014-10-30 10:21 ` Sebastian Hesselbarth
2014-10-30 10:21 ` Sebastian Hesselbarth
2014-10-30 10:21 ` [PATCH v3 3/5] phy: berlin-sata: Document BG2 compatible Sebastian Hesselbarth
2014-10-30 10:21 ` Sebastian Hesselbarth
2014-10-30 10:21 ` Sebastian Hesselbarth
2014-10-30 10:21 ` [PATCH v3 4/5] ARM: berlin: Add AHCI and SATA PHY nodes to BG2 Sebastian Hesselbarth
2014-10-30 10:21 ` Sebastian Hesselbarth
2014-10-30 10:21 ` Sebastian Hesselbarth
2014-11-11 23:23 ` Sebastian Hesselbarth [this message]
2014-11-11 23:23 ` Sebastian Hesselbarth
2014-11-11 23:23 ` Sebastian Hesselbarth
2014-10-30 10:21 ` [PATCH v3 5/5] ARM: berlin: Enable SATA on Sony NSZ-GS7 Sebastian Hesselbarth
2014-10-30 10:21 ` Sebastian Hesselbarth
2014-10-30 10:21 ` Sebastian Hesselbarth
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