Re: [PATCH 10/10] esp: enable CONFIG2_FENAB for am53c974

[Hannes Reinecke <hare@suse.de>]

On 11/21/2014 11:08 AM, Paolo Bonzini wrote:
> 
> 
> On 21/11/2014 10:27, Hannes Reinecke wrote:
>> CONFIG2_FENAB ('feature enable') changed definition between chip
>> revisions, from 'Latch SCSI Phase' to 'Latch SCSI Phase, display
>> chip ID upon reset, and enable 24 bit addresses'.
>> So only enable it for am53c974 where we know what it's doing.
>>
>> Signed-off-by: Hannes Reinecke <hare@suse.de>
>> ---
>>  drivers/scsi/am53c974.c | 30 ++++++++++++++++++++++++++++++
>>  drivers/scsi/esp_scsi.c |  4 ++++
>>  2 files changed, 34 insertions(+)
>>
>> diff --git a/drivers/scsi/am53c974.c b/drivers/scsi/am53c974.c
>> index 0452ed1..722e781 100644
>> --- a/drivers/scsi/am53c974.c
>> +++ b/drivers/scsi/am53c974.c
>> @@ -252,6 +252,8 @@ static void pci_esp_send_dma_cmd(struct esp *esp, u32 addr, u32 esp_count,
>>  
>>  	pci_esp_write8(esp, (esp_count >> 0) & 0xff, ESP_TCLOW);
>>  	pci_esp_write8(esp, (esp_count >> 8) & 0xff, ESP_TCMED);
>> +	if (esp->config2 & ESP_CONFIG2_FENAB)
>> +		pci_esp_write8(esp, (esp_count >> 16) & 0xff, ESP_TCHI);
> 
> Why do this conditionally?  We know that FENAB is true here, don't we?
> 
> (Maybe I'm missing something obvious though).
> 
Not really. Point is that 'FENAB' does actually three things:
- Enable TCHI for 24-bit DMA transfer lengths
- Provide Chip ID in TCHI after reset
- Latch SCSI phase after completion in SCSI STATUS
So we _might_ run into timing issues due to the last point, so I've
made it conditional in case we'd have to disable it.

Cheers,

Hannes
-- 
Dr. Hannes Reinecke		      zSeries & Storage
hare@suse.de			      +49 911 74053 688
SUSE LINUX GmbH, Maxfeldstr. 5, 90409 Nürnberg
GF: J. Hawn, J. Guild, F. Imendörffer, HRB 21284 (AG Nürnberg)
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