* [PATCH] arm64: ARM: Fix the Generic Timers interrupt active level description
@ 2014-11-27 14:36 ` Liviu Dudau
0 siblings, 0 replies; 18+ messages in thread
From: Liviu Dudau @ 2014-11-27 14:36 UTC (permalink / raw)
To: Arnd Bergmann, Marc Zyngier, Olof Johansson
Cc: Mark Rutland, Rob Herring, Ian Campbell, Will Deacon, devicetree,
linux-arm-kernel, linux-kernel
The Cortex-A5x TRM states in paragraph "9.2 Generic Timer functional
description" that generic timers provide an active-LOW interrupt
output. Fix the device trees to correctly describe this.
While doing this update the CPU mask to match the number of described
CPUs as well.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
---
Arnd, Olof: This is on top of linux-next/master as it patches the Juno
as well as all the other ARM DTs.
arch/arm64/boot/dts/arm/foundation-v8.dts | 8 ++++----
arch/arm64/boot/dts/arm/juno.dts | 8 ++++----
arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 8 ++++----
3 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts
index 4a06090..27f3296 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8.dts
+++ b/arch/arm64/boot/dts/arm/foundation-v8.dts
@@ -78,10 +78,10 @@
timer {
compatible = "arm,armv8-timer";
- interrupts = <1 13 0xff01>,
- <1 14 0xff01>,
- <1 11 0xff01>,
- <1 10 0xff01>;
+ interrupts = <1 13 0xf08>,
+ <1 14 0xf08>,
+ <1 11 0xf08>,
+ <1 10 0xf08>;
clock-frequency = <100000000>;
};
diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
index 097ecc4..cb3073e 100644
--- a/arch/arm64/boot/dts/arm/juno.dts
+++ b/arch/arm64/boot/dts/arm/juno.dts
@@ -98,10 +98,10 @@
timer {
compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>;
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
};
pmu {
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
index 572005e..efc59b3 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
@@ -81,10 +81,10 @@
timer {
compatible = "arm,armv8-timer";
- interrupts = <1 13 0xff01>,
- <1 14 0xff01>,
- <1 11 0xff01>,
- <1 10 0xff01>;
+ interrupts = <1 13 0xf08>,
+ <1 14 0xf08>,
+ <1 11 0xf08>,
+ <1 10 0xf08>;
clock-frequency = <100000000>;
};
--
2.1.3
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH] arm64: ARM: Fix the Generic Timers interrupt active level description
@ 2014-11-27 14:36 ` Liviu Dudau
0 siblings, 0 replies; 18+ messages in thread
From: Liviu Dudau @ 2014-11-27 14:36 UTC (permalink / raw)
To: Arnd Bergmann, Marc Zyngier, Olof Johansson
Cc: Mark Rutland, devicetree, Ian Campbell, Will Deacon, linux-kernel,
linux-arm-kernel
The Cortex-A5x TRM states in paragraph "9.2 Generic Timer functional
description" that generic timers provide an active-LOW interrupt
output. Fix the device trees to correctly describe this.
While doing this update the CPU mask to match the number of described
CPUs as well.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
---
Arnd, Olof: This is on top of linux-next/master as it patches the Juno
as well as all the other ARM DTs.
arch/arm64/boot/dts/arm/foundation-v8.dts | 8 ++++----
arch/arm64/boot/dts/arm/juno.dts | 8 ++++----
arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 8 ++++----
3 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts
index 4a06090..27f3296 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8.dts
+++ b/arch/arm64/boot/dts/arm/foundation-v8.dts
@@ -78,10 +78,10 @@
timer {
compatible = "arm,armv8-timer";
- interrupts = <1 13 0xff01>,
- <1 14 0xff01>,
- <1 11 0xff01>,
- <1 10 0xff01>;
+ interrupts = <1 13 0xf08>,
+ <1 14 0xf08>,
+ <1 11 0xf08>,
+ <1 10 0xf08>;
clock-frequency = <100000000>;
};
diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
index 097ecc4..cb3073e 100644
--- a/arch/arm64/boot/dts/arm/juno.dts
+++ b/arch/arm64/boot/dts/arm/juno.dts
@@ -98,10 +98,10 @@
timer {
compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>;
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
};
pmu {
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
index 572005e..efc59b3 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
@@ -81,10 +81,10 @@
timer {
compatible = "arm,armv8-timer";
- interrupts = <1 13 0xff01>,
- <1 14 0xff01>,
- <1 11 0xff01>,
- <1 10 0xff01>;
+ interrupts = <1 13 0xf08>,
+ <1 14 0xf08>,
+ <1 11 0xf08>,
+ <1 10 0xf08>;
clock-frequency = <100000000>;
};
--
2.1.3
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH] arm64: ARM: Fix the Generic Timers interrupt active level description
2014-11-27 14:36 ` Liviu Dudau
@ 2014-11-27 14:43 ` Marc Zyngier
-1 siblings, 0 replies; 18+ messages in thread
From: Marc Zyngier @ 2014-11-27 14:43 UTC (permalink / raw)
To: linux-arm-kernel
On 27/11/14 14:36, Liviu Dudau wrote:
> The Cortex-A5x TRM states in paragraph "9.2 Generic Timer functional
> description" that generic timers provide an active-LOW interrupt
> output. Fix the device trees to correctly describe this.
>
> While doing this update the CPU mask to match the number of described
> CPUs as well.
>
> Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
> ---
>
> Arnd, Olof: This is on top of linux-next/master as it patches the Juno
> as well as all the other ARM DTs.
>
> arch/arm64/boot/dts/arm/foundation-v8.dts | 8 ++++----
> arch/arm64/boot/dts/arm/juno.dts | 8 ++++----
> arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 8 ++++----
> 3 files changed, 12 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts
> index 4a06090..27f3296 100644
> --- a/arch/arm64/boot/dts/arm/foundation-v8.dts
> +++ b/arch/arm64/boot/dts/arm/foundation-v8.dts
> @@ -78,10 +78,10 @@
>
> timer {
> compatible = "arm,armv8-timer";
> - interrupts = <1 13 0xff01>,
> - <1 14 0xff01>,
> - <1 11 0xff01>,
> - <1 10 0xff01>;
> + interrupts = <1 13 0xf08>,
> + <1 14 0xf08>,
> + <1 11 0xf08>,
> + <1 10 0xf08>;
> clock-frequency = <100000000>;
> };
>
> diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
> index 097ecc4..cb3073e 100644
> --- a/arch/arm64/boot/dts/arm/juno.dts
> +++ b/arch/arm64/boot/dts/arm/juno.dts
> @@ -98,10 +98,10 @@
>
> timer {
> compatible = "arm,armv8-timer";
> - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>;
> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
> };
>
> pmu {
> diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> index 572005e..efc59b3 100644
> --- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> +++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> @@ -81,10 +81,10 @@
>
> timer {
> compatible = "arm,armv8-timer";
> - interrupts = <1 13 0xff01>,
> - <1 14 0xff01>,
> - <1 11 0xff01>,
> - <1 10 0xff01>;
> + interrupts = <1 13 0xf08>,
> + <1 14 0xf08>,
> + <1 11 0xf08>,
> + <1 10 0xf08>;
> clock-frequency = <100000000>;
> };
>
>
Sorry, but that's wrong. Despite the *cores* having an level-low output,
the GIC only triggers on *level-high*. Yes, there is probably an
inverter in between.
M.
--
Jazz is not dead. It just smells funny...
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH] arm64: ARM: Fix the Generic Timers interrupt active level description
@ 2014-11-27 14:43 ` Marc Zyngier
0 siblings, 0 replies; 18+ messages in thread
From: Marc Zyngier @ 2014-11-27 14:43 UTC (permalink / raw)
To: Liviu Dudau, Arnd Bergmann, Olof Johansson
Cc: Mark Rutland, Rob Herring, Ian Campbell, Will Deacon,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
On 27/11/14 14:36, Liviu Dudau wrote:
> The Cortex-A5x TRM states in paragraph "9.2 Generic Timer functional
> description" that generic timers provide an active-LOW interrupt
> output. Fix the device trees to correctly describe this.
>
> While doing this update the CPU mask to match the number of described
> CPUs as well.
>
> Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
> ---
>
> Arnd, Olof: This is on top of linux-next/master as it patches the Juno
> as well as all the other ARM DTs.
>
> arch/arm64/boot/dts/arm/foundation-v8.dts | 8 ++++----
> arch/arm64/boot/dts/arm/juno.dts | 8 ++++----
> arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 8 ++++----
> 3 files changed, 12 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts
> index 4a06090..27f3296 100644
> --- a/arch/arm64/boot/dts/arm/foundation-v8.dts
> +++ b/arch/arm64/boot/dts/arm/foundation-v8.dts
> @@ -78,10 +78,10 @@
>
> timer {
> compatible = "arm,armv8-timer";
> - interrupts = <1 13 0xff01>,
> - <1 14 0xff01>,
> - <1 11 0xff01>,
> - <1 10 0xff01>;
> + interrupts = <1 13 0xf08>,
> + <1 14 0xf08>,
> + <1 11 0xf08>,
> + <1 10 0xf08>;
> clock-frequency = <100000000>;
> };
>
> diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
> index 097ecc4..cb3073e 100644
> --- a/arch/arm64/boot/dts/arm/juno.dts
> +++ b/arch/arm64/boot/dts/arm/juno.dts
> @@ -98,10 +98,10 @@
>
> timer {
> compatible = "arm,armv8-timer";
> - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>;
> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
> };
>
> pmu {
> diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> index 572005e..efc59b3 100644
> --- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> +++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> @@ -81,10 +81,10 @@
>
> timer {
> compatible = "arm,armv8-timer";
> - interrupts = <1 13 0xff01>,
> - <1 14 0xff01>,
> - <1 11 0xff01>,
> - <1 10 0xff01>;
> + interrupts = <1 13 0xf08>,
> + <1 14 0xf08>,
> + <1 11 0xf08>,
> + <1 10 0xf08>;
> clock-frequency = <100000000>;
> };
>
>
Sorry, but that's wrong. Despite the *cores* having an level-low output,
the GIC only triggers on *level-high*. Yes, there is probably an
inverter in between.
M.
--
Jazz is not dead. It just smells funny...
^ permalink raw reply [flat|nested] 18+ messages in thread* [PATCH] arm64: ARM: Fix the Generic Timers interrupt active level description
@ 2014-11-27 15:33 ` Liviu Dudau
0 siblings, 0 replies; 18+ messages in thread
From: Liviu Dudau @ 2014-11-27 15:33 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Nov 27, 2014 at 02:43:38PM +0000, Marc Zyngier wrote:
> On 27/11/14 14:36, Liviu Dudau wrote:
> > The Cortex-A5x TRM states in paragraph "9.2 Generic Timer functional
> > description" that generic timers provide an active-LOW interrupt
> > output. Fix the device trees to correctly describe this.
> >
> > While doing this update the CPU mask to match the number of described
> > CPUs as well.
> >
> > Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
> > ---
> >
> > Arnd, Olof: This is on top of linux-next/master as it patches the Juno
> > as well as all the other ARM DTs.
> >
> > arch/arm64/boot/dts/arm/foundation-v8.dts | 8 ++++----
> > arch/arm64/boot/dts/arm/juno.dts | 8 ++++----
> > arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 8 ++++----
> > 3 files changed, 12 insertions(+), 12 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts
> > index 4a06090..27f3296 100644
> > --- a/arch/arm64/boot/dts/arm/foundation-v8.dts
> > +++ b/arch/arm64/boot/dts/arm/foundation-v8.dts
> > @@ -78,10 +78,10 @@
> >
> > timer {
> > compatible = "arm,armv8-timer";
> > - interrupts = <1 13 0xff01>,
> > - <1 14 0xff01>,
> > - <1 11 0xff01>,
> > - <1 10 0xff01>;
> > + interrupts = <1 13 0xf08>,
> > + <1 14 0xf08>,
> > + <1 11 0xf08>,
> > + <1 10 0xf08>;
> > clock-frequency = <100000000>;
> > };
> >
> > diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
> > index 097ecc4..cb3073e 100644
> > --- a/arch/arm64/boot/dts/arm/juno.dts
> > +++ b/arch/arm64/boot/dts/arm/juno.dts
> > @@ -98,10 +98,10 @@
> >
> > timer {
> > compatible = "arm,armv8-timer";
> > - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> > - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> > - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> > - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>;
> > + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
> > };
> >
> > pmu {
> > diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> > index 572005e..efc59b3 100644
> > --- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> > +++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> > @@ -81,10 +81,10 @@
> >
> > timer {
> > compatible = "arm,armv8-timer";
> > - interrupts = <1 13 0xff01>,
> > - <1 14 0xff01>,
> > - <1 11 0xff01>,
> > - <1 10 0xff01>;
> > + interrupts = <1 13 0xf08>,
> > + <1 14 0xf08>,
> > + <1 11 0xf08>,
> > + <1 10 0xf08>;
> > clock-frequency = <100000000>;
> > };
> >
> >
>
> Sorry, but that's wrong. Despite the *cores* having an level-low output,
> the GIC only triggers on *level-high*. Yes, there is probably an
> inverter in between.
Hah, one can never read enough specs to get the right answer!
I'll update the patch.
Best regards,
Liviu
>
> M.
> --
> Jazz is not dead. It just smells funny...
>
--
====================
| I would like to |
| fix the world, |
| but they're not |
| giving me the |
\ source code! /
---------------
?\_(?)_/?
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH] arm64: ARM: Fix the Generic Timers interrupt active level description
@ 2014-11-27 15:33 ` Liviu Dudau
0 siblings, 0 replies; 18+ messages in thread
From: Liviu Dudau @ 2014-11-27 15:33 UTC (permalink / raw)
To: Marc Zyngier
Cc: Arnd Bergmann, Olof Johansson, Mark Rutland, Rob Herring,
Ian Campbell, Will Deacon, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
On Thu, Nov 27, 2014 at 02:43:38PM +0000, Marc Zyngier wrote:
> On 27/11/14 14:36, Liviu Dudau wrote:
> > The Cortex-A5x TRM states in paragraph "9.2 Generic Timer functional
> > description" that generic timers provide an active-LOW interrupt
> > output. Fix the device trees to correctly describe this.
> >
> > While doing this update the CPU mask to match the number of described
> > CPUs as well.
> >
> > Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
> > ---
> >
> > Arnd, Olof: This is on top of linux-next/master as it patches the Juno
> > as well as all the other ARM DTs.
> >
> > arch/arm64/boot/dts/arm/foundation-v8.dts | 8 ++++----
> > arch/arm64/boot/dts/arm/juno.dts | 8 ++++----
> > arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 8 ++++----
> > 3 files changed, 12 insertions(+), 12 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts
> > index 4a06090..27f3296 100644
> > --- a/arch/arm64/boot/dts/arm/foundation-v8.dts
> > +++ b/arch/arm64/boot/dts/arm/foundation-v8.dts
> > @@ -78,10 +78,10 @@
> >
> > timer {
> > compatible = "arm,armv8-timer";
> > - interrupts = <1 13 0xff01>,
> > - <1 14 0xff01>,
> > - <1 11 0xff01>,
> > - <1 10 0xff01>;
> > + interrupts = <1 13 0xf08>,
> > + <1 14 0xf08>,
> > + <1 11 0xf08>,
> > + <1 10 0xf08>;
> > clock-frequency = <100000000>;
> > };
> >
> > diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
> > index 097ecc4..cb3073e 100644
> > --- a/arch/arm64/boot/dts/arm/juno.dts
> > +++ b/arch/arm64/boot/dts/arm/juno.dts
> > @@ -98,10 +98,10 @@
> >
> > timer {
> > compatible = "arm,armv8-timer";
> > - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> > - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> > - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> > - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>;
> > + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
> > };
> >
> > pmu {
> > diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> > index 572005e..efc59b3 100644
> > --- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> > +++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> > @@ -81,10 +81,10 @@
> >
> > timer {
> > compatible = "arm,armv8-timer";
> > - interrupts = <1 13 0xff01>,
> > - <1 14 0xff01>,
> > - <1 11 0xff01>,
> > - <1 10 0xff01>;
> > + interrupts = <1 13 0xf08>,
> > + <1 14 0xf08>,
> > + <1 11 0xf08>,
> > + <1 10 0xf08>;
> > clock-frequency = <100000000>;
> > };
> >
> >
>
> Sorry, but that's wrong. Despite the *cores* having an level-low output,
> the GIC only triggers on *level-high*. Yes, there is probably an
> inverter in between.
Hah, one can never read enough specs to get the right answer!
I'll update the patch.
Best regards,
Liviu
>
> M.
> --
> Jazz is not dead. It just smells funny...
>
--
====================
| I would like to |
| fix the world, |
| but they're not |
| giving me the |
\ source code! /
---------------
¯\_(ツ)_/¯
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH] arm64: ARM: Fix the Generic Timers interrupt active level description
@ 2014-11-27 15:33 ` Liviu Dudau
0 siblings, 0 replies; 18+ messages in thread
From: Liviu Dudau @ 2014-11-27 15:33 UTC (permalink / raw)
To: Marc Zyngier
Cc: Arnd Bergmann, Olof Johansson, Mark Rutland, Rob Herring,
Ian Campbell, Will Deacon,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
On Thu, Nov 27, 2014 at 02:43:38PM +0000, Marc Zyngier wrote:
> On 27/11/14 14:36, Liviu Dudau wrote:
> > The Cortex-A5x TRM states in paragraph "9.2 Generic Timer functional
> > description" that generic timers provide an active-LOW interrupt
> > output. Fix the device trees to correctly describe this.
> >
> > While doing this update the CPU mask to match the number of described
> > CPUs as well.
> >
> > Signed-off-by: Liviu Dudau <Liviu.Dudau-5wv7dgnIgG8@public.gmane.org>
> > ---
> >
> > Arnd, Olof: This is on top of linux-next/master as it patches the Juno
> > as well as all the other ARM DTs.
> >
> > arch/arm64/boot/dts/arm/foundation-v8.dts | 8 ++++----
> > arch/arm64/boot/dts/arm/juno.dts | 8 ++++----
> > arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 8 ++++----
> > 3 files changed, 12 insertions(+), 12 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts
> > index 4a06090..27f3296 100644
> > --- a/arch/arm64/boot/dts/arm/foundation-v8.dts
> > +++ b/arch/arm64/boot/dts/arm/foundation-v8.dts
> > @@ -78,10 +78,10 @@
> >
> > timer {
> > compatible = "arm,armv8-timer";
> > - interrupts = <1 13 0xff01>,
> > - <1 14 0xff01>,
> > - <1 11 0xff01>,
> > - <1 10 0xff01>;
> > + interrupts = <1 13 0xf08>,
> > + <1 14 0xf08>,
> > + <1 11 0xf08>,
> > + <1 10 0xf08>;
> > clock-frequency = <100000000>;
> > };
> >
> > diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
> > index 097ecc4..cb3073e 100644
> > --- a/arch/arm64/boot/dts/arm/juno.dts
> > +++ b/arch/arm64/boot/dts/arm/juno.dts
> > @@ -98,10 +98,10 @@
> >
> > timer {
> > compatible = "arm,armv8-timer";
> > - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> > - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> > - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> > - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>;
> > + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
> > };
> >
> > pmu {
> > diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> > index 572005e..efc59b3 100644
> > --- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> > +++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> > @@ -81,10 +81,10 @@
> >
> > timer {
> > compatible = "arm,armv8-timer";
> > - interrupts = <1 13 0xff01>,
> > - <1 14 0xff01>,
> > - <1 11 0xff01>,
> > - <1 10 0xff01>;
> > + interrupts = <1 13 0xf08>,
> > + <1 14 0xf08>,
> > + <1 11 0xf08>,
> > + <1 10 0xf08>;
> > clock-frequency = <100000000>;
> > };
> >
> >
>
> Sorry, but that's wrong. Despite the *cores* having an level-low output,
> the GIC only triggers on *level-high*. Yes, there is probably an
> inverter in between.
Hah, one can never read enough specs to get the right answer!
I'll update the patch.
Best regards,
Liviu
>
> M.
> --
> Jazz is not dead. It just smells funny...
>
--
====================
| I would like to |
| fix the world, |
| but they're not |
| giving me the |
\ source code! /
---------------
¯\_(ツ)_/¯
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH] arm64: ARM: Fix the Generic Timers interrupt active level description
2014-11-27 14:43 ` Marc Zyngier
@ 2014-11-27 15:34 ` Liviu Dudau
-1 siblings, 0 replies; 18+ messages in thread
From: Liviu Dudau @ 2014-11-27 15:34 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Nov 27, 2014 at 02:43:38PM +0000, Marc Zyngier wrote:
> On 27/11/14 14:36, Liviu Dudau wrote:
> > The Cortex-A5x TRM states in paragraph "9.2 Generic Timer functional
> > description" that generic timers provide an active-LOW interrupt
> > output. Fix the device trees to correctly describe this.
> >
> > While doing this update the CPU mask to match the number of described
> > CPUs as well.
> >
> > Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
> > ---
> >
> > Arnd, Olof: This is on top of linux-next/master as it patches the Juno
> > as well as all the other ARM DTs.
> >
> > arch/arm64/boot/dts/arm/foundation-v8.dts | 8 ++++----
> > arch/arm64/boot/dts/arm/juno.dts | 8 ++++----
> > arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 8 ++++----
> > 3 files changed, 12 insertions(+), 12 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts
> > index 4a06090..27f3296 100644
> > --- a/arch/arm64/boot/dts/arm/foundation-v8.dts
> > +++ b/arch/arm64/boot/dts/arm/foundation-v8.dts
> > @@ -78,10 +78,10 @@
> >
> > timer {
> > compatible = "arm,armv8-timer";
> > - interrupts = <1 13 0xff01>,
> > - <1 14 0xff01>,
> > - <1 11 0xff01>,
> > - <1 10 0xff01>;
> > + interrupts = <1 13 0xf08>,
> > + <1 14 0xf08>,
> > + <1 11 0xf08>,
> > + <1 10 0xf08>;
> > clock-frequency = <100000000>;
> > };
> >
> > diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
> > index 097ecc4..cb3073e 100644
> > --- a/arch/arm64/boot/dts/arm/juno.dts
> > +++ b/arch/arm64/boot/dts/arm/juno.dts
> > @@ -98,10 +98,10 @@
> >
> > timer {
> > compatible = "arm,armv8-timer";
> > - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> > - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> > - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> > - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>;
> > + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
> > };
> >
> > pmu {
> > diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> > index 572005e..efc59b3 100644
> > --- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> > +++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> > @@ -81,10 +81,10 @@
> >
> > timer {
> > compatible = "arm,armv8-timer";
> > - interrupts = <1 13 0xff01>,
> > - <1 14 0xff01>,
> > - <1 11 0xff01>,
> > - <1 10 0xff01>;
> > + interrupts = <1 13 0xf08>,
> > + <1 14 0xf08>,
> > + <1 11 0xf08>,
> > + <1 10 0xf08>;
> > clock-frequency = <100000000>;
> > };
> >
> >
>
> Sorry, but that's wrong. Despite the *cores* having an level-low output,
> the GIC only triggers on *level-high*. Yes, there is probably an
> inverter in between.
BTW, should I also update the bindings example to get this right?
Regards,
Liviu
>
> M.
> --
> Jazz is not dead. It just smells funny...
>
--
====================
| I would like to |
| fix the world, |
| but they're not |
| giving me the |
\ source code! /
---------------
?\_(?)_/?
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH] arm64: ARM: Fix the Generic Timers interrupt active level description
@ 2014-11-27 15:34 ` Liviu Dudau
0 siblings, 0 replies; 18+ messages in thread
From: Liviu Dudau @ 2014-11-27 15:34 UTC (permalink / raw)
To: Marc Zyngier
Cc: Arnd Bergmann, Olof Johansson, Mark Rutland, Rob Herring,
Ian Campbell, Will Deacon, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
On Thu, Nov 27, 2014 at 02:43:38PM +0000, Marc Zyngier wrote:
> On 27/11/14 14:36, Liviu Dudau wrote:
> > The Cortex-A5x TRM states in paragraph "9.2 Generic Timer functional
> > description" that generic timers provide an active-LOW interrupt
> > output. Fix the device trees to correctly describe this.
> >
> > While doing this update the CPU mask to match the number of described
> > CPUs as well.
> >
> > Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
> > ---
> >
> > Arnd, Olof: This is on top of linux-next/master as it patches the Juno
> > as well as all the other ARM DTs.
> >
> > arch/arm64/boot/dts/arm/foundation-v8.dts | 8 ++++----
> > arch/arm64/boot/dts/arm/juno.dts | 8 ++++----
> > arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 8 ++++----
> > 3 files changed, 12 insertions(+), 12 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts
> > index 4a06090..27f3296 100644
> > --- a/arch/arm64/boot/dts/arm/foundation-v8.dts
> > +++ b/arch/arm64/boot/dts/arm/foundation-v8.dts
> > @@ -78,10 +78,10 @@
> >
> > timer {
> > compatible = "arm,armv8-timer";
> > - interrupts = <1 13 0xff01>,
> > - <1 14 0xff01>,
> > - <1 11 0xff01>,
> > - <1 10 0xff01>;
> > + interrupts = <1 13 0xf08>,
> > + <1 14 0xf08>,
> > + <1 11 0xf08>,
> > + <1 10 0xf08>;
> > clock-frequency = <100000000>;
> > };
> >
> > diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
> > index 097ecc4..cb3073e 100644
> > --- a/arch/arm64/boot/dts/arm/juno.dts
> > +++ b/arch/arm64/boot/dts/arm/juno.dts
> > @@ -98,10 +98,10 @@
> >
> > timer {
> > compatible = "arm,armv8-timer";
> > - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> > - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> > - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> > - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>;
> > + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
> > };
> >
> > pmu {
> > diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> > index 572005e..efc59b3 100644
> > --- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> > +++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> > @@ -81,10 +81,10 @@
> >
> > timer {
> > compatible = "arm,armv8-timer";
> > - interrupts = <1 13 0xff01>,
> > - <1 14 0xff01>,
> > - <1 11 0xff01>,
> > - <1 10 0xff01>;
> > + interrupts = <1 13 0xf08>,
> > + <1 14 0xf08>,
> > + <1 11 0xf08>,
> > + <1 10 0xf08>;
> > clock-frequency = <100000000>;
> > };
> >
> >
>
> Sorry, but that's wrong. Despite the *cores* having an level-low output,
> the GIC only triggers on *level-high*. Yes, there is probably an
> inverter in between.
BTW, should I also update the bindings example to get this right?
Regards,
Liviu
>
> M.
> --
> Jazz is not dead. It just smells funny...
>
--
====================
| I would like to |
| fix the world, |
| but they're not |
| giving me the |
\ source code! /
---------------
¯\_(ツ)_/¯
^ permalink raw reply [flat|nested] 18+ messages in thread* [PATCH] arm64: ARM: Fix the Generic Timers interrupt active level description
@ 2014-11-27 15:48 ` Marc Zyngier
0 siblings, 0 replies; 18+ messages in thread
From: Marc Zyngier @ 2014-11-27 15:48 UTC (permalink / raw)
To: linux-arm-kernel
On 27/11/14 15:34, Liviu Dudau wrote:
> On Thu, Nov 27, 2014 at 02:43:38PM +0000, Marc Zyngier wrote:
>> On 27/11/14 14:36, Liviu Dudau wrote:
>>> The Cortex-A5x TRM states in paragraph "9.2 Generic Timer functional
>>> description" that generic timers provide an active-LOW interrupt
>>> output. Fix the device trees to correctly describe this.
>>>
>>> While doing this update the CPU mask to match the number of described
>>> CPUs as well.
>>>
>>> Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
>>> ---
>>>
>>> Arnd, Olof: This is on top of linux-next/master as it patches the Juno
>>> as well as all the other ARM DTs.
>>>
>>> arch/arm64/boot/dts/arm/foundation-v8.dts | 8 ++++----
>>> arch/arm64/boot/dts/arm/juno.dts | 8 ++++----
>>> arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 8 ++++----
>>> 3 files changed, 12 insertions(+), 12 deletions(-)
>>>
>>> diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts
>>> index 4a06090..27f3296 100644
>>> --- a/arch/arm64/boot/dts/arm/foundation-v8.dts
>>> +++ b/arch/arm64/boot/dts/arm/foundation-v8.dts
>>> @@ -78,10 +78,10 @@
>>>
>>> timer {
>>> compatible = "arm,armv8-timer";
>>> - interrupts = <1 13 0xff01>,
>>> - <1 14 0xff01>,
>>> - <1 11 0xff01>,
>>> - <1 10 0xff01>;
>>> + interrupts = <1 13 0xf08>,
>>> + <1 14 0xf08>,
>>> + <1 11 0xf08>,
>>> + <1 10 0xf08>;
>>> clock-frequency = <100000000>;
>>> };
>>>
>>> diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
>>> index 097ecc4..cb3073e 100644
>>> --- a/arch/arm64/boot/dts/arm/juno.dts
>>> +++ b/arch/arm64/boot/dts/arm/juno.dts
>>> @@ -98,10 +98,10 @@
>>>
>>> timer {
>>> compatible = "arm,armv8-timer";
>>> - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
>>> - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
>>> - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
>>> - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>;
>>> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
>>> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
>>> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
>>> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
>>> };
>>>
>>> pmu {
>>> diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
>>> index 572005e..efc59b3 100644
>>> --- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
>>> +++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
>>> @@ -81,10 +81,10 @@
>>>
>>> timer {
>>> compatible = "arm,armv8-timer";
>>> - interrupts = <1 13 0xff01>,
>>> - <1 14 0xff01>,
>>> - <1 11 0xff01>,
>>> - <1 10 0xff01>;
>>> + interrupts = <1 13 0xf08>,
>>> + <1 14 0xf08>,
>>> + <1 11 0xf08>,
>>> + <1 10 0xf08>;
>>> clock-frequency = <100000000>;
>>> };
>>>
>>>
>>
>> Sorry, but that's wrong. Despite the *cores* having an level-low output,
>> the GIC only triggers on *level-high*. Yes, there is probably an
>> inverter in between.
>
> BTW, should I also update the bindings example to get this right?
Definitely. I'm pretty sure I got it wrong too at some point...
M.
--
Jazz is not dead. It just smells funny...
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH] arm64: ARM: Fix the Generic Timers interrupt active level description
@ 2014-11-27 15:48 ` Marc Zyngier
0 siblings, 0 replies; 18+ messages in thread
From: Marc Zyngier @ 2014-11-27 15:48 UTC (permalink / raw)
To: Liviu Dudau
Cc: Arnd Bergmann, Olof Johansson, Mark Rutland, Rob Herring,
Ian Campbell, Will Deacon, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
On 27/11/14 15:34, Liviu Dudau wrote:
> On Thu, Nov 27, 2014 at 02:43:38PM +0000, Marc Zyngier wrote:
>> On 27/11/14 14:36, Liviu Dudau wrote:
>>> The Cortex-A5x TRM states in paragraph "9.2 Generic Timer functional
>>> description" that generic timers provide an active-LOW interrupt
>>> output. Fix the device trees to correctly describe this.
>>>
>>> While doing this update the CPU mask to match the number of described
>>> CPUs as well.
>>>
>>> Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
>>> ---
>>>
>>> Arnd, Olof: This is on top of linux-next/master as it patches the Juno
>>> as well as all the other ARM DTs.
>>>
>>> arch/arm64/boot/dts/arm/foundation-v8.dts | 8 ++++----
>>> arch/arm64/boot/dts/arm/juno.dts | 8 ++++----
>>> arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 8 ++++----
>>> 3 files changed, 12 insertions(+), 12 deletions(-)
>>>
>>> diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts
>>> index 4a06090..27f3296 100644
>>> --- a/arch/arm64/boot/dts/arm/foundation-v8.dts
>>> +++ b/arch/arm64/boot/dts/arm/foundation-v8.dts
>>> @@ -78,10 +78,10 @@
>>>
>>> timer {
>>> compatible = "arm,armv8-timer";
>>> - interrupts = <1 13 0xff01>,
>>> - <1 14 0xff01>,
>>> - <1 11 0xff01>,
>>> - <1 10 0xff01>;
>>> + interrupts = <1 13 0xf08>,
>>> + <1 14 0xf08>,
>>> + <1 11 0xf08>,
>>> + <1 10 0xf08>;
>>> clock-frequency = <100000000>;
>>> };
>>>
>>> diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
>>> index 097ecc4..cb3073e 100644
>>> --- a/arch/arm64/boot/dts/arm/juno.dts
>>> +++ b/arch/arm64/boot/dts/arm/juno.dts
>>> @@ -98,10 +98,10 @@
>>>
>>> timer {
>>> compatible = "arm,armv8-timer";
>>> - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
>>> - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
>>> - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
>>> - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>;
>>> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
>>> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
>>> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
>>> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
>>> };
>>>
>>> pmu {
>>> diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
>>> index 572005e..efc59b3 100644
>>> --- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
>>> +++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
>>> @@ -81,10 +81,10 @@
>>>
>>> timer {
>>> compatible = "arm,armv8-timer";
>>> - interrupts = <1 13 0xff01>,
>>> - <1 14 0xff01>,
>>> - <1 11 0xff01>,
>>> - <1 10 0xff01>;
>>> + interrupts = <1 13 0xf08>,
>>> + <1 14 0xf08>,
>>> + <1 11 0xf08>,
>>> + <1 10 0xf08>;
>>> clock-frequency = <100000000>;
>>> };
>>>
>>>
>>
>> Sorry, but that's wrong. Despite the *cores* having an level-low output,
>> the GIC only triggers on *level-high*. Yes, there is probably an
>> inverter in between.
>
> BTW, should I also update the bindings example to get this right?
Definitely. I'm pretty sure I got it wrong too at some point...
M.
--
Jazz is not dead. It just smells funny...
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH] arm64: ARM: Fix the Generic Timers interrupt active level description
@ 2014-11-27 15:48 ` Marc Zyngier
0 siblings, 0 replies; 18+ messages in thread
From: Marc Zyngier @ 2014-11-27 15:48 UTC (permalink / raw)
To: Liviu Dudau
Cc: Arnd Bergmann, Olof Johansson, Mark Rutland, Rob Herring,
Ian Campbell, Will Deacon,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
On 27/11/14 15:34, Liviu Dudau wrote:
> On Thu, Nov 27, 2014 at 02:43:38PM +0000, Marc Zyngier wrote:
>> On 27/11/14 14:36, Liviu Dudau wrote:
>>> The Cortex-A5x TRM states in paragraph "9.2 Generic Timer functional
>>> description" that generic timers provide an active-LOW interrupt
>>> output. Fix the device trees to correctly describe this.
>>>
>>> While doing this update the CPU mask to match the number of described
>>> CPUs as well.
>>>
>>> Signed-off-by: Liviu Dudau <Liviu.Dudau-5wv7dgnIgG8@public.gmane.org>
>>> ---
>>>
>>> Arnd, Olof: This is on top of linux-next/master as it patches the Juno
>>> as well as all the other ARM DTs.
>>>
>>> arch/arm64/boot/dts/arm/foundation-v8.dts | 8 ++++----
>>> arch/arm64/boot/dts/arm/juno.dts | 8 ++++----
>>> arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 8 ++++----
>>> 3 files changed, 12 insertions(+), 12 deletions(-)
>>>
>>> diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts
>>> index 4a06090..27f3296 100644
>>> --- a/arch/arm64/boot/dts/arm/foundation-v8.dts
>>> +++ b/arch/arm64/boot/dts/arm/foundation-v8.dts
>>> @@ -78,10 +78,10 @@
>>>
>>> timer {
>>> compatible = "arm,armv8-timer";
>>> - interrupts = <1 13 0xff01>,
>>> - <1 14 0xff01>,
>>> - <1 11 0xff01>,
>>> - <1 10 0xff01>;
>>> + interrupts = <1 13 0xf08>,
>>> + <1 14 0xf08>,
>>> + <1 11 0xf08>,
>>> + <1 10 0xf08>;
>>> clock-frequency = <100000000>;
>>> };
>>>
>>> diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
>>> index 097ecc4..cb3073e 100644
>>> --- a/arch/arm64/boot/dts/arm/juno.dts
>>> +++ b/arch/arm64/boot/dts/arm/juno.dts
>>> @@ -98,10 +98,10 @@
>>>
>>> timer {
>>> compatible = "arm,armv8-timer";
>>> - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
>>> - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
>>> - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
>>> - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>;
>>> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
>>> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
>>> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
>>> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
>>> };
>>>
>>> pmu {
>>> diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
>>> index 572005e..efc59b3 100644
>>> --- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
>>> +++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
>>> @@ -81,10 +81,10 @@
>>>
>>> timer {
>>> compatible = "arm,armv8-timer";
>>> - interrupts = <1 13 0xff01>,
>>> - <1 14 0xff01>,
>>> - <1 11 0xff01>,
>>> - <1 10 0xff01>;
>>> + interrupts = <1 13 0xf08>,
>>> + <1 14 0xf08>,
>>> + <1 11 0xf08>,
>>> + <1 10 0xf08>;
>>> clock-frequency = <100000000>;
>>> };
>>>
>>>
>>
>> Sorry, but that's wrong. Despite the *cores* having an level-low output,
>> the GIC only triggers on *level-high*. Yes, there is probably an
>> inverter in between.
>
> BTW, should I also update the bindings example to get this right?
Definitely. I'm pretty sure I got it wrong too at some point...
M.
--
Jazz is not dead. It just smells funny...
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH] arm64: ARM: Fix the Generic Timers interrupt active level description
2014-11-27 14:36 ` Liviu Dudau
@ 2014-11-28 11:50 ` Liviu Dudau
-1 siblings, 0 replies; 18+ messages in thread
From: Liviu Dudau @ 2014-11-28 11:50 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Nov 27, 2014 at 02:36:45PM +0000, Liviu Dudau wrote:
> The Cortex-A5x TRM states in paragraph "9.2 Generic Timer functional
> description" that generic timers provide an active-LOW interrupt
> output. Fix the device trees to correctly describe this.
>
> While doing this update the CPU mask to match the number of described
> CPUs as well.
>
> Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
arm-soc maintainers: Please discard my v2 patch as it proved to be the wrong fix.
This patch should still be considered for inclusion for v3.19 as it fixes the
arm64 DT files.
Marc, care to Ack this patch?
Best regards,
Liviu
> ---
>
> Arnd, Olof: This is on top of linux-next/master as it patches the Juno
> as well as all the other ARM DTs.
>
> arch/arm64/boot/dts/arm/foundation-v8.dts | 8 ++++----
> arch/arm64/boot/dts/arm/juno.dts | 8 ++++----
> arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 8 ++++----
> 3 files changed, 12 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts
> index 4a06090..27f3296 100644
> --- a/arch/arm64/boot/dts/arm/foundation-v8.dts
> +++ b/arch/arm64/boot/dts/arm/foundation-v8.dts
> @@ -78,10 +78,10 @@
>
> timer {
> compatible = "arm,armv8-timer";
> - interrupts = <1 13 0xff01>,
> - <1 14 0xff01>,
> - <1 11 0xff01>,
> - <1 10 0xff01>;
> + interrupts = <1 13 0xf08>,
> + <1 14 0xf08>,
> + <1 11 0xf08>,
> + <1 10 0xf08>;
> clock-frequency = <100000000>;
> };
>
> diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
> index 097ecc4..cb3073e 100644
> --- a/arch/arm64/boot/dts/arm/juno.dts
> +++ b/arch/arm64/boot/dts/arm/juno.dts
> @@ -98,10 +98,10 @@
>
> timer {
> compatible = "arm,armv8-timer";
> - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>;
> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
> };
>
> pmu {
> diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> index 572005e..efc59b3 100644
> --- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> +++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> @@ -81,10 +81,10 @@
>
> timer {
> compatible = "arm,armv8-timer";
> - interrupts = <1 13 0xff01>,
> - <1 14 0xff01>,
> - <1 11 0xff01>,
> - <1 10 0xff01>;
> + interrupts = <1 13 0xf08>,
> + <1 14 0xf08>,
> + <1 11 0xf08>,
> + <1 10 0xf08>;
> clock-frequency = <100000000>;
> };
>
> --
> 2.1.3
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
--
====================
| I would like to |
| fix the world, |
| but they're not |
| giving me the |
\ source code! /
---------------
?\_(?)_/?
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH] arm64: ARM: Fix the Generic Timers interrupt active level description
@ 2014-11-28 11:50 ` Liviu Dudau
0 siblings, 0 replies; 18+ messages in thread
From: Liviu Dudau @ 2014-11-28 11:50 UTC (permalink / raw)
To: Arnd Bergmann, Marc Zyngier, Olof Johansson
Cc: Mark Rutland, devicetree@vger.kernel.org, Ian Campbell,
Will Deacon, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
On Thu, Nov 27, 2014 at 02:36:45PM +0000, Liviu Dudau wrote:
> The Cortex-A5x TRM states in paragraph "9.2 Generic Timer functional
> description" that generic timers provide an active-LOW interrupt
> output. Fix the device trees to correctly describe this.
>
> While doing this update the CPU mask to match the number of described
> CPUs as well.
>
> Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
arm-soc maintainers: Please discard my v2 patch as it proved to be the wrong fix.
This patch should still be considered for inclusion for v3.19 as it fixes the
arm64 DT files.
Marc, care to Ack this patch?
Best regards,
Liviu
> ---
>
> Arnd, Olof: This is on top of linux-next/master as it patches the Juno
> as well as all the other ARM DTs.
>
> arch/arm64/boot/dts/arm/foundation-v8.dts | 8 ++++----
> arch/arm64/boot/dts/arm/juno.dts | 8 ++++----
> arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 8 ++++----
> 3 files changed, 12 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts
> index 4a06090..27f3296 100644
> --- a/arch/arm64/boot/dts/arm/foundation-v8.dts
> +++ b/arch/arm64/boot/dts/arm/foundation-v8.dts
> @@ -78,10 +78,10 @@
>
> timer {
> compatible = "arm,armv8-timer";
> - interrupts = <1 13 0xff01>,
> - <1 14 0xff01>,
> - <1 11 0xff01>,
> - <1 10 0xff01>;
> + interrupts = <1 13 0xf08>,
> + <1 14 0xf08>,
> + <1 11 0xf08>,
> + <1 10 0xf08>;
> clock-frequency = <100000000>;
> };
>
> diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
> index 097ecc4..cb3073e 100644
> --- a/arch/arm64/boot/dts/arm/juno.dts
> +++ b/arch/arm64/boot/dts/arm/juno.dts
> @@ -98,10 +98,10 @@
>
> timer {
> compatible = "arm,armv8-timer";
> - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>;
> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
> };
>
> pmu {
> diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> index 572005e..efc59b3 100644
> --- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> +++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> @@ -81,10 +81,10 @@
>
> timer {
> compatible = "arm,armv8-timer";
> - interrupts = <1 13 0xff01>,
> - <1 14 0xff01>,
> - <1 11 0xff01>,
> - <1 10 0xff01>;
> + interrupts = <1 13 0xf08>,
> + <1 14 0xf08>,
> + <1 11 0xf08>,
> + <1 10 0xf08>;
> clock-frequency = <100000000>;
> };
>
> --
> 2.1.3
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
--
====================
| I would like to |
| fix the world, |
| but they're not |
| giving me the |
\ source code! /
---------------
¯\_(ツ)_/¯
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH] arm64: ARM: Fix the Generic Timers interrupt active level description
@ 2014-11-28 21:38 ` Arnd Bergmann
0 siblings, 0 replies; 18+ messages in thread
From: Arnd Bergmann @ 2014-11-28 21:38 UTC (permalink / raw)
To: linux-arm-kernel
On Thursday 27 November 2014, Liviu Dudau wrote:
> The Cortex-A5x TRM states in paragraph "9.2 Generic Timer functional
> description" that generic timers provide an active-LOW interrupt
> output. Fix the device trees to correctly describe this.
>
> While doing this update the CPU mask to match the number of described
> CPUs as well.
>
> Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Applied to next/arm64, thanks!
Arnd
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH] arm64: ARM: Fix the Generic Timers interrupt active level description
@ 2014-11-28 21:38 ` Arnd Bergmann
0 siblings, 0 replies; 18+ messages in thread
From: Arnd Bergmann @ 2014-11-28 21:38 UTC (permalink / raw)
To: Liviu Dudau
Cc: Marc Zyngier, Olof Johansson, Mark Rutland, Rob Herring,
Ian Campbell, Will Deacon, devicetree, linux-arm-kernel,
linux-kernel
On Thursday 27 November 2014, Liviu Dudau wrote:
> The Cortex-A5x TRM states in paragraph "9.2 Generic Timer functional
> description" that generic timers provide an active-LOW interrupt
> output. Fix the device trees to correctly describe this.
>
> While doing this update the CPU mask to match the number of described
> CPUs as well.
>
> Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Applied to next/arm64, thanks!
Arnd
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH] arm64: ARM: Fix the Generic Timers interrupt active level description
@ 2014-11-28 21:38 ` Arnd Bergmann
0 siblings, 0 replies; 18+ messages in thread
From: Arnd Bergmann @ 2014-11-28 21:38 UTC (permalink / raw)
To: Liviu Dudau
Cc: Marc Zyngier, Olof Johansson, Mark Rutland, Rob Herring,
Ian Campbell, Will Deacon, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
On Thursday 27 November 2014, Liviu Dudau wrote:
> The Cortex-A5x TRM states in paragraph "9.2 Generic Timer functional
> description" that generic timers provide an active-LOW interrupt
> output. Fix the device trees to correctly describe this.
>
> While doing this update the CPU mask to match the number of described
> CPUs as well.
>
> Signed-off-by: Liviu Dudau <Liviu.Dudau-5wv7dgnIgG8@public.gmane.org>
Applied to next/arm64, thanks!
Arnd
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
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^ permalink raw reply [flat|nested] 18+ messages in thread