[PATCH] KVM: x86: Fix reserved x2apic registers

[PATCH] KVM: x86: Fix reserved x2apic registers

[Nadav Amit]

x2APIC has no registers for DFR and ICR (see Intel SDM 10.12.1.2 "x2APIC
Register Address Space"). KVM needs to cause #GP on such accesses.

Fix it.

Signed-off-by: Nadav Amit <namit@cs.technion.ac.il>
---
 arch/x86/kvm/lapic.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index e0e5642..7611b75 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -1897,6 +1897,12 @@ int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data)
 	if (!irqchip_in_kernel(vcpu->kvm) || !apic_x2apic_mode(apic))
 		return 1;
 
+	if (reg == APIC_DFR || reg == APIC_ICR2) {
+		apic_debug("KVM_APIC_READ: read x2apic reserved register %x\n",
+			   reg);
+		return 1;
+	}
+
 	if (apic_reg_read(apic, reg, 4, &low))
 		return 1;
 	if (msr == 0x830)
-- 
1.9.1

Re: [PATCH] KVM: x86: Fix reserved x2apic registers

[Nadav Amit]

The commit message has a typo - it should be “DFR and ICR2”.
I didn’t post a new version in order not to confuse.

Nadav

Nadav Amit <namit@cs.technion.ac.il> wrote:

> x2APIC has no registers for DFR and ICR (see Intel SDM 10.12.1.2 "x2APIC
> Register Address Space"). KVM needs to cause #GP on such accesses.
> 
> Fix it.
> 
> Signed-off-by: Nadav Amit <namit@cs.technion.ac.il>
> ---
> arch/x86/kvm/lapic.c | 6 ++++++
> 1 file changed, 6 insertions(+)
> 
> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> index e0e5642..7611b75 100644
> --- a/arch/x86/kvm/lapic.c
> +++ b/arch/x86/kvm/lapic.c
> @@ -1897,6 +1897,12 @@ int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data)
> 	if (!irqchip_in_kernel(vcpu->kvm) || !apic_x2apic_mode(apic))
> 		return 1;
> 
> +	if (reg == APIC_DFR || reg == APIC_ICR2) {
> +		apic_debug("KVM_APIC_READ: read x2apic reserved register %x\n",
> +			   reg);
> +		return 1;
> +	}
> +
> 	if (apic_reg_read(apic, reg, 4, &low))
> 		return 1;
> 	if (msr == 0x830)
> -- 
> 1.9.1
> 
> --
> To unsubscribe from this list: send the line "unsubscribe kvm" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH] KVM: x86: Fix reserved x2apic registers

[Radim Krčmář]

2014-11-26 17:11+0200, Nadav Amit:
> x2APIC has no registers for DFR and ICR (see Intel SDM 10.12.1.2 "x2APIC
> Register Address Space"). KVM needs to cause #GP on such accesses.

We should to take care of write to ICR2 as well.

> Fix it.
> 
> Signed-off-by: Nadav Amit <namit@cs.technion.ac.il>
> ---
>  arch/x86/kvm/lapic.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> index e0e5642..7611b75 100644
> --- a/arch/x86/kvm/lapic.c
> +++ b/arch/x86/kvm/lapic.c
> @@ -1897,6 +1897,12 @@ int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data)
>  	if (!irqchip_in_kernel(vcpu->kvm) || !apic_x2apic_mode(apic))
>  		return 1;
>  
> +	if (reg == APIC_DFR || reg == APIC_ICR2) {
> +		apic_debug("KVM_APIC_READ: read x2apic reserved register %x\n",
> +			   reg);
> +		return 1;
> +	}
> +
>  	if (apic_reg_read(apic, reg, 4, &low))
>  		return 1;
>  	if (msr == 0x830)
> -- 
> 1.9.1
> 
> --
> To unsubscribe from this list: send the line "unsubscribe kvm" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v2] KVM: x86: Fix reserved x2apic registers

[Nadav Amit]

x2APIC has no registers for DFR and ICR2 (see Intel SDM 10.12.1.2 "x2APIC
Register Address Space"). KVM needs to cause #GP on such accesses.

Fix it (DFR and ICR2 on read, ICR2 on write, DFR already handled on writes).

Signed-off-by: Nadav Amit <namit@cs.technion.ac.il>

---
v1->v2: Cause #GP on ICR2 write access (as Radim pointed)
---
 arch/x86/kvm/lapic.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index e0e5642..9c90d31 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -1883,6 +1883,9 @@ int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 	if (!irqchip_in_kernel(vcpu->kvm) || !apic_x2apic_mode(apic))
 		return 1;
 
+	if (reg == APIC_ICR2)
+		return 1;
+
 	/* if this is ICR write vector before command */
 	if (msr == 0x830)
 		apic_reg_write(apic, APIC_ICR2, (u32)(data >> 32));
@@ -1897,6 +1900,12 @@ int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data)
 	if (!irqchip_in_kernel(vcpu->kvm) || !apic_x2apic_mode(apic))
 		return 1;
 
+	if (reg == APIC_DFR || reg == APIC_ICR2) {
+		apic_debug("KVM_APIC_READ: read x2apic reserved register %x\n",
+			   reg);
+		return 1;
+	}
+
 	if (apic_reg_read(apic, reg, 4, &low))
 		return 1;
 	if (msr == 0x830)
-- 
1.9.1

Re: [PATCH v2] KVM: x86: Fix reserved x2apic registers

[Radim Krčmář]

2014-11-26 17:56+0200, Nadav Amit:
> x2APIC has no registers for DFR and ICR2 (see Intel SDM 10.12.1.2 "x2APIC
> Register Address Space"). KVM needs to cause #GP on such accesses.
> 
> Fix it (DFR and ICR2 on read, ICR2 on write, DFR already handled on writes).
> 
> Signed-off-by: Nadav Amit <namit@cs.technion.ac.il>
> 
> ---

Reviewed-by: Radim Krčmář <rkrcmar@redhat.com>

> v1->v2: Cause #GP on ICR2 write access (as Radim pointed)
> ---
>  arch/x86/kvm/lapic.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> index e0e5642..9c90d31 100644
> --- a/arch/x86/kvm/lapic.c
> +++ b/arch/x86/kvm/lapic.c
> @@ -1883,6 +1883,9 @@ int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data)
>  	if (!irqchip_in_kernel(vcpu->kvm) || !apic_x2apic_mode(apic))
>  		return 1;
>  
> +	if (reg == APIC_ICR2)
> +		return 1;
> +
>  	/* if this is ICR write vector before command */
>  	if (msr == 0x830)
>  		apic_reg_write(apic, APIC_ICR2, (u32)(data >> 32));
> @@ -1897,6 +1900,12 @@ int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data)
>  	if (!irqchip_in_kernel(vcpu->kvm) || !apic_x2apic_mode(apic))
>  		return 1;
>  
> +	if (reg == APIC_DFR || reg == APIC_ICR2) {
> +		apic_debug("KVM_APIC_READ: read x2apic reserved register %x\n",
> +			   reg);
> +		return 1;
> +	}
> +
>  	if (apic_reg_read(apic, reg, 4, &low))
>  		return 1;
>  	if (msr == 0x830)
> -- 
> 1.9.1
> 

Re: [PATCH v2] KVM: x86: Fix reserved x2apic registers

[Paolo Bonzini]

On 26/11/2014 16:56, Nadav Amit wrote:
> x2APIC has no registers for DFR and ICR2 (see Intel SDM 10.12.1.2 "x2APIC
> Register Address Space"). KVM needs to cause #GP on such accesses.
> 
> Fix it (DFR and ICR2 on read, ICR2 on write, DFR already handled on writes).
> 
> Signed-off-by: Nadav Amit <namit@cs.technion.ac.il>
> 
> ---
> v1->v2: Cause #GP on ICR2 write access (as Radim pointed)
> ---
>  arch/x86/kvm/lapic.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> index e0e5642..9c90d31 100644
> --- a/arch/x86/kvm/lapic.c
> +++ b/arch/x86/kvm/lapic.c
> @@ -1883,6 +1883,9 @@ int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data)
>  	if (!irqchip_in_kernel(vcpu->kvm) || !apic_x2apic_mode(apic))
>  		return 1;
>  
> +	if (reg == APIC_ICR2)
> +		return 1;
> +
>  	/* if this is ICR write vector before command */
>  	if (msr == 0x830)
>  		apic_reg_write(apic, APIC_ICR2, (u32)(data >> 32));
> @@ -1897,6 +1900,12 @@ int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data)
>  	if (!irqchip_in_kernel(vcpu->kvm) || !apic_x2apic_mode(apic))
>  		return 1;
>  
> +	if (reg == APIC_DFR || reg == APIC_ICR2) {
> +		apic_debug("KVM_APIC_READ: read x2apic reserved register %x\n",
> +			   reg);
> +		return 1;
> +	}
> +
>  	if (apic_reg_read(apic, reg, 4, &low))
>  		return 1;
>  	if (msr == 0x830)
> 

Applied, thanks.

Paolo