From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] irqchip: gic: Allow interrupt level to be set for PPIs.
Date: Mon, 01 Dec 2014 11:19:41 +0000 [thread overview]
Message-ID: <547C4ECD.20802@arm.com> (raw)
In-Reply-To: <20141201110358.GA3836@n2100.arm.linux.org.uk>
Hi Russell,
On 01/12/14 11:03, Russell King - ARM Linux wrote:
> On Mon, Dec 01, 2014 at 10:46:13AM +0000, Liviu Dudau wrote:
>> On Mon, Dec 01, 2014 at 10:41:45AM +0000, Russell King - ARM Linux wrote:
>>> On Fri, Nov 28, 2014 at 05:55:40PM +0000, Liviu Dudau wrote:
>>>> + /*
>>>> + * PPIs are optionally configurable, but we cannot distinguish
>>>> + * between high and low, nor falling and rising. Change the
>>>> + * type so that it passes the next check.
>>>
>>> This comment could do with a /lot/ of improvement. It sounds like the
>>> only reason this code exists is to bypass the check. If that's all
>>> that's being done, there's better ways to code it.
>>
>> Hi Russell,
>>
>> You are right, all I want to do is bypass the next check because *if*
>> the PPIs can be configured, then any combination is valid (edge
>> raising/falling, level low/high). In real systems, PPIs tend to be
>> configured with active level low. That falls the existing check.
>
> "fails" :)
>
> If all you want to do is to bypass the following check, what's wrong
> with actually doing that:
>
> - if (type != IRQ_TYPE_LEVEL_HIGH && type != IRQ_TYPE_EDGE_RISING)
> + if (gicirq >= 32 && type != IRQ_TYPE_LEVEL_HIGH &&
> + type != IRQ_TYPE_EDGE_RISING)
> return -EINVAL;
>
I think that will require some additional changes to gic_configure_irq
(in irq-gic-common.c).
Thanks,
M.
--
Jazz is not dead. It just smells funny...
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>
To: Russell King - ARM Linux
<linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>,
Liviu Dudau <Liviu.Dudau-5wv7dgnIgG8@public.gmane.org>
Cc: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Mark Rutland <Mark.Rutland-5wv7dgnIgG8@public.gmane.org>,
Ian Campbell
<ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>,
Thomas Gleixner <tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>,
Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org>,
Haojian Zhuang
<haojian.zhuang-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
LKML <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
LAKML
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
Subject: Re: [PATCH] irqchip: gic: Allow interrupt level to be set for PPIs.
Date: Mon, 01 Dec 2014 11:19:41 +0000 [thread overview]
Message-ID: <547C4ECD.20802@arm.com> (raw)
In-Reply-To: <20141201110358.GA3836-l+eeeJia6m9vn6HldHNs0ANdhmdF6hFW@public.gmane.org>
Hi Russell,
On 01/12/14 11:03, Russell King - ARM Linux wrote:
> On Mon, Dec 01, 2014 at 10:46:13AM +0000, Liviu Dudau wrote:
>> On Mon, Dec 01, 2014 at 10:41:45AM +0000, Russell King - ARM Linux wrote:
>>> On Fri, Nov 28, 2014 at 05:55:40PM +0000, Liviu Dudau wrote:
>>>> + /*
>>>> + * PPIs are optionally configurable, but we cannot distinguish
>>>> + * between high and low, nor falling and rising. Change the
>>>> + * type so that it passes the next check.
>>>
>>> This comment could do with a /lot/ of improvement. It sounds like the
>>> only reason this code exists is to bypass the check. If that's all
>>> that's being done, there's better ways to code it.
>>
>> Hi Russell,
>>
>> You are right, all I want to do is bypass the next check because *if*
>> the PPIs can be configured, then any combination is valid (edge
>> raising/falling, level low/high). In real systems, PPIs tend to be
>> configured with active level low. That falls the existing check.
>
> "fails" :)
>
> If all you want to do is to bypass the following check, what's wrong
> with actually doing that:
>
> - if (type != IRQ_TYPE_LEVEL_HIGH && type != IRQ_TYPE_EDGE_RISING)
> + if (gicirq >= 32 && type != IRQ_TYPE_LEVEL_HIGH &&
> + type != IRQ_TYPE_EDGE_RISING)
> return -EINVAL;
>
I think that will require some additional changes to gic_configure_irq
(in irq-gic-common.c).
Thanks,
M.
--
Jazz is not dead. It just smells funny...
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <marc.zyngier@arm.com>
To: Russell King - ARM Linux <linux@arm.linux.org.uk>,
Liviu Dudau <Liviu.Dudau@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>,
Mark Rutland <Mark.Rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Haojian Zhuang <haojian.zhuang@linaro.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
LKML <linux-kernel@vger.kernel.org>,
LAKML <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH] irqchip: gic: Allow interrupt level to be set for PPIs.
Date: Mon, 01 Dec 2014 11:19:41 +0000 [thread overview]
Message-ID: <547C4ECD.20802@arm.com> (raw)
In-Reply-To: <20141201110358.GA3836@n2100.arm.linux.org.uk>
Hi Russell,
On 01/12/14 11:03, Russell King - ARM Linux wrote:
> On Mon, Dec 01, 2014 at 10:46:13AM +0000, Liviu Dudau wrote:
>> On Mon, Dec 01, 2014 at 10:41:45AM +0000, Russell King - ARM Linux wrote:
>>> On Fri, Nov 28, 2014 at 05:55:40PM +0000, Liviu Dudau wrote:
>>>> + /*
>>>> + * PPIs are optionally configurable, but we cannot distinguish
>>>> + * between high and low, nor falling and rising. Change the
>>>> + * type so that it passes the next check.
>>>
>>> This comment could do with a /lot/ of improvement. It sounds like the
>>> only reason this code exists is to bypass the check. If that's all
>>> that's being done, there's better ways to code it.
>>
>> Hi Russell,
>>
>> You are right, all I want to do is bypass the next check because *if*
>> the PPIs can be configured, then any combination is valid (edge
>> raising/falling, level low/high). In real systems, PPIs tend to be
>> configured with active level low. That falls the existing check.
>
> "fails" :)
>
> If all you want to do is to bypass the following check, what's wrong
> with actually doing that:
>
> - if (type != IRQ_TYPE_LEVEL_HIGH && type != IRQ_TYPE_EDGE_RISING)
> + if (gicirq >= 32 && type != IRQ_TYPE_LEVEL_HIGH &&
> + type != IRQ_TYPE_EDGE_RISING)
> return -EINVAL;
>
I think that will require some additional changes to gic_configure_irq
(in irq-gic-common.c).
Thanks,
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2014-12-01 11:19 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-28 17:55 [PATCH] irqchip: gic: Allow interrupt level to be set for PPIs Liviu Dudau
2014-11-28 17:55 ` Liviu Dudau
2014-12-01 10:41 ` Russell King - ARM Linux
2014-12-01 10:41 ` Russell King - ARM Linux
2014-12-01 10:41 ` Russell King - ARM Linux
2014-12-01 10:46 ` Liviu Dudau
2014-12-01 10:46 ` Liviu Dudau
2014-12-01 10:46 ` Liviu Dudau
2014-12-01 11:03 ` Russell King - ARM Linux
2014-12-01 11:03 ` Russell King - ARM Linux
2014-12-01 11:03 ` Russell King - ARM Linux
2014-12-01 11:19 ` Marc Zyngier [this message]
2014-12-01 11:19 ` Marc Zyngier
2014-12-01 11:19 ` Marc Zyngier
2014-12-01 11:23 ` Russell King - ARM Linux
2014-12-01 11:23 ` Russell King - ARM Linux
2014-12-01 11:23 ` Russell King - ARM Linux
2014-12-01 11:31 ` Marc Zyngier
2014-12-01 11:31 ` Marc Zyngier
2014-12-01 11:31 ` Marc Zyngier
2014-12-01 11:54 ` Russell King - ARM Linux
2014-12-01 11:54 ` Russell King - ARM Linux
2014-12-01 12:36 ` Liviu Dudau
2014-12-01 12:36 ` Liviu Dudau
2014-12-01 11:44 ` Liviu Dudau
2014-12-01 11:44 ` Liviu Dudau
2014-12-01 11:44 ` Liviu Dudau
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=547C4ECD.20802@arm.com \
--to=marc.zyngier@arm.com \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.