* [question] on which cpu an interrupt controller will raise an irq ?
@ 2014-12-07 20:42 Daniel Lezcano
2014-12-10 16:22 ` Thomas Gleixner
0 siblings, 1 reply; 2+ messages in thread
From: Daniel Lezcano @ 2014-12-07 20:42 UTC (permalink / raw)
To: Linux Kernel Mailing List; +Cc: Thomas Gleixner, Nicolas Pitre
Hi all,
I am not very familiar with the interrupt subsystem, so sorry if this
sounds a stupid question.
IIUC, when a interrupt happens on a SMP system and if there is no
affinity set for it, it is delivered following a scheme decided by the
interrupt controller.
For example, for the APIC, there is a round robin behaviour, so an
interrupt will be raised on cpu0, then cpu1, and so on ...
Is there a way to know on which cpu a controller will raise the interrupt ?
Thanks in advance
-- Daniel
--
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^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [question] on which cpu an interrupt controller will raise an irq ?
2014-12-07 20:42 [question] on which cpu an interrupt controller will raise an irq ? Daniel Lezcano
@ 2014-12-10 16:22 ` Thomas Gleixner
0 siblings, 0 replies; 2+ messages in thread
From: Thomas Gleixner @ 2014-12-10 16:22 UTC (permalink / raw)
To: Daniel Lezcano; +Cc: Linux Kernel Mailing List, Nicolas Pitre
On Sun, 7 Dec 2014, Daniel Lezcano wrote:
> I am not very familiar with the interrupt subsystem, so sorry if this sounds a
> stupid question.
>
> IIUC, when a interrupt happens on a SMP system and if there is no affinity set
> for it, it is delivered following a scheme decided by the interrupt
> controller.
>
> For example, for the APIC, there is a round robin behaviour, so an interrupt
> will be raised on cpu0, then cpu1, and so on ...
>
> Is there a way to know on which cpu a controller will raise the interrupt ?
No generic way which would allow to predict it on every controller we
support.
Thanks,
tglx
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2014-12-07 20:42 [question] on which cpu an interrupt controller will raise an irq ? Daniel Lezcano
2014-12-10 16:22 ` Thomas Gleixner
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