From: Suzuki.Poulose@arm.com (Suzuki K. Poulose)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] arm64: Fix SCTLR_EL1 initialisation
Date: Tue, 30 Dec 2014 12:15:14 +0000 [thread overview]
Message-ID: <54A29752.2060204@arm.com> (raw)
In-Reply-To: <20141217173915.GF30307@arm.com>
On 17/12/14 17:39, Will Deacon wrote:
> On Wed, Dec 17, 2014 at 03:50:21PM +0000, Suzuki K. Poulose wrote:
>> From: "Suzuki K. Poulose" <suzuki.poulose@arm.com>
>>
>> We initialise the SCTLR_EL1 value by read-modify-writeback
>> of the desired bits, leaving the other bits (including reserved
>> bits(RESx)) untouched. However, sometimes the boot monitor could
>> leave garbage values in the RESx bits which could have different
>> implications. This patch makes sure that all the bits, including
>> the RESx bits, are set to the proper state, except for the
>> 'endianness' control bits, EE(25) & E0E(24)- which are set early
>> in the el2_setup.
>>
>> Updated the state of the Bit[6] in the comment to RES0 in the
>> comment.
>>
>> Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com>
>> Cc: Will Deacon <will.deacon@arm.com>
>> Cc: Catalin Marinas <catalin.marinas@arm.com>
>> ---
>
> Looks good to me:
>
> Acked-by: Will Deacon <will.deacon@arm.com>
>
> Is this 3.19 material, or simply a cleanup/being cautious?
Sorry, for the late response. Yes this is kind of being cautious.
Suzuki
WARNING: multiple messages have this Message-ID (diff)
From: "Suzuki K. Poulose" <Suzuki.Poulose@arm.com>
To: Will Deacon <will.deacon@arm.com>
Cc: "linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
Catalin Marinas <Catalin.Marinas@arm.com>,
Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] arm64: Fix SCTLR_EL1 initialisation
Date: Tue, 30 Dec 2014 12:15:14 +0000 [thread overview]
Message-ID: <54A29752.2060204@arm.com> (raw)
In-Reply-To: <20141217173915.GF30307@arm.com>
On 17/12/14 17:39, Will Deacon wrote:
> On Wed, Dec 17, 2014 at 03:50:21PM +0000, Suzuki K. Poulose wrote:
>> From: "Suzuki K. Poulose" <suzuki.poulose@arm.com>
>>
>> We initialise the SCTLR_EL1 value by read-modify-writeback
>> of the desired bits, leaving the other bits (including reserved
>> bits(RESx)) untouched. However, sometimes the boot monitor could
>> leave garbage values in the RESx bits which could have different
>> implications. This patch makes sure that all the bits, including
>> the RESx bits, are set to the proper state, except for the
>> 'endianness' control bits, EE(25) & E0E(24)- which are set early
>> in the el2_setup.
>>
>> Updated the state of the Bit[6] in the comment to RES0 in the
>> comment.
>>
>> Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com>
>> Cc: Will Deacon <will.deacon@arm.com>
>> Cc: Catalin Marinas <catalin.marinas@arm.com>
>> ---
>
> Looks good to me:
>
> Acked-by: Will Deacon <will.deacon@arm.com>
>
> Is this 3.19 material, or simply a cleanup/being cautious?
Sorry, for the late response. Yes this is kind of being cautious.
Suzuki
next prev parent reply other threads:[~2014-12-30 12:15 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-17 15:50 [PATCH] arm64: Fix SCTLR_EL1 initialisation Suzuki K. Poulose
2014-12-17 15:50 ` Suzuki K. Poulose
2014-12-17 17:39 ` Will Deacon
2014-12-17 17:39 ` Will Deacon
2014-12-23 10:55 ` Catalin Marinas
2014-12-23 10:55 ` Catalin Marinas
2014-12-30 12:15 ` Suzuki K. Poulose [this message]
2014-12-30 12:15 ` Suzuki K. Poulose
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