* [PATCH v4 00/12] Add Armada 38x GP and AP boards support
@ 2015-01-08 17:38 ` Gregory CLEMENT
0 siblings, 0 replies; 34+ messages in thread
From: Gregory CLEMENT @ 2015-01-08 17:38 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth, Gregory CLEMENT
Cc: Thomas Petazzoni, Ezequiel Garcia,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Maxime Ripard,
Boris BREZILLON, Lior Amsalem, Tawfik Bayouk, Nadav Haklai,
Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA
Hi,
This set of patches adds the support for the Armada 385 AP and GP
boards. It introduce the bindings for the Armada388 SoC variants and
also adds a few clean ups here and there, a few missing pin functions
needed for the board, etc.
It follows the v3 of the AP patch set:
http://thread.gmane.org/gmane.linux.ports.arm.kernel/383709
and the v2 of the GP patch set:
http://www.spinics.net/lists/arm-kernel/msg389259.html.
Thanks,
Gregory
AP changelog:
Changes from v3:
- Switched the dts license to the dual one X11/GPL
Changes from v2:
- Removed the i2c1 bus that is not used
- Added comments for the i2c0 and the UARTs
- Removed the i2c clk-frequency property
- Fixed the SPI-NOR maximum frequency
- Fixed the phy nodes unit addresses
- Add the /chosen/stdout-path property
- Changed the filename to match the board compatible
Changes from v1:
- Removed USB3 support. This required some additional patches for
the phy and USB drivers that are not really related to this
serie. This will be submitted as a separate one.
- Removed earlyprintk from the default bootargs
- Removed two unneeded ranges
- Changed the phy pins node name to mdio
- Moved most of the pinctrl nodes to the DTSI
- Added a comment to mention why the phy reference clock is needed.
- Rebased on top of 3.19-rc1
GP Changelog:
v2 -> v4:
- fixed the indentation of the speed-map of gpio-fan
- moved the 2ns SATA controller node in the armada388.dtsi file
- converted the DB and RD board to the Armada 388 SoC
v1 -> v2:
- removed the earlyprintk in the command line
- added the stdout-path for the bootloader
- added the pinctrl configuration for all the node that need it
- renamed pca9555_ into expander
- added comment about the connector
- switched the PHY address to match the hardware
- removed the nr-ports property which is specific to the mv-sata and
not the ahci
- removed the clock-frequency property of the sdhci node
- formatted the speed-map of gpio-fan with a newline between the map
entries
- removed the SATA regulators
- added the dtsi for the Armada 388 variant
Gregory CLEMENT (5):
ARM: mvebu: a38x: Add more pinctrl functions
ARM: mvebu: a38x: Add missing labels
ARM: mvebu: Document the Device Tree binding for the Armada 388 SoC
ARM: mvebu: Add Device Tree description of the Armada 388 SoC
ARM: mvebu: Add Armada 388 General Purpose Development Board support
Maxime Ripard (7):
ARM: mvebu: Rename DEBUG_LL to indicate UART index
ARM: mvebu: Add UART1 as DEBUG_LL possible target
ARM: mvebu: a38x: Fix node names
pinctrl: mvebu: a38x: Add UART1 muxing options
ARM: mvebu: A38x: Remove redundant pinctrl informations
ARM: mvebu: Add a number of pinctrl functions
ARM: mvebu: Add Armada 385 Access Point Development Board support
.../devicetree/bindings/arm/armada-38x.txt | 7 +
arch/arm/Kconfig.debug | 35 ++-
arch/arm/boot/dts/Makefile | 6 +-
arch/arm/boot/dts/armada-380.dtsi | 3 +-
arch/arm/boot/dts/armada-385-db-ap.dts | 178 +++++++++++++
arch/arm/boot/dts/armada-385-gp.dts | 288 +++++++++++++++++++++
arch/arm/boot/dts/armada-385.dtsi | 3 +-
.../dts/{armada-385-db.dts => armada-388-db.dts} | 9 +-
.../dts/{armada-385-rd.dts => armada-388-rd.dts} | 9 +-
arch/arm/boot/dts/armada-388.dtsi | 70 +++++
arch/arm/boot/dts/armada-38x.dtsi | 93 ++++++-
drivers/pinctrl/mvebu/pinctrl-armada-38x.c | 6 +-
12 files changed, 678 insertions(+), 29 deletions(-)
create mode 100644 arch/arm/boot/dts/armada-385-db-ap.dts
create mode 100644 arch/arm/boot/dts/armada-385-gp.dts
rename arch/arm/boot/dts/{armada-385-db.dts => armada-388-db.dts} (92%)
rename arch/arm/boot/dts/{armada-385-rd.dts => armada-388-rd.dts} (88%)
create mode 100644 arch/arm/boot/dts/armada-388.dtsi
--
1.9.1
--
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^ permalink raw reply [flat|nested] 34+ messages in thread* [PATCH v4 01/12] ARM: mvebu: Rename DEBUG_LL to indicate UART index
@ 2015-01-08 17:38 ` Gregory CLEMENT
0 siblings, 0 replies; 34+ messages in thread
From: Gregory CLEMENT @ 2015-01-08 17:38 UTC (permalink / raw)
To: linux-arm-kernel
From: Maxime Ripard <maxime.ripard@free-electrons.com>
The mvebu SoCs actually have more UARTs than just the one exposed in DEBUG_LL
yet.
In order to differentiate them, Add the index in the configuration options and
their help.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm/Kconfig.debug | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 5ddd4906f7a7..eb3991cf63ab 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -455,13 +455,13 @@ choice
Please adjust DEBUG_UART_PHYS and DEBUG_UART_BASE configuration
options based on your needs.
- config DEBUG_MVEBU_UART
- bool "Kernel low-level debugging messages via MVEBU UART (old bootloaders)"
+ config DEBUG_MVEBU_UART0
+ bool "Kernel low-level debugging messages via MVEBU UART0 (old bootloaders)"
depends on ARCH_MVEBU
select DEBUG_UART_8250
help
Say Y here if you want kernel low-level debugging support
- on MVEBU based platforms.
+ on MVEBU based platforms on UART0.
This option should be used with the old bootloaders
that left the internal registers mapped at
@@ -474,13 +474,13 @@ choice
when u-boot hands over to the kernel, the system
silently crashes, with no serial output at all.
- config DEBUG_MVEBU_UART_ALTERNATE
- bool "Kernel low-level debugging messages via MVEBU UART (new bootloaders)"
+ config DEBUG_MVEBU_UART0_ALTERNATE
+ bool "Kernel low-level debugging messages via MVEBU UART0 (new bootloaders)"
depends on ARCH_MVEBU
select DEBUG_UART_8250
help
Say Y here if you want kernel low-level debugging support
- on MVEBU based platforms.
+ on MVEBU based platforms on UART0.
This option should be used with the new bootloaders
that remap the internal registers at 0xf1000000.
@@ -1282,7 +1282,7 @@ config DEBUG_UART_PHYS
default 0xc8000000 if ARCH_IXP4XX && !CPU_BIG_ENDIAN
default 0xc8000003 if ARCH_IXP4XX && CPU_BIG_ENDIAN
default 0xd0000000 if ARCH_SPEAR3XX || ARCH_SPEAR6XX
- default 0xd0012000 if DEBUG_MVEBU_UART
+ default 0xd0012000 if DEBUG_MVEBU_UART0
default 0xc81004c0 if DEBUG_MESON_UARTAO
default 0xd4017000 if DEBUG_MMP_UART2
default 0xd4018000 if DEBUG_MMP_UART3
@@ -1296,7 +1296,7 @@ config DEBUG_UART_PHYS
default 0xe8008000 if DEBUG_R7S72100_SCIF2
default 0xf0000be0 if ARCH_EBSA110
default 0xf040ab00 if DEBUG_BRCMSTB_UART
- default 0xf1012000 if DEBUG_MVEBU_UART_ALTERNATE
+ default 0xf1012000 if DEBUG_MVEBU_UART0_ALTERNATE
default 0xf1012000 if ARCH_DOVE || ARCH_MV78XX0 || \
ARCH_ORION5X
default 0xf7fc9000 if DEBUG_BERLIN_UART
@@ -1377,7 +1377,7 @@ config DEBUG_UART_VIRT
default 0xfeb30c00 if DEBUG_KEYSTONE_UART0
default 0xfeb31000 if DEBUG_KEYSTONE_UART1
default 0xfec02000 if DEBUG_SOCFPGA_UART
- default 0xfec12000 if DEBUG_MVEBU_UART || DEBUG_MVEBU_UART_ALTERNATE
+ default 0xfec12000 if DEBUG_MVEBU_UART0 || DEBUG_MVEBU_UART0_ALTERNATE
default 0xfec20000 if DEBUG_DAVINCI_DMx_UART0
default 0xfec90000 if DEBUG_RK32_UART2
default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1
--
1.9.1
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v4 01/12] ARM: mvebu: Rename DEBUG_LL to indicate UART index
@ 2015-01-08 17:38 ` Gregory CLEMENT
0 siblings, 0 replies; 34+ messages in thread
From: Gregory CLEMENT @ 2015-01-08 17:38 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth, Gregory CLEMENT
Cc: Thomas Petazzoni, Ezequiel Garcia,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Maxime Ripard,
Boris BREZILLON, Lior Amsalem, Tawfik Bayouk, Nadav Haklai,
Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA
From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
The mvebu SoCs actually have more UARTs than just the one exposed in DEBUG_LL
yet.
In order to differentiate them, Add the index in the configuration options and
their help.
Signed-off-by: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Acked-by: Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org>
Acked-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Signed-off-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
arch/arm/Kconfig.debug | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 5ddd4906f7a7..eb3991cf63ab 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -455,13 +455,13 @@ choice
Please adjust DEBUG_UART_PHYS and DEBUG_UART_BASE configuration
options based on your needs.
- config DEBUG_MVEBU_UART
- bool "Kernel low-level debugging messages via MVEBU UART (old bootloaders)"
+ config DEBUG_MVEBU_UART0
+ bool "Kernel low-level debugging messages via MVEBU UART0 (old bootloaders)"
depends on ARCH_MVEBU
select DEBUG_UART_8250
help
Say Y here if you want kernel low-level debugging support
- on MVEBU based platforms.
+ on MVEBU based platforms on UART0.
This option should be used with the old bootloaders
that left the internal registers mapped at
@@ -474,13 +474,13 @@ choice
when u-boot hands over to the kernel, the system
silently crashes, with no serial output at all.
- config DEBUG_MVEBU_UART_ALTERNATE
- bool "Kernel low-level debugging messages via MVEBU UART (new bootloaders)"
+ config DEBUG_MVEBU_UART0_ALTERNATE
+ bool "Kernel low-level debugging messages via MVEBU UART0 (new bootloaders)"
depends on ARCH_MVEBU
select DEBUG_UART_8250
help
Say Y here if you want kernel low-level debugging support
- on MVEBU based platforms.
+ on MVEBU based platforms on UART0.
This option should be used with the new bootloaders
that remap the internal registers at 0xf1000000.
@@ -1282,7 +1282,7 @@ config DEBUG_UART_PHYS
default 0xc8000000 if ARCH_IXP4XX && !CPU_BIG_ENDIAN
default 0xc8000003 if ARCH_IXP4XX && CPU_BIG_ENDIAN
default 0xd0000000 if ARCH_SPEAR3XX || ARCH_SPEAR6XX
- default 0xd0012000 if DEBUG_MVEBU_UART
+ default 0xd0012000 if DEBUG_MVEBU_UART0
default 0xc81004c0 if DEBUG_MESON_UARTAO
default 0xd4017000 if DEBUG_MMP_UART2
default 0xd4018000 if DEBUG_MMP_UART3
@@ -1296,7 +1296,7 @@ config DEBUG_UART_PHYS
default 0xe8008000 if DEBUG_R7S72100_SCIF2
default 0xf0000be0 if ARCH_EBSA110
default 0xf040ab00 if DEBUG_BRCMSTB_UART
- default 0xf1012000 if DEBUG_MVEBU_UART_ALTERNATE
+ default 0xf1012000 if DEBUG_MVEBU_UART0_ALTERNATE
default 0xf1012000 if ARCH_DOVE || ARCH_MV78XX0 || \
ARCH_ORION5X
default 0xf7fc9000 if DEBUG_BERLIN_UART
@@ -1377,7 +1377,7 @@ config DEBUG_UART_VIRT
default 0xfeb30c00 if DEBUG_KEYSTONE_UART0
default 0xfeb31000 if DEBUG_KEYSTONE_UART1
default 0xfec02000 if DEBUG_SOCFPGA_UART
- default 0xfec12000 if DEBUG_MVEBU_UART || DEBUG_MVEBU_UART_ALTERNATE
+ default 0xfec12000 if DEBUG_MVEBU_UART0 || DEBUG_MVEBU_UART0_ALTERNATE
default 0xfec20000 if DEBUG_DAVINCI_DMx_UART0
default 0xfec90000 if DEBUG_RK32_UART2
default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1
--
1.9.1
--
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^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v4 02/12] ARM: mvebu: Add UART1 as DEBUG_LL possible target
@ 2015-01-08 17:38 ` Gregory CLEMENT
0 siblings, 0 replies; 34+ messages in thread
From: Gregory CLEMENT @ 2015-01-08 17:38 UTC (permalink / raw)
To: linux-arm-kernel
From: Maxime Ripard <maxime.ripard@free-electrons.com>
Some mvebu boards have the UART1 more easily accessible than the other UARTs
found on the system.
Add a debug_ll option for this case.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm/Kconfig.debug | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index eb3991cf63ab..7bd1bbccc43c 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -489,6 +489,21 @@ choice
when u-boot hands over to the kernel, the system
silently crashes, with no serial output at all.
+ config DEBUG_MVEBU_UART1_ALTERNATE
+ bool "Kernel low-level debugging messages via MVEBU UART1 (new bootloaders)"
+ depends on ARCH_MVEBU
+ select DEBUG_UART_8250
+ help
+ Say Y here if you want kernel low-level debugging support
+ on MVEBU based platforms on UART1.
+
+ This option should be used with the new bootloaders
+ that remap the internal registers at 0xf1000000.
+
+ If the wrong DEBUG_MVEBU_UART* option is selected,
+ when u-boot hands over to the kernel, the system
+ silently crashes, with no serial output at all.
+
config DEBUG_VF_UART
bool "Vybrid UART"
depends on SOC_VF610
@@ -1297,6 +1312,7 @@ config DEBUG_UART_PHYS
default 0xf0000be0 if ARCH_EBSA110
default 0xf040ab00 if DEBUG_BRCMSTB_UART
default 0xf1012000 if DEBUG_MVEBU_UART0_ALTERNATE
+ default 0xf1012100 if DEBUG_MVEBU_UART1_ALTERNATE
default 0xf1012000 if ARCH_DOVE || ARCH_MV78XX0 || \
ARCH_ORION5X
default 0xf7fc9000 if DEBUG_BERLIN_UART
@@ -1378,6 +1394,7 @@ config DEBUG_UART_VIRT
default 0xfeb31000 if DEBUG_KEYSTONE_UART1
default 0xfec02000 if DEBUG_SOCFPGA_UART
default 0xfec12000 if DEBUG_MVEBU_UART0 || DEBUG_MVEBU_UART0_ALTERNATE
+ default 0xfec12100 if DEBUG_MVEBU_UART1_ALTERNATE
default 0xfec20000 if DEBUG_DAVINCI_DMx_UART0
default 0xfec90000 if DEBUG_RK32_UART2
default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1
--
1.9.1
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v4 02/12] ARM: mvebu: Add UART1 as DEBUG_LL possible target
@ 2015-01-08 17:38 ` Gregory CLEMENT
0 siblings, 0 replies; 34+ messages in thread
From: Gregory CLEMENT @ 2015-01-08 17:38 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth, Gregory CLEMENT
Cc: Thomas Petazzoni, Ezequiel Garcia,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Maxime Ripard,
Boris BREZILLON, Lior Amsalem, Tawfik Bayouk, Nadav Haklai,
Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA
From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Some mvebu boards have the UART1 more easily accessible than the other UARTs
found on the system.
Add a debug_ll option for this case.
Signed-off-by: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Acked-by: Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org>
Acked-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Signed-off-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
arch/arm/Kconfig.debug | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index eb3991cf63ab..7bd1bbccc43c 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -489,6 +489,21 @@ choice
when u-boot hands over to the kernel, the system
silently crashes, with no serial output at all.
+ config DEBUG_MVEBU_UART1_ALTERNATE
+ bool "Kernel low-level debugging messages via MVEBU UART1 (new bootloaders)"
+ depends on ARCH_MVEBU
+ select DEBUG_UART_8250
+ help
+ Say Y here if you want kernel low-level debugging support
+ on MVEBU based platforms on UART1.
+
+ This option should be used with the new bootloaders
+ that remap the internal registers at 0xf1000000.
+
+ If the wrong DEBUG_MVEBU_UART* option is selected,
+ when u-boot hands over to the kernel, the system
+ silently crashes, with no serial output at all.
+
config DEBUG_VF_UART
bool "Vybrid UART"
depends on SOC_VF610
@@ -1297,6 +1312,7 @@ config DEBUG_UART_PHYS
default 0xf0000be0 if ARCH_EBSA110
default 0xf040ab00 if DEBUG_BRCMSTB_UART
default 0xf1012000 if DEBUG_MVEBU_UART0_ALTERNATE
+ default 0xf1012100 if DEBUG_MVEBU_UART1_ALTERNATE
default 0xf1012000 if ARCH_DOVE || ARCH_MV78XX0 || \
ARCH_ORION5X
default 0xf7fc9000 if DEBUG_BERLIN_UART
@@ -1378,6 +1394,7 @@ config DEBUG_UART_VIRT
default 0xfeb31000 if DEBUG_KEYSTONE_UART1
default 0xfec02000 if DEBUG_SOCFPGA_UART
default 0xfec12000 if DEBUG_MVEBU_UART0 || DEBUG_MVEBU_UART0_ALTERNATE
+ default 0xfec12100 if DEBUG_MVEBU_UART1_ALTERNATE
default 0xfec20000 if DEBUG_DAVINCI_DMx_UART0
default 0xfec90000 if DEBUG_RK32_UART2
default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1
--
1.9.1
--
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^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v4 03/12] ARM: mvebu: a38x: Fix node names
@ 2015-01-08 17:38 ` Gregory CLEMENT
0 siblings, 0 replies; 34+ messages in thread
From: Gregory CLEMENT @ 2015-01-08 17:38 UTC (permalink / raw)
To: linux-arm-kernel
From: Maxime Ripard <maxime.ripard@free-electrons.com>
Some nodes in the DTs have a reg property but no unit name in their node name.
This contradicts the way the ePAPR defines the node names. Fix this.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm/boot/dts/armada-380.dtsi | 2 +-
arch/arm/boot/dts/armada-385-db.dts | 2 +-
arch/arm/boot/dts/armada-385-rd.dts | 2 +-
arch/arm/boot/dts/armada-385.dtsi | 2 +-
arch/arm/boot/dts/armada-38x.dtsi | 4 ++--
5 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/armada-380.dtsi b/arch/arm/boot/dts/armada-380.dtsi
index 4173a8ab34e7..13400ce88c54 100644
--- a/arch/arm/boot/dts/armada-380.dtsi
+++ b/arch/arm/boot/dts/armada-380.dtsi
@@ -32,7 +32,7 @@
soc {
internal-regs {
- pinctrl {
+ pinctrl at 18000 {
compatible = "marvell,mv88f6810-pinctrl";
reg = <0x18000 0x20>;
};
diff --git a/arch/arm/boot/dts/armada-385-db.dts b/arch/arm/boot/dts/armada-385-db.dts
index 2aaa9d2ac284..212605ccc7b6 100644
--- a/arch/arm/boot/dts/armada-385-db.dts
+++ b/arch/arm/boot/dts/armada-385-db.dts
@@ -74,7 +74,7 @@
phy-mode = "rgmii-id";
};
- mdio {
+ mdio at 72004 {
phy0: ethernet-phy at 0 {
reg = <0>;
};
diff --git a/arch/arm/boot/dts/armada-385-rd.dts b/arch/arm/boot/dts/armada-385-rd.dts
index aaca2861dc87..74a3bfe6efd7 100644
--- a/arch/arm/boot/dts/armada-385-rd.dts
+++ b/arch/arm/boot/dts/armada-385-rd.dts
@@ -67,7 +67,7 @@
};
- mdio {
+ mdio at 72004 {
phy0: ethernet-phy at 0 {
reg = <0>;
};
diff --git a/arch/arm/boot/dts/armada-385.dtsi b/arch/arm/boot/dts/armada-385.dtsi
index 6283d7912f71..5249a4d3c207 100644
--- a/arch/arm/boot/dts/armada-385.dtsi
+++ b/arch/arm/boot/dts/armada-385.dtsi
@@ -37,7 +37,7 @@
soc {
internal-regs {
- pinctrl {
+ pinctrl at 18000 {
compatible = "marvell,mv88f6820-pinctrl";
reg = <0x18000 0x20>;
};
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index 74391dace9e7..ada1f206028b 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -193,7 +193,7 @@
status = "disabled";
};
- pinctrl {
+ pinctrl at 18000 {
compatible = "marvell,mv88f6820-pinctrl";
reg = <0x18000 0x20>;
};
@@ -373,7 +373,7 @@
status = "disabled";
};
- mdio {
+ mdio at 72004 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "marvell,orion-mdio";
--
1.9.1
^ permalink raw reply related [flat|nested] 34+ messages in thread* [PATCH v4 03/12] ARM: mvebu: a38x: Fix node names
@ 2015-01-08 17:38 ` Gregory CLEMENT
0 siblings, 0 replies; 34+ messages in thread
From: Gregory CLEMENT @ 2015-01-08 17:38 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth, Gregory CLEMENT
Cc: Thomas Petazzoni, Ezequiel Garcia,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Maxime Ripard,
Boris BREZILLON, Lior Amsalem, Tawfik Bayouk, Nadav Haklai,
Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA
From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Some nodes in the DTs have a reg property but no unit name in their node name.
This contradicts the way the ePAPR defines the node names. Fix this.
Signed-off-by: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Acked-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Signed-off-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
arch/arm/boot/dts/armada-380.dtsi | 2 +-
arch/arm/boot/dts/armada-385-db.dts | 2 +-
arch/arm/boot/dts/armada-385-rd.dts | 2 +-
arch/arm/boot/dts/armada-385.dtsi | 2 +-
arch/arm/boot/dts/armada-38x.dtsi | 4 ++--
5 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/armada-380.dtsi b/arch/arm/boot/dts/armada-380.dtsi
index 4173a8ab34e7..13400ce88c54 100644
--- a/arch/arm/boot/dts/armada-380.dtsi
+++ b/arch/arm/boot/dts/armada-380.dtsi
@@ -32,7 +32,7 @@
soc {
internal-regs {
- pinctrl {
+ pinctrl@18000 {
compatible = "marvell,mv88f6810-pinctrl";
reg = <0x18000 0x20>;
};
diff --git a/arch/arm/boot/dts/armada-385-db.dts b/arch/arm/boot/dts/armada-385-db.dts
index 2aaa9d2ac284..212605ccc7b6 100644
--- a/arch/arm/boot/dts/armada-385-db.dts
+++ b/arch/arm/boot/dts/armada-385-db.dts
@@ -74,7 +74,7 @@
phy-mode = "rgmii-id";
};
- mdio {
+ mdio@72004 {
phy0: ethernet-phy@0 {
reg = <0>;
};
diff --git a/arch/arm/boot/dts/armada-385-rd.dts b/arch/arm/boot/dts/armada-385-rd.dts
index aaca2861dc87..74a3bfe6efd7 100644
--- a/arch/arm/boot/dts/armada-385-rd.dts
+++ b/arch/arm/boot/dts/armada-385-rd.dts
@@ -67,7 +67,7 @@
};
- mdio {
+ mdio@72004 {
phy0: ethernet-phy@0 {
reg = <0>;
};
diff --git a/arch/arm/boot/dts/armada-385.dtsi b/arch/arm/boot/dts/armada-385.dtsi
index 6283d7912f71..5249a4d3c207 100644
--- a/arch/arm/boot/dts/armada-385.dtsi
+++ b/arch/arm/boot/dts/armada-385.dtsi
@@ -37,7 +37,7 @@
soc {
internal-regs {
- pinctrl {
+ pinctrl@18000 {
compatible = "marvell,mv88f6820-pinctrl";
reg = <0x18000 0x20>;
};
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index 74391dace9e7..ada1f206028b 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -193,7 +193,7 @@
status = "disabled";
};
- pinctrl {
+ pinctrl@18000 {
compatible = "marvell,mv88f6820-pinctrl";
reg = <0x18000 0x20>;
};
@@ -373,7 +373,7 @@
status = "disabled";
};
- mdio {
+ mdio@72004 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "marvell,orion-mdio";
--
1.9.1
--
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^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v4 04/12] pinctrl: mvebu: a38x: Add UART1 muxing options
@ 2015-01-08 17:38 ` Gregory CLEMENT
0 siblings, 0 replies; 34+ messages in thread
From: Gregory CLEMENT @ 2015-01-08 17:38 UTC (permalink / raw)
To: linux-arm-kernel
From: Maxime Ripard <maxime.ripard@free-electrons.com>
The MPP19 and MMP20 pins also have the ability to be muxed to the uart1
function.
Add this case to the pinctrl driver.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
drivers/pinctrl/mvebu/pinctrl-armada-38x.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-38x.c b/drivers/pinctrl/mvebu/pinctrl-armada-38x.c
index 224c6cff6aa2..7302f66f4f19 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-38x.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-38x.c
@@ -145,14 +145,16 @@ static struct mvebu_mpp_mode armada_38x_mpp_modes[] = {
MPP_VAR_FUNCTION(2, "ptp", "event_req", V_88F6810_PLUS),
MPP_VAR_FUNCTION(3, "pcie0", "clkreq", V_88F6810_PLUS),
MPP_VAR_FUNCTION(4, "sata1", "prsnt", V_88F6810_PLUS),
- MPP_VAR_FUNCTION(5, "ua0", "cts", V_88F6810_PLUS)),
+ MPP_VAR_FUNCTION(5, "ua0", "cts", V_88F6810_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6810_PLUS)),
MPP_MODE(20,
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
MPP_VAR_FUNCTION(1, "ge0", "txclk", V_88F6810_PLUS),
MPP_VAR_FUNCTION(2, "ptp", "clk", V_88F6810_PLUS),
MPP_VAR_FUNCTION(3, "pcie1", "rstout", V_88F6820_PLUS),
MPP_VAR_FUNCTION(4, "sata0", "prsnt", V_88F6810_PLUS),
- MPP_VAR_FUNCTION(5, "ua0", "rts", V_88F6810_PLUS)),
+ MPP_VAR_FUNCTION(5, "ua0", "rts", V_88F6810_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "txd", V_88F6810_PLUS)),
MPP_MODE(21,
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
MPP_VAR_FUNCTION(1, "spi0", "cs1", V_88F6810_PLUS),
--
1.9.1
^ permalink raw reply related [flat|nested] 34+ messages in thread* [PATCH v4 04/12] pinctrl: mvebu: a38x: Add UART1 muxing options
@ 2015-01-08 17:38 ` Gregory CLEMENT
0 siblings, 0 replies; 34+ messages in thread
From: Gregory CLEMENT @ 2015-01-08 17:38 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth, Gregory CLEMENT
Cc: Thomas Petazzoni, Ezequiel Garcia,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Maxime Ripard,
Boris BREZILLON, Lior Amsalem, Tawfik Bayouk, Nadav Haklai,
Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA
From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
The MPP19 and MMP20 pins also have the ability to be muxed to the uart1
function.
Add this case to the pinctrl driver.
Signed-off-by: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Acked-by: Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org>
Signed-off-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
drivers/pinctrl/mvebu/pinctrl-armada-38x.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-38x.c b/drivers/pinctrl/mvebu/pinctrl-armada-38x.c
index 224c6cff6aa2..7302f66f4f19 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-38x.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-38x.c
@@ -145,14 +145,16 @@ static struct mvebu_mpp_mode armada_38x_mpp_modes[] = {
MPP_VAR_FUNCTION(2, "ptp", "event_req", V_88F6810_PLUS),
MPP_VAR_FUNCTION(3, "pcie0", "clkreq", V_88F6810_PLUS),
MPP_VAR_FUNCTION(4, "sata1", "prsnt", V_88F6810_PLUS),
- MPP_VAR_FUNCTION(5, "ua0", "cts", V_88F6810_PLUS)),
+ MPP_VAR_FUNCTION(5, "ua0", "cts", V_88F6810_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6810_PLUS)),
MPP_MODE(20,
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
MPP_VAR_FUNCTION(1, "ge0", "txclk", V_88F6810_PLUS),
MPP_VAR_FUNCTION(2, "ptp", "clk", V_88F6810_PLUS),
MPP_VAR_FUNCTION(3, "pcie1", "rstout", V_88F6820_PLUS),
MPP_VAR_FUNCTION(4, "sata0", "prsnt", V_88F6810_PLUS),
- MPP_VAR_FUNCTION(5, "ua0", "rts", V_88F6810_PLUS)),
+ MPP_VAR_FUNCTION(5, "ua0", "rts", V_88F6810_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "txd", V_88F6810_PLUS)),
MPP_MODE(21,
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
MPP_VAR_FUNCTION(1, "spi0", "cs1", V_88F6810_PLUS),
--
1.9.1
--
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^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v4 05/12] ARM: mvebu: A38x: Remove redundant pinctrl informations
@ 2015-01-08 17:38 ` Gregory CLEMENT
0 siblings, 0 replies; 34+ messages in thread
From: Gregory CLEMENT @ 2015-01-08 17:38 UTC (permalink / raw)
To: linux-arm-kernel
From: Maxime Ripard <maxime.ripard@free-electrons.com>
The compatible set in the armada-38x DTSI is always overridden, and the reg
defined in there is duplicated in the armada-380 and armada-385 DTSIs.
Remove these useless items.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm/boot/dts/armada-380.dtsi | 1 -
arch/arm/boot/dts/armada-385.dtsi | 1 -
arch/arm/boot/dts/armada-38x.dtsi | 1 -
3 files changed, 3 deletions(-)
diff --git a/arch/arm/boot/dts/armada-380.dtsi b/arch/arm/boot/dts/armada-380.dtsi
index 13400ce88c54..7e509d2d74d0 100644
--- a/arch/arm/boot/dts/armada-380.dtsi
+++ b/arch/arm/boot/dts/armada-380.dtsi
@@ -34,7 +34,6 @@
internal-regs {
pinctrl at 18000 {
compatible = "marvell,mv88f6810-pinctrl";
- reg = <0x18000 0x20>;
};
};
diff --git a/arch/arm/boot/dts/armada-385.dtsi b/arch/arm/boot/dts/armada-385.dtsi
index 5249a4d3c207..a54a252ddb4c 100644
--- a/arch/arm/boot/dts/armada-385.dtsi
+++ b/arch/arm/boot/dts/armada-385.dtsi
@@ -39,7 +39,6 @@
internal-regs {
pinctrl at 18000 {
compatible = "marvell,mv88f6820-pinctrl";
- reg = <0x18000 0x20>;
};
};
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index ada1f206028b..40200084c6c8 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -194,7 +194,6 @@
};
pinctrl at 18000 {
- compatible = "marvell,mv88f6820-pinctrl";
reg = <0x18000 0x20>;
};
--
1.9.1
^ permalink raw reply related [flat|nested] 34+ messages in thread* [PATCH v4 05/12] ARM: mvebu: A38x: Remove redundant pinctrl informations
@ 2015-01-08 17:38 ` Gregory CLEMENT
0 siblings, 0 replies; 34+ messages in thread
From: Gregory CLEMENT @ 2015-01-08 17:38 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth, Gregory CLEMENT
Cc: Thomas Petazzoni, Ezequiel Garcia,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Maxime Ripard,
Boris BREZILLON, Lior Amsalem, Tawfik Bayouk, Nadav Haklai,
Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA
From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
The compatible set in the armada-38x DTSI is always overridden, and the reg
defined in there is duplicated in the armada-380 and armada-385 DTSIs.
Remove these useless items.
Signed-off-by: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Acked-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Signed-off-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
arch/arm/boot/dts/armada-380.dtsi | 1 -
arch/arm/boot/dts/armada-385.dtsi | 1 -
arch/arm/boot/dts/armada-38x.dtsi | 1 -
3 files changed, 3 deletions(-)
diff --git a/arch/arm/boot/dts/armada-380.dtsi b/arch/arm/boot/dts/armada-380.dtsi
index 13400ce88c54..7e509d2d74d0 100644
--- a/arch/arm/boot/dts/armada-380.dtsi
+++ b/arch/arm/boot/dts/armada-380.dtsi
@@ -34,7 +34,6 @@
internal-regs {
pinctrl@18000 {
compatible = "marvell,mv88f6810-pinctrl";
- reg = <0x18000 0x20>;
};
};
diff --git a/arch/arm/boot/dts/armada-385.dtsi b/arch/arm/boot/dts/armada-385.dtsi
index 5249a4d3c207..a54a252ddb4c 100644
--- a/arch/arm/boot/dts/armada-385.dtsi
+++ b/arch/arm/boot/dts/armada-385.dtsi
@@ -39,7 +39,6 @@
internal-regs {
pinctrl@18000 {
compatible = "marvell,mv88f6820-pinctrl";
- reg = <0x18000 0x20>;
};
};
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index ada1f206028b..40200084c6c8 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -194,7 +194,6 @@
};
pinctrl@18000 {
- compatible = "marvell,mv88f6820-pinctrl";
reg = <0x18000 0x20>;
};
--
1.9.1
--
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^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v4 06/12] ARM: mvebu: Add a number of pinctrl functions
@ 2015-01-08 17:38 ` Gregory CLEMENT
0 siblings, 0 replies; 34+ messages in thread
From: Gregory CLEMENT @ 2015-01-08 17:38 UTC (permalink / raw)
To: linux-arm-kernel
From: Maxime Ripard <maxime.ripard@free-electrons.com>
Some pinctrl functions can be shared with all DTS out there, since they are
generic, SoC-wide muxing options. Add a number of these to the DTSI to avoid
duplication.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm/boot/dts/armada-38x.dtsi | 39 +++++++++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index 40200084c6c8..98885c58be29 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -195,6 +195,45 @@
pinctrl at 18000 {
reg = <0x18000 0x20>;
+
+ ge0_rgmii_pins: ge-rgmii-pins-0 {
+ marvell,pins = "mpp6", "mpp7", "mpp8",
+ "mpp9", "mpp10", "mpp11",
+ "mpp12", "mpp13", "mpp14",
+ "mpp15", "mpp16", "mpp17";
+ marvell,function = "ge0";
+ };
+
+ i2c0_pins: i2c-pins-0 {
+ marvell,pins = "mpp2", "mpp3";
+ marvell,function = "i2c0";
+ };
+
+ mdio_pins: mdio-pins {
+ marvell,pins = "mpp4", "mpp5";
+ marvell,function = "ge";
+ };
+
+ ref_clk0_pins: ref-clk-pins-0 {
+ marvell,pins = "mpp45";
+ marvell,function = "ref";
+ };
+
+ spi1_pins: spi-pins-1 {
+ marvell,pins = "mpp56", "mpp57", "mpp58",
+ "mpp59";
+ marvell,function = "spi1";
+ };
+
+ uart0_pins: uart-pins-0 {
+ marvell,pins = "mpp0", "mpp1";
+ marvell,function = "ua0";
+ };
+
+ uart1_pins: uart-pins-1 {
+ marvell,pins = "mpp19", "mpp20";
+ marvell,function = "ua1";
+ };
};
gpio0: gpio at 18100 {
--
1.9.1
^ permalink raw reply related [flat|nested] 34+ messages in thread* [PATCH v4 06/12] ARM: mvebu: Add a number of pinctrl functions
@ 2015-01-08 17:38 ` Gregory CLEMENT
0 siblings, 0 replies; 34+ messages in thread
From: Gregory CLEMENT @ 2015-01-08 17:38 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth, Gregory CLEMENT
Cc: Thomas Petazzoni, Ezequiel Garcia,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Maxime Ripard,
Boris BREZILLON, Lior Amsalem, Tawfik Bayouk, Nadav Haklai,
Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA
From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Some pinctrl functions can be shared with all DTS out there, since they are
generic, SoC-wide muxing options. Add a number of these to the DTSI to avoid
duplication.
Signed-off-by: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Acked-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Signed-off-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
arch/arm/boot/dts/armada-38x.dtsi | 39 +++++++++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index 40200084c6c8..98885c58be29 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -195,6 +195,45 @@
pinctrl@18000 {
reg = <0x18000 0x20>;
+
+ ge0_rgmii_pins: ge-rgmii-pins-0 {
+ marvell,pins = "mpp6", "mpp7", "mpp8",
+ "mpp9", "mpp10", "mpp11",
+ "mpp12", "mpp13", "mpp14",
+ "mpp15", "mpp16", "mpp17";
+ marvell,function = "ge0";
+ };
+
+ i2c0_pins: i2c-pins-0 {
+ marvell,pins = "mpp2", "mpp3";
+ marvell,function = "i2c0";
+ };
+
+ mdio_pins: mdio-pins {
+ marvell,pins = "mpp4", "mpp5";
+ marvell,function = "ge";
+ };
+
+ ref_clk0_pins: ref-clk-pins-0 {
+ marvell,pins = "mpp45";
+ marvell,function = "ref";
+ };
+
+ spi1_pins: spi-pins-1 {
+ marvell,pins = "mpp56", "mpp57", "mpp58",
+ "mpp59";
+ marvell,function = "spi1";
+ };
+
+ uart0_pins: uart-pins-0 {
+ marvell,pins = "mpp0", "mpp1";
+ marvell,function = "ua0";
+ };
+
+ uart1_pins: uart-pins-1 {
+ marvell,pins = "mpp19", "mpp20";
+ marvell,function = "ua1";
+ };
};
gpio0: gpio@18100 {
--
1.9.1
--
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^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v4 07/12] ARM: mvebu: Add Armada 385 Access Point Development Board support
@ 2015-01-08 17:38 ` Gregory CLEMENT
0 siblings, 0 replies; 34+ messages in thread
From: Gregory CLEMENT @ 2015-01-08 17:38 UTC (permalink / raw)
To: linux-arm-kernel
From: Maxime Ripard <maxime.ripard@free-electrons.com>
The A385-AP is a board produced by Marvell that holds 3 mPCIe slot, a 16MB
SPI-NOR, 3 Gigabit Ethernet ports, USB3 and NAND flash storage.
[gregory.clement at free-electrons.com: switch the license to the dual
X11/GPL with the agreement of the author]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/armada-385-db-ap.dts | 178 +++++++++++++++++++++++++++++++++
2 files changed, 179 insertions(+)
create mode 100644 arch/arm/boot/dts/armada-385-db-ap.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 91bd5bd62857..ce7bc221fae7 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -535,6 +535,7 @@ dtb-$(CONFIG_MACH_ARMADA_375) += \
armada-375-db.dtb
dtb-$(CONFIG_MACH_ARMADA_38X) += \
armada-385-db.dtb \
+ armada-385-db-ap.dtb \
armada-385-rd.dtb
dtb-$(CONFIG_MACH_ARMADA_XP) += \
armada-xp-axpwifiap.dtb \
diff --git a/arch/arm/boot/dts/armada-385-db-ap.dts b/arch/arm/boot/dts/armada-385-db-ap.dts
new file mode 100644
index 000000000000..57b9119fb3e0
--- /dev/null
+++ b/arch/arm/boot/dts/armada-385-db-ap.dts
@@ -0,0 +1,178 @@
+/*
+ * Device Tree file for Marvell Armada 385 Access Point Development board
+ * (DB-88F6820-AP)
+ *
+ * Copyright (C) 2014 Marvell
+ *
+ * Nadav Haklai <nadavh@marvell.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "armada-385.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Marvell Armada 385 Access Point Development Board";
+ compatible = "marvell,a385-db-ap", "marvell,armada385", "marvell,armada38x";
+
+ chosen {
+ bootargs = "console=ttyS0,115200";
+ stdout-path = &uart1;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x80000000>; /* 2GB */
+ };
+
+ soc {
+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
+ MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
+
+ internal-regs {
+ spi1: spi at 10680 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins>;
+ status = "okay";
+
+ spi-flash at 0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "st,m25p128";
+ reg = <0>; /* Chip select 0 */
+ spi-max-frequency = <54000000>;
+ };
+ };
+
+ i2c0: i2c at 11000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+ status = "okay";
+
+ /*
+ * This bus is wired to two EEPROM
+ * sockets, one of which holding the
+ * board ID used by the bootloader.
+ * Erasing this EEPROM's content will
+ * brick the board.
+ * Use this bus with caution.
+ */
+ };
+
+ mdio at 72004 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mdio_pins>;
+
+ phy0: ethernet-phy at 1 {
+ reg = <1>;
+ };
+
+ phy1: ethernet-phy at 4 {
+ reg = <4>;
+ };
+
+ phy2: ethernet-phy at 6 {
+ reg = <6>;
+ };
+ };
+
+ /* UART0 is exposed through the JP8 connector */
+ uart0: serial at 12000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins>;
+ status = "okay";
+ };
+
+ /*
+ * UART1 is exposed through a FTDI chip
+ * wired to the mini-USB connector
+ */
+ uart1: serial at 12100 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
+ status = "okay";
+ };
+
+ ethernet at 30000 {
+ status = "okay";
+ phy = <&phy2>;
+ phy-mode = "sgmii";
+ };
+
+ ethernet at 34000 {
+ status = "okay";
+ phy = <&phy1>;
+ phy-mode = "sgmii";
+ };
+
+ ethernet at 70000 {
+ pinctrl-names = "default";
+
+ /*
+ * The Reference Clock 0 is used to
+ * provide a clock to the PHY
+ */
+ pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "rgmii-id";
+ };
+ };
+
+ pcie-controller {
+ status = "okay";
+
+ /*
+ * The three PCIe units are accessible through
+ * standard mini-PCIe slots on the board.
+ */
+ pcie at 1,0 {
+ /* Port 0, Lane 0 */
+ status = "okay";
+ };
+
+ pcie at 2,0 {
+ /* Port 1, Lane 0 */
+ status = "okay";
+ };
+
+ pcie at 3,0 {
+ /* Port 2, Lane 0 */
+ status = "okay";
+ };
+ };
+ };
+};
--
1.9.1
^ permalink raw reply related [flat|nested] 34+ messages in thread* [PATCH v4 07/12] ARM: mvebu: Add Armada 385 Access Point Development Board support
@ 2015-01-08 17:38 ` Gregory CLEMENT
0 siblings, 0 replies; 34+ messages in thread
From: Gregory CLEMENT @ 2015-01-08 17:38 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth, Gregory CLEMENT
Cc: Thomas Petazzoni, Ezequiel Garcia,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Maxime Ripard,
Boris BREZILLON, Lior Amsalem, Tawfik Bayouk, Nadav Haklai,
Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA
From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
The A385-AP is a board produced by Marvell that holds 3 mPCIe slot, a 16MB
SPI-NOR, 3 Gigabit Ethernet ports, USB3 and NAND flash storage.
[gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org: switch the license to the dual
X11/GPL with the agreement of the author]
Signed-off-by: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Signed-off-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/armada-385-db-ap.dts | 178 +++++++++++++++++++++++++++++++++
2 files changed, 179 insertions(+)
create mode 100644 arch/arm/boot/dts/armada-385-db-ap.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 91bd5bd62857..ce7bc221fae7 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -535,6 +535,7 @@ dtb-$(CONFIG_MACH_ARMADA_375) += \
armada-375-db.dtb
dtb-$(CONFIG_MACH_ARMADA_38X) += \
armada-385-db.dtb \
+ armada-385-db-ap.dtb \
armada-385-rd.dtb
dtb-$(CONFIG_MACH_ARMADA_XP) += \
armada-xp-axpwifiap.dtb \
diff --git a/arch/arm/boot/dts/armada-385-db-ap.dts b/arch/arm/boot/dts/armada-385-db-ap.dts
new file mode 100644
index 000000000000..57b9119fb3e0
--- /dev/null
+++ b/arch/arm/boot/dts/armada-385-db-ap.dts
@@ -0,0 +1,178 @@
+/*
+ * Device Tree file for Marvell Armada 385 Access Point Development board
+ * (DB-88F6820-AP)
+ *
+ * Copyright (C) 2014 Marvell
+ *
+ * Nadav Haklai <nadavh-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "armada-385.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Marvell Armada 385 Access Point Development Board";
+ compatible = "marvell,a385-db-ap", "marvell,armada385", "marvell,armada38x";
+
+ chosen {
+ bootargs = "console=ttyS0,115200";
+ stdout-path = &uart1;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x80000000>; /* 2GB */
+ };
+
+ soc {
+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
+ MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
+
+ internal-regs {
+ spi1: spi@10680 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins>;
+ status = "okay";
+
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "st,m25p128";
+ reg = <0>; /* Chip select 0 */
+ spi-max-frequency = <54000000>;
+ };
+ };
+
+ i2c0: i2c@11000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+ status = "okay";
+
+ /*
+ * This bus is wired to two EEPROM
+ * sockets, one of which holding the
+ * board ID used by the bootloader.
+ * Erasing this EEPROM's content will
+ * brick the board.
+ * Use this bus with caution.
+ */
+ };
+
+ mdio@72004 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mdio_pins>;
+
+ phy0: ethernet-phy@1 {
+ reg = <1>;
+ };
+
+ phy1: ethernet-phy@4 {
+ reg = <4>;
+ };
+
+ phy2: ethernet-phy@6 {
+ reg = <6>;
+ };
+ };
+
+ /* UART0 is exposed through the JP8 connector */
+ uart0: serial@12000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins>;
+ status = "okay";
+ };
+
+ /*
+ * UART1 is exposed through a FTDI chip
+ * wired to the mini-USB connector
+ */
+ uart1: serial@12100 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
+ status = "okay";
+ };
+
+ ethernet@30000 {
+ status = "okay";
+ phy = <&phy2>;
+ phy-mode = "sgmii";
+ };
+
+ ethernet@34000 {
+ status = "okay";
+ phy = <&phy1>;
+ phy-mode = "sgmii";
+ };
+
+ ethernet@70000 {
+ pinctrl-names = "default";
+
+ /*
+ * The Reference Clock 0 is used to
+ * provide a clock to the PHY
+ */
+ pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "rgmii-id";
+ };
+ };
+
+ pcie-controller {
+ status = "okay";
+
+ /*
+ * The three PCIe units are accessible through
+ * standard mini-PCIe slots on the board.
+ */
+ pcie@1,0 {
+ /* Port 0, Lane 0 */
+ status = "okay";
+ };
+
+ pcie@2,0 {
+ /* Port 1, Lane 0 */
+ status = "okay";
+ };
+
+ pcie@3,0 {
+ /* Port 2, Lane 0 */
+ status = "okay";
+ };
+ };
+ };
+};
--
1.9.1
--
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^ permalink raw reply related [flat|nested] 34+ messages in thread* [PATCH v4 07/12] ARM: mvebu: Add Armada 385 Access Point Development Board support
@ 2015-01-08 17:44 ` Thomas Petazzoni
0 siblings, 0 replies; 34+ messages in thread
From: Thomas Petazzoni @ 2015-01-08 17:44 UTC (permalink / raw)
To: linux-arm-kernel
Dear Gregory CLEMENT,
On Thu, 8 Jan 2015 18:38:09 +0100, Gregory CLEMENT wrote:
> +#include "armada-385.dtsi"
Is it an Armada 385 or an Armada 388 ?
Thanks,
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v4 07/12] ARM: mvebu: Add Armada 385 Access Point Development Board support
@ 2015-01-08 17:44 ` Thomas Petazzoni
0 siblings, 0 replies; 34+ messages in thread
From: Thomas Petazzoni @ 2015-01-08 17:44 UTC (permalink / raw)
To: Gregory CLEMENT
Cc: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth, Ezequiel Garcia,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Maxime Ripard,
Boris BREZILLON, Lior Amsalem, Tawfik Bayouk, Nadav Haklai,
Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA
Dear Gregory CLEMENT,
On Thu, 8 Jan 2015 18:38:09 +0100, Gregory CLEMENT wrote:
> +#include "armada-385.dtsi"
Is it an Armada 385 or an Armada 388 ?
Thanks,
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH v4 07/12] ARM: mvebu: Add Armada 385 Access Point Development Board support
@ 2015-01-08 17:47 ` Gregory CLEMENT
0 siblings, 0 replies; 34+ messages in thread
From: Gregory CLEMENT @ 2015-01-08 17:47 UTC (permalink / raw)
To: linux-arm-kernel
Hi Thomas,
On 08/01/2015 18:44, Thomas Petazzoni wrote:
> Dear Gregory CLEMENT,
>
> On Thu, 8 Jan 2015 18:38:09 +0100, Gregory CLEMENT wrote:
>
>> +#include "armada-385.dtsi"
>
> Is it an Armada 385 or an Armada 388 ?
I checked it and there is no SATA ports on the board and the SoC presented
itself as an Armada 385: the revision ID is 0x6820.
Thanks,
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v4 07/12] ARM: mvebu: Add Armada 385 Access Point Development Board support
@ 2015-01-08 17:47 ` Gregory CLEMENT
0 siblings, 0 replies; 34+ messages in thread
From: Gregory CLEMENT @ 2015-01-08 17:47 UTC (permalink / raw)
To: Thomas Petazzoni
Cc: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth, Ezequiel Garcia,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Maxime Ripard,
Boris BREZILLON, Lior Amsalem, Tawfik Bayouk, Nadav Haklai,
Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA
Hi Thomas,
On 08/01/2015 18:44, Thomas Petazzoni wrote:
> Dear Gregory CLEMENT,
>
> On Thu, 8 Jan 2015 18:38:09 +0100, Gregory CLEMENT wrote:
>
>> +#include "armada-385.dtsi"
>
> Is it an Armada 385 or an Armada 388 ?
I checked it and there is no SATA ports on the board and the SoC presented
itself as an Armada 385: the revision ID is 0x6820.
Thanks,
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH v4 07/12] ARM: mvebu: Add Armada 385 Access Point Development Board support
@ 2015-01-08 18:37 ` Thomas Petazzoni
0 siblings, 0 replies; 34+ messages in thread
From: Thomas Petazzoni @ 2015-01-08 18:37 UTC (permalink / raw)
To: linux-arm-kernel
Dear Gregory CLEMENT,
On Thu, 08 Jan 2015 18:47:45 +0100, Gregory CLEMENT wrote:
> > Is it an Armada 385 or an Armada 388 ?
>
> I checked it and there is no SATA ports on the board and the SoC presented
> itself as an Armada 385: the revision ID is 0x6820.
Great, thanks for the double check!
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v4 07/12] ARM: mvebu: Add Armada 385 Access Point Development Board support
@ 2015-01-08 18:37 ` Thomas Petazzoni
0 siblings, 0 replies; 34+ messages in thread
From: Thomas Petazzoni @ 2015-01-08 18:37 UTC (permalink / raw)
To: Gregory CLEMENT
Cc: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth, Ezequiel Garcia,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Maxime Ripard,
Boris BREZILLON, Lior Amsalem, Tawfik Bayouk, Nadav Haklai,
Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA
Dear Gregory CLEMENT,
On Thu, 08 Jan 2015 18:47:45 +0100, Gregory CLEMENT wrote:
> > Is it an Armada 385 or an Armada 388 ?
>
> I checked it and there is no SATA ports on the board and the SoC presented
> itself as an Armada 385: the revision ID is 0x6820.
Great, thanks for the double check!
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH v4 08/12] ARM: mvebu: a38x: Add more pinctrl functions
@ 2015-01-08 17:38 ` Gregory CLEMENT
0 siblings, 0 replies; 34+ messages in thread
From: Gregory CLEMENT @ 2015-01-08 17:38 UTC (permalink / raw)
To: linux-arm-kernel
With the Armada 385 GP board more pinctrl functions depending of the
SoC are needed. Add them to the DTSI to avoid duplication.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm/boot/dts/armada-38x.dtsi | 47 +++++++++++++++++++++++++++++++++++++++
1 file changed, 47 insertions(+)
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index 98885c58be29..63fe15174fee 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -204,6 +204,14 @@
marvell,function = "ge0";
};
+ ge1_rgmii_pins: ge-rgmii-pins-1 {
+ marvell,pins = "mpp21", "mpp27", "mpp28",
+ "mpp29", "mpp30", "mpp31",
+ "mpp32", "mpp37", "mpp38",
+ "mpp39", "mpp40", "mpp41";
+ marvell,function = "ge1";
+ };
+
i2c0_pins: i2c-pins-0 {
marvell,pins = "mpp2", "mpp3";
marvell,function = "i2c0";
@@ -219,6 +227,17 @@
marvell,function = "ref";
};
+ ref_clk1_pins: ref-clk-pins-1 {
+ marvell,pins = "mpp46";
+ marvell,function = "ref";
+ };
+
+ spi0_pins: spi-pins-0 {
+ marvell,pins = "mpp22", "mpp23", "mpp24",
+ "mpp25";
+ marvell,function = "spi0";
+ };
+
spi1_pins: spi-pins-1 {
marvell,pins = "mpp56", "mpp57", "mpp58",
"mpp59";
@@ -234,6 +253,34 @@
marvell,pins = "mpp19", "mpp20";
marvell,function = "ua1";
};
+
+ sdhci_pins: sdhci-pins {
+ marvell,pins = "mpp48", "mpp49", "mpp50",
+ "mpp52", "mpp53", "mpp54",
+ "mpp55", "mpp57", "mpp58",
+ "mpp59";
+ marvell,function = "sd0";
+ };
+
+ sata0_pins: sata-pins-0 {
+ marvell,pins = "mpp20";
+ marvell,function = "sata0";
+ };
+
+ sata1_pins: sata-pins-1 {
+ marvell,pins = "mpp19";
+ marvell,function = "sata1";
+ };
+
+ sata2_pins: sata-pins-2 {
+ marvell,pins = "mpp47";
+ marvell,function = "sata2";
+ };
+
+ sata3_pins: sata-pins-3 {
+ marvell,pins = "mpp44";
+ marvell,function = "sata3";
+ };
};
gpio0: gpio at 18100 {
--
1.9.1
^ permalink raw reply related [flat|nested] 34+ messages in thread* [PATCH v4 08/12] ARM: mvebu: a38x: Add more pinctrl functions
@ 2015-01-08 17:38 ` Gregory CLEMENT
0 siblings, 0 replies; 34+ messages in thread
From: Gregory CLEMENT @ 2015-01-08 17:38 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth, Gregory CLEMENT
Cc: Thomas Petazzoni, Ezequiel Garcia,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Maxime Ripard,
Boris BREZILLON, Lior Amsalem, Tawfik Bayouk, Nadav Haklai,
Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA
With the Armada 385 GP board more pinctrl functions depending of the
SoC are needed. Add them to the DTSI to avoid duplication.
Signed-off-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
arch/arm/boot/dts/armada-38x.dtsi | 47 +++++++++++++++++++++++++++++++++++++++
1 file changed, 47 insertions(+)
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index 98885c58be29..63fe15174fee 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -204,6 +204,14 @@
marvell,function = "ge0";
};
+ ge1_rgmii_pins: ge-rgmii-pins-1 {
+ marvell,pins = "mpp21", "mpp27", "mpp28",
+ "mpp29", "mpp30", "mpp31",
+ "mpp32", "mpp37", "mpp38",
+ "mpp39", "mpp40", "mpp41";
+ marvell,function = "ge1";
+ };
+
i2c0_pins: i2c-pins-0 {
marvell,pins = "mpp2", "mpp3";
marvell,function = "i2c0";
@@ -219,6 +227,17 @@
marvell,function = "ref";
};
+ ref_clk1_pins: ref-clk-pins-1 {
+ marvell,pins = "mpp46";
+ marvell,function = "ref";
+ };
+
+ spi0_pins: spi-pins-0 {
+ marvell,pins = "mpp22", "mpp23", "mpp24",
+ "mpp25";
+ marvell,function = "spi0";
+ };
+
spi1_pins: spi-pins-1 {
marvell,pins = "mpp56", "mpp57", "mpp58",
"mpp59";
@@ -234,6 +253,34 @@
marvell,pins = "mpp19", "mpp20";
marvell,function = "ua1";
};
+
+ sdhci_pins: sdhci-pins {
+ marvell,pins = "mpp48", "mpp49", "mpp50",
+ "mpp52", "mpp53", "mpp54",
+ "mpp55", "mpp57", "mpp58",
+ "mpp59";
+ marvell,function = "sd0";
+ };
+
+ sata0_pins: sata-pins-0 {
+ marvell,pins = "mpp20";
+ marvell,function = "sata0";
+ };
+
+ sata1_pins: sata-pins-1 {
+ marvell,pins = "mpp19";
+ marvell,function = "sata1";
+ };
+
+ sata2_pins: sata-pins-2 {
+ marvell,pins = "mpp47";
+ marvell,function = "sata2";
+ };
+
+ sata3_pins: sata-pins-3 {
+ marvell,pins = "mpp44";
+ marvell,function = "sata3";
+ };
};
gpio0: gpio@18100 {
--
1.9.1
--
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^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v4 09/12] ARM: mvebu: a38x: Add missing labels
@ 2015-01-08 17:38 ` Gregory CLEMENT
0 siblings, 0 replies; 34+ messages in thread
From: Gregory CLEMENT @ 2015-01-08 17:38 UTC (permalink / raw)
To: linux-arm-kernel
The pintcrl label was missing. Adding it allowed referring it from the
root of the device tree. Also add the uart0 label used by the
bootloader.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm/boot/dts/armada-38x.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index 63fe15174fee..04fe80d101f8 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -173,7 +173,7 @@
status = "disabled";
};
- serial at 12000 {
+ uart0: serial at 12000 {
compatible = "snps,dw-apb-uart";
reg = <0x12000 0x100>;
reg-shift = <2>;
@@ -193,7 +193,7 @@
status = "disabled";
};
- pinctrl at 18000 {
+ pinctrl: pinctrl at 18000 {
reg = <0x18000 0x20>;
ge0_rgmii_pins: ge-rgmii-pins-0 {
--
1.9.1
^ permalink raw reply related [flat|nested] 34+ messages in thread* [PATCH v4 09/12] ARM: mvebu: a38x: Add missing labels
@ 2015-01-08 17:38 ` Gregory CLEMENT
0 siblings, 0 replies; 34+ messages in thread
From: Gregory CLEMENT @ 2015-01-08 17:38 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth, Gregory CLEMENT
Cc: Thomas Petazzoni, Ezequiel Garcia,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Maxime Ripard,
Boris BREZILLON, Lior Amsalem, Tawfik Bayouk, Nadav Haklai,
Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA
The pintcrl label was missing. Adding it allowed referring it from the
root of the device tree. Also add the uart0 label used by the
bootloader.
Signed-off-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
arch/arm/boot/dts/armada-38x.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index 63fe15174fee..04fe80d101f8 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -173,7 +173,7 @@
status = "disabled";
};
- serial@12000 {
+ uart0: serial@12000 {
compatible = "snps,dw-apb-uart";
reg = <0x12000 0x100>;
reg-shift = <2>;
@@ -193,7 +193,7 @@
status = "disabled";
};
- pinctrl@18000 {
+ pinctrl: pinctrl@18000 {
reg = <0x18000 0x20>;
ge0_rgmii_pins: ge-rgmii-pins-0 {
--
1.9.1
--
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^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v4 10/12] ARM: mvebu: Document the Device Tree binding for the Armada 388 SoC
@ 2015-01-08 17:38 ` Gregory CLEMENT
0 siblings, 0 replies; 34+ messages in thread
From: Gregory CLEMENT @ 2015-01-08 17:38 UTC (permalink / raw)
To: linux-arm-kernel
Update the binding documentation of the Armada 38x Soc family with
the Armada 388.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
Documentation/devicetree/bindings/arm/armada-38x.txt | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/armada-38x.txt b/Documentation/devicetree/bindings/arm/armada-38x.txt
index ad9f8ed4d9bd..202953f1887e 100644
--- a/Documentation/devicetree/bindings/arm/armada-38x.txt
+++ b/Documentation/devicetree/bindings/arm/armada-38x.txt
@@ -15,6 +15,13 @@ Required root node property:
compatible: must contain "marvell,armada385"
+In addition, boards using the Marvell Armada 388 SoC shall have the
+following property before the previous one:
+
+Required root node property:
+
+compatible: must contain "marvell,armada388"
+
Example:
compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada380";
--
1.9.1
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v4 10/12] ARM: mvebu: Document the Device Tree binding for the Armada 388 SoC
@ 2015-01-08 17:38 ` Gregory CLEMENT
0 siblings, 0 replies; 34+ messages in thread
From: Gregory CLEMENT @ 2015-01-08 17:38 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth, Gregory CLEMENT
Cc: Thomas Petazzoni, Ezequiel Garcia,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Maxime Ripard,
Boris BREZILLON, Lior Amsalem, Tawfik Bayouk, Nadav Haklai,
Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA
Update the binding documentation of the Armada 38x Soc family with
the Armada 388.
Signed-off-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
Documentation/devicetree/bindings/arm/armada-38x.txt | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/armada-38x.txt b/Documentation/devicetree/bindings/arm/armada-38x.txt
index ad9f8ed4d9bd..202953f1887e 100644
--- a/Documentation/devicetree/bindings/arm/armada-38x.txt
+++ b/Documentation/devicetree/bindings/arm/armada-38x.txt
@@ -15,6 +15,13 @@ Required root node property:
compatible: must contain "marvell,armada385"
+In addition, boards using the Marvell Armada 388 SoC shall have the
+following property before the previous one:
+
+Required root node property:
+
+compatible: must contain "marvell,armada388"
+
Example:
compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada380";
--
1.9.1
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v4 11/12] ARM: mvebu: Add Device Tree description of the Armada 388 SoC
@ 2015-01-08 17:38 ` Gregory CLEMENT
0 siblings, 0 replies; 34+ messages in thread
From: Gregory CLEMENT @ 2015-01-08 17:38 UTC (permalink / raw)
To: linux-arm-kernel
This SoC belongs to the Armada 38x family. The main difference with
the Armada 385 is that the 388 can handle two more SATA
ports. Currently the consequence is the use of a different compatible
string for the pinctrl node, in order to be able to use the pins
associated to this 2 new SATA ports. The second SATA controller has
also been moved from the armada38x.dtsi as it it specific to the
Armada388 version.
In the same time the Armada385 DB and Armada 385 RD board have been
renamed in the 388 one and now include the armada-388.dtsi file. AS
both of them have 4 SATA ports the SoC used on them were wrongly
described.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm/boot/dts/Makefile | 4 +-
.../dts/{armada-385-db.dts => armada-388-db.dts} | 7 ++-
.../dts/{armada-385-rd.dts => armada-388-rd.dts} | 7 ++-
arch/arm/boot/dts/armada-388.dtsi | 70 ++++++++++++++++++++++
4 files changed, 80 insertions(+), 8 deletions(-)
rename arch/arm/boot/dts/{armada-385-db.dts => armada-388-db.dts} (93%)
rename arch/arm/boot/dts/{armada-385-rd.dts => armada-388-rd.dts} (89%)
create mode 100644 arch/arm/boot/dts/armada-388.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index ce7bc221fae7..4613c1603692 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -534,9 +534,9 @@ dtb-$(CONFIG_MACH_ARMADA_370) += \
dtb-$(CONFIG_MACH_ARMADA_375) += \
armada-375-db.dtb
dtb-$(CONFIG_MACH_ARMADA_38X) += \
- armada-385-db.dtb \
armada-385-db-ap.dtb \
- armada-385-rd.dtb
+ armada-388-db.dtb \
+ armada-388-rd.dtb
dtb-$(CONFIG_MACH_ARMADA_XP) += \
armada-xp-axpwifiap.dtb \
armada-xp-db.dtb \
diff --git a/arch/arm/boot/dts/armada-385-db.dts b/arch/arm/boot/dts/armada-388-db.dts
similarity index 93%
rename from arch/arm/boot/dts/armada-385-db.dts
rename to arch/arm/boot/dts/armada-388-db.dts
index 212605ccc7b6..e200836c30be 100644
--- a/arch/arm/boot/dts/armada-385-db.dts
+++ b/arch/arm/boot/dts/armada-388-db.dts
@@ -1,5 +1,5 @@
/*
- * Device Tree file for Marvell Armada 385 evaluation board
+ * Device Tree file for Marvell Armada 388 evaluation board
* (DB-88F6820)
*
* Copyright (C) 2014 Marvell
@@ -12,11 +12,12 @@
*/
/dts-v1/;
-#include "armada-385.dtsi"
+#include "armada-388.dtsi"
/ {
model = "Marvell Armada 385 Development Board";
- compatible = "marvell,a385-db", "marvell,armada385", "marvell,armada380";
+ compatible = "marvell,a385-db", "marvell,armada388",
+ "marvell,armada385", "marvell,armada380";
chosen {
bootargs = "console=ttyS0,115200 earlyprintk";
diff --git a/arch/arm/boot/dts/armada-385-rd.dts b/arch/arm/boot/dts/armada-388-rd.dts
similarity index 89%
rename from arch/arm/boot/dts/armada-385-rd.dts
rename to arch/arm/boot/dts/armada-388-rd.dts
index 74a3bfe6efd7..c98a8f8d01a9 100644
--- a/arch/arm/boot/dts/armada-385-rd.dts
+++ b/arch/arm/boot/dts/armada-388-rd.dts
@@ -1,5 +1,5 @@
/*
- * Device Tree file for Marvell Armada 385 Reference Design board
+ * Device Tree file for Marvell Armada 388 Reference Design board
* (RD-88F6820-AP)
*
* Copyright (C) 2014 Marvell
@@ -13,11 +13,12 @@
*/
/dts-v1/;
-#include "armada-385.dtsi"
+#include "armada-388.dtsi"
/ {
model = "Marvell Armada 385 Reference Design";
- compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada380";
+ compatible = "marvell,a385-rd", "marvell,armada388",
+ "marvell,armada385","marvell,armada380";
chosen {
bootargs = "console=ttyS0,115200 earlyprintk";
diff --git a/arch/arm/boot/dts/armada-388.dtsi b/arch/arm/boot/dts/armada-388.dtsi
new file mode 100644
index 000000000000..564fa5937e25
--- /dev/null
+++ b/arch/arm/boot/dts/armada-388.dtsi
@@ -0,0 +1,70 @@
+/*
+ * Device Tree Include file for Marvell Armada 388 SoC.
+ *
+ * Copyright (C) 2015 Marvell
+ *
+ * Gregory CLEMENT <gregory.clement@free-electrons.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ *
+ * The main difference with the Armada 385 is that the 388 can handle two more
+ * SATA ports. So we can reuse the dtsi of the Armada 385, override the pinctrl
+ * property and the name of the SoC, and add the second SATA host which control
+ * the 2 other ports.
+ */
+
+#include "armada-385.dtsi"
+
+/ {
+ model = "Marvell Armada 388 family SoC";
+ compatible = "marvell,armada388", "marvell,armada385",
+ "marvell,armada380";
+
+ soc {
+ internal-regs {
+ pinctrl at 18000 {
+ compatible = "marvell,mv88f6828-pinctrl";
+ };
+
+ sata at e0000 {
+ compatible = "marvell,armada-380-ahci";
+ reg = <0xe0000 0x2000>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gateclk 30>;
+ status = "disabled";
+ };
+
+ };
+ };
+};
--
1.9.1
^ permalink raw reply related [flat|nested] 34+ messages in thread* [PATCH v4 11/12] ARM: mvebu: Add Device Tree description of the Armada 388 SoC
@ 2015-01-08 17:38 ` Gregory CLEMENT
0 siblings, 0 replies; 34+ messages in thread
From: Gregory CLEMENT @ 2015-01-08 17:38 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth, Gregory CLEMENT
Cc: Thomas Petazzoni, Ezequiel Garcia,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Maxime Ripard,
Boris BREZILLON, Lior Amsalem, Tawfik Bayouk, Nadav Haklai,
Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA
This SoC belongs to the Armada 38x family. The main difference with
the Armada 385 is that the 388 can handle two more SATA
ports. Currently the consequence is the use of a different compatible
string for the pinctrl node, in order to be able to use the pins
associated to this 2 new SATA ports. The second SATA controller has
also been moved from the armada38x.dtsi as it it specific to the
Armada388 version.
In the same time the Armada385 DB and Armada 385 RD board have been
renamed in the 388 one and now include the armada-388.dtsi file. AS
both of them have 4 SATA ports the SoC used on them were wrongly
described.
Signed-off-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
arch/arm/boot/dts/Makefile | 4 +-
.../dts/{armada-385-db.dts => armada-388-db.dts} | 7 ++-
.../dts/{armada-385-rd.dts => armada-388-rd.dts} | 7 ++-
arch/arm/boot/dts/armada-388.dtsi | 70 ++++++++++++++++++++++
4 files changed, 80 insertions(+), 8 deletions(-)
rename arch/arm/boot/dts/{armada-385-db.dts => armada-388-db.dts} (93%)
rename arch/arm/boot/dts/{armada-385-rd.dts => armada-388-rd.dts} (89%)
create mode 100644 arch/arm/boot/dts/armada-388.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index ce7bc221fae7..4613c1603692 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -534,9 +534,9 @@ dtb-$(CONFIG_MACH_ARMADA_370) += \
dtb-$(CONFIG_MACH_ARMADA_375) += \
armada-375-db.dtb
dtb-$(CONFIG_MACH_ARMADA_38X) += \
- armada-385-db.dtb \
armada-385-db-ap.dtb \
- armada-385-rd.dtb
+ armada-388-db.dtb \
+ armada-388-rd.dtb
dtb-$(CONFIG_MACH_ARMADA_XP) += \
armada-xp-axpwifiap.dtb \
armada-xp-db.dtb \
diff --git a/arch/arm/boot/dts/armada-385-db.dts b/arch/arm/boot/dts/armada-388-db.dts
similarity index 93%
rename from arch/arm/boot/dts/armada-385-db.dts
rename to arch/arm/boot/dts/armada-388-db.dts
index 212605ccc7b6..e200836c30be 100644
--- a/arch/arm/boot/dts/armada-385-db.dts
+++ b/arch/arm/boot/dts/armada-388-db.dts
@@ -1,5 +1,5 @@
/*
- * Device Tree file for Marvell Armada 385 evaluation board
+ * Device Tree file for Marvell Armada 388 evaluation board
* (DB-88F6820)
*
* Copyright (C) 2014 Marvell
@@ -12,11 +12,12 @@
*/
/dts-v1/;
-#include "armada-385.dtsi"
+#include "armada-388.dtsi"
/ {
model = "Marvell Armada 385 Development Board";
- compatible = "marvell,a385-db", "marvell,armada385", "marvell,armada380";
+ compatible = "marvell,a385-db", "marvell,armada388",
+ "marvell,armada385", "marvell,armada380";
chosen {
bootargs = "console=ttyS0,115200 earlyprintk";
diff --git a/arch/arm/boot/dts/armada-385-rd.dts b/arch/arm/boot/dts/armada-388-rd.dts
similarity index 89%
rename from arch/arm/boot/dts/armada-385-rd.dts
rename to arch/arm/boot/dts/armada-388-rd.dts
index 74a3bfe6efd7..c98a8f8d01a9 100644
--- a/arch/arm/boot/dts/armada-385-rd.dts
+++ b/arch/arm/boot/dts/armada-388-rd.dts
@@ -1,5 +1,5 @@
/*
- * Device Tree file for Marvell Armada 385 Reference Design board
+ * Device Tree file for Marvell Armada 388 Reference Design board
* (RD-88F6820-AP)
*
* Copyright (C) 2014 Marvell
@@ -13,11 +13,12 @@
*/
/dts-v1/;
-#include "armada-385.dtsi"
+#include "armada-388.dtsi"
/ {
model = "Marvell Armada 385 Reference Design";
- compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada380";
+ compatible = "marvell,a385-rd", "marvell,armada388",
+ "marvell,armada385","marvell,armada380";
chosen {
bootargs = "console=ttyS0,115200 earlyprintk";
diff --git a/arch/arm/boot/dts/armada-388.dtsi b/arch/arm/boot/dts/armada-388.dtsi
new file mode 100644
index 000000000000..564fa5937e25
--- /dev/null
+++ b/arch/arm/boot/dts/armada-388.dtsi
@@ -0,0 +1,70 @@
+/*
+ * Device Tree Include file for Marvell Armada 388 SoC.
+ *
+ * Copyright (C) 2015 Marvell
+ *
+ * Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ *
+ * The main difference with the Armada 385 is that the 388 can handle two more
+ * SATA ports. So we can reuse the dtsi of the Armada 385, override the pinctrl
+ * property and the name of the SoC, and add the second SATA host which control
+ * the 2 other ports.
+ */
+
+#include "armada-385.dtsi"
+
+/ {
+ model = "Marvell Armada 388 family SoC";
+ compatible = "marvell,armada388", "marvell,armada385",
+ "marvell,armada380";
+
+ soc {
+ internal-regs {
+ pinctrl@18000 {
+ compatible = "marvell,mv88f6828-pinctrl";
+ };
+
+ sata@e0000 {
+ compatible = "marvell,armada-380-ahci";
+ reg = <0xe0000 0x2000>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gateclk 30>;
+ status = "disabled";
+ };
+
+ };
+ };
+};
--
1.9.1
--
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^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v4 12/12] ARM: mvebu: Add Armada 388 General Purpose Development Board support
@ 2015-01-08 17:38 ` Gregory CLEMENT
0 siblings, 0 replies; 34+ messages in thread
From: Gregory CLEMENT @ 2015-01-08 17:38 UTC (permalink / raw)
To: linux-arm-kernel
The A388-GP is a board produced by Marvell that holds
- 1 PCIe slot
- 2 mini PCIe slot (one of them is multiplexed with the PCIe slot,
muxing is selected through the GPIO expander)
- 1 16MB SPI-NOR
- 2 Gigabit Ethernet ports
- 4 SATA ports (2 of them are multiplexed with the mini PCIe slots,
muxing is selected through the GPIO expander)
- 1 SDIO slot
- 1 USB3 port
- 2 USB2 port
- 2 GPIO/interrupts expander on I2C
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/armada-385-gp.dts | 288 ++++++++++++++++++++++++++++++++++++
2 files changed, 289 insertions(+)
create mode 100644 arch/arm/boot/dts/armada-385-gp.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 4613c1603692..d5178d103766 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -536,6 +536,7 @@ dtb-$(CONFIG_MACH_ARMADA_375) += \
dtb-$(CONFIG_MACH_ARMADA_38X) += \
armada-385-db-ap.dtb \
armada-388-db.dtb \
+ armada-388-gp.dtb \
armada-388-rd.dtb
dtb-$(CONFIG_MACH_ARMADA_XP) += \
armada-xp-axpwifiap.dtb \
diff --git a/arch/arm/boot/dts/armada-385-gp.dts b/arch/arm/boot/dts/armada-385-gp.dts
new file mode 100644
index 000000000000..4df22bf91683
--- /dev/null
+++ b/arch/arm/boot/dts/armada-385-gp.dts
@@ -0,0 +1,288 @@
+/*
+ * Device Tree file for Marvell Armada 385 development board
+ * (RD-88F6820-GP)
+ *
+ * Copyright (C) 2014 Marvell
+ *
+ * Gregory CLEMENT <gregory.clement@free-electrons.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "armada-388.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Marvell Armada 385 GP";
+ compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380";
+
+ chosen {
+ bootargs = "console=ttyS0,115200";
+ stdout-path = &uart0;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x80000000>; /* 2 GB */
+ };
+
+ soc {
+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
+ MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
+
+ internal-regs {
+ spi at 10600 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>;
+ status = "okay";
+
+ spi-flash at 0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "st,m25p128";
+ reg = <0>; /* Chip select 0 */
+ spi-max-frequency = <50000000>;
+ m25p,fast-read;
+ };
+ };
+
+ i2c at 11000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+ status = "okay";
+ clock-frequency = <100000>;
+ /*
+ * The EEPROM located at adresse 54 is needed
+ * for the boot - DO NOT ERASE IT -
+ */
+
+ expander0: pca9555 at 20 {
+ compatible = "nxp,pca9555";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pca0_pins>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x20>;
+ };
+
+ expander1: pca9555 at 21 {
+ compatible = "nxp,pca9555";
+ pinctrl-names = "default";
+ interrupt-parent = <&gpio0>;
+ interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x21>;
+ };
+
+ };
+
+ serial at 12000 {
+ /*
+ * Exported on the micro USB connector CON16
+ * through an FTDI
+ */
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins>;
+ status = "okay";
+ };
+
+ /* GE1 CON15 */
+ ethernet at 30000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ge1_rgmii_pins>;
+ status = "okay";
+ phy = <&phy1>;
+ phy-mode = "rgmii-id";
+ };
+
+ /* CON4 */
+ usb at 50000 {
+ vcc-supply = <®_usb2_0_vbus>;
+ status = "okay";
+ };
+
+ /* GE0 CON1 */
+ ethernet at 70000 {
+ pinctrl-names = "default";
+ /*
+ * The Reference Clock 0 is used to provide a
+ * clock to the PHY
+ */
+ pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "rgmii-id";
+ };
+
+
+ mdio at 72004 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mdio_pins>;
+
+ phy0: ethernet-phy at 1 {
+ reg = <1>;
+ };
+
+ phy1: ethernet-phy at 0 {
+ reg = <0>;
+ };
+ };
+
+ sata at a8000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&sata0_pins>, <&sata1_pins>;
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ sata at e0000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&sata2_pins>, <&sata3_pins>;
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ sdhci at d8000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdhci_pins>;
+ cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;
+ no-1-8-v;
+ wp-inverted;
+ bus-width = <8>;
+ status = "okay";
+ };
+
+ /* CON5 */
+ usb3 at f0000 {
+ vcc-supply = <®_usb2_1_vbus>;
+ status = "okay";
+ };
+
+ /* CON7 */
+ usb3 at f8000 {
+ vcc-supply = <®_usb3_vbus>;
+ status = "okay";
+ };
+ };
+
+ pcie-controller {
+ status = "okay";
+ /*
+ * One PCIe units is accessible through
+ * standard PCIe slot on the board.
+ */
+ pcie at 1,0 {
+ /* Port 0, Lane 0 */
+ status = "okay";
+ };
+
+ /*
+ * The two other PCIe units are accessible
+ * through mini PCIe slot on the board.
+ */
+ pcie at 2,0 {
+ /* Port 1, Lane 0 */
+ status = "okay";
+ };
+ pcie at 3,0 {
+ /* Port 2, Lane 0 */
+ status = "okay";
+ };
+ };
+
+ gpio-fan {
+ compatible = "gpio-fan";
+ gpios = <&expander1 3 GPIO_ACTIVE_HIGH>;
+ gpio-fan,speed-map = < 0 0
+ 3000 1>;
+ };
+ };
+
+ reg_usb3_vbus: usb3-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb3-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ regulator-always-on;
+ gpio = <&expander1 15 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_usb2_0_vbus: v5-vbus0 {
+ compatible = "regulator-fixed";
+ regulator-name = "v5.0-vbus0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ regulator-always-on;
+ gpio = <&expander1 14 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_usb2_1_vbus: v5-vbus1 {
+ compatible = "regulator-fixed";
+ regulator-name = "v5.0-vbus1";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ regulator-always-on;
+ gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_usb2_1_vbus: v5-vbus1 {
+ compatible = "regulator-fixed";
+ regulator-name = "v5.0-vbus1";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ regulator-always-on;
+ gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&pinctrl {
+ pca0_pins: pca0_pins {
+ marvell,pins = "mpp18";
+ marvell,function = "gpio";
+ };
+};
--
1.9.1
^ permalink raw reply related [flat|nested] 34+ messages in thread* [PATCH v4 12/12] ARM: mvebu: Add Armada 388 General Purpose Development Board support
@ 2015-01-08 17:38 ` Gregory CLEMENT
0 siblings, 0 replies; 34+ messages in thread
From: Gregory CLEMENT @ 2015-01-08 17:38 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth, Gregory CLEMENT
Cc: Thomas Petazzoni, Ezequiel Garcia,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Maxime Ripard,
Boris BREZILLON, Lior Amsalem, Tawfik Bayouk, Nadav Haklai,
Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA
The A388-GP is a board produced by Marvell that holds
- 1 PCIe slot
- 2 mini PCIe slot (one of them is multiplexed with the PCIe slot,
muxing is selected through the GPIO expander)
- 1 16MB SPI-NOR
- 2 Gigabit Ethernet ports
- 4 SATA ports (2 of them are multiplexed with the mini PCIe slots,
muxing is selected through the GPIO expander)
- 1 SDIO slot
- 1 USB3 port
- 2 USB2 port
- 2 GPIO/interrupts expander on I2C
Signed-off-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/armada-385-gp.dts | 288 ++++++++++++++++++++++++++++++++++++
2 files changed, 289 insertions(+)
create mode 100644 arch/arm/boot/dts/armada-385-gp.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 4613c1603692..d5178d103766 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -536,6 +536,7 @@ dtb-$(CONFIG_MACH_ARMADA_375) += \
dtb-$(CONFIG_MACH_ARMADA_38X) += \
armada-385-db-ap.dtb \
armada-388-db.dtb \
+ armada-388-gp.dtb \
armada-388-rd.dtb
dtb-$(CONFIG_MACH_ARMADA_XP) += \
armada-xp-axpwifiap.dtb \
diff --git a/arch/arm/boot/dts/armada-385-gp.dts b/arch/arm/boot/dts/armada-385-gp.dts
new file mode 100644
index 000000000000..4df22bf91683
--- /dev/null
+++ b/arch/arm/boot/dts/armada-385-gp.dts
@@ -0,0 +1,288 @@
+/*
+ * Device Tree file for Marvell Armada 385 development board
+ * (RD-88F6820-GP)
+ *
+ * Copyright (C) 2014 Marvell
+ *
+ * Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "armada-388.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Marvell Armada 385 GP";
+ compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380";
+
+ chosen {
+ bootargs = "console=ttyS0,115200";
+ stdout-path = &uart0;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x80000000>; /* 2 GB */
+ };
+
+ soc {
+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
+ MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
+
+ internal-regs {
+ spi@10600 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>;
+ status = "okay";
+
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "st,m25p128";
+ reg = <0>; /* Chip select 0 */
+ spi-max-frequency = <50000000>;
+ m25p,fast-read;
+ };
+ };
+
+ i2c@11000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+ status = "okay";
+ clock-frequency = <100000>;
+ /*
+ * The EEPROM located at adresse 54 is needed
+ * for the boot - DO NOT ERASE IT -
+ */
+
+ expander0: pca9555@20 {
+ compatible = "nxp,pca9555";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pca0_pins>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x20>;
+ };
+
+ expander1: pca9555@21 {
+ compatible = "nxp,pca9555";
+ pinctrl-names = "default";
+ interrupt-parent = <&gpio0>;
+ interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x21>;
+ };
+
+ };
+
+ serial@12000 {
+ /*
+ * Exported on the micro USB connector CON16
+ * through an FTDI
+ */
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins>;
+ status = "okay";
+ };
+
+ /* GE1 CON15 */
+ ethernet@30000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ge1_rgmii_pins>;
+ status = "okay";
+ phy = <&phy1>;
+ phy-mode = "rgmii-id";
+ };
+
+ /* CON4 */
+ usb@50000 {
+ vcc-supply = <®_usb2_0_vbus>;
+ status = "okay";
+ };
+
+ /* GE0 CON1 */
+ ethernet@70000 {
+ pinctrl-names = "default";
+ /*
+ * The Reference Clock 0 is used to provide a
+ * clock to the PHY
+ */
+ pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "rgmii-id";
+ };
+
+
+ mdio@72004 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mdio_pins>;
+
+ phy0: ethernet-phy@1 {
+ reg = <1>;
+ };
+
+ phy1: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+
+ sata@a8000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&sata0_pins>, <&sata1_pins>;
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ sata@e0000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&sata2_pins>, <&sata3_pins>;
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ sdhci@d8000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdhci_pins>;
+ cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;
+ no-1-8-v;
+ wp-inverted;
+ bus-width = <8>;
+ status = "okay";
+ };
+
+ /* CON5 */
+ usb3@f0000 {
+ vcc-supply = <®_usb2_1_vbus>;
+ status = "okay";
+ };
+
+ /* CON7 */
+ usb3@f8000 {
+ vcc-supply = <®_usb3_vbus>;
+ status = "okay";
+ };
+ };
+
+ pcie-controller {
+ status = "okay";
+ /*
+ * One PCIe units is accessible through
+ * standard PCIe slot on the board.
+ */
+ pcie@1,0 {
+ /* Port 0, Lane 0 */
+ status = "okay";
+ };
+
+ /*
+ * The two other PCIe units are accessible
+ * through mini PCIe slot on the board.
+ */
+ pcie@2,0 {
+ /* Port 1, Lane 0 */
+ status = "okay";
+ };
+ pcie@3,0 {
+ /* Port 2, Lane 0 */
+ status = "okay";
+ };
+ };
+
+ gpio-fan {
+ compatible = "gpio-fan";
+ gpios = <&expander1 3 GPIO_ACTIVE_HIGH>;
+ gpio-fan,speed-map = < 0 0
+ 3000 1>;
+ };
+ };
+
+ reg_usb3_vbus: usb3-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb3-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ regulator-always-on;
+ gpio = <&expander1 15 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_usb2_0_vbus: v5-vbus0 {
+ compatible = "regulator-fixed";
+ regulator-name = "v5.0-vbus0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ regulator-always-on;
+ gpio = <&expander1 14 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_usb2_1_vbus: v5-vbus1 {
+ compatible = "regulator-fixed";
+ regulator-name = "v5.0-vbus1";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ regulator-always-on;
+ gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_usb2_1_vbus: v5-vbus1 {
+ compatible = "regulator-fixed";
+ regulator-name = "v5.0-vbus1";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ regulator-always-on;
+ gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&pinctrl {
+ pca0_pins: pca0_pins {
+ marvell,pins = "mpp18";
+ marvell,function = "gpio";
+ };
+};
--
1.9.1
--
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* [PATCH v4 00/12] Add Armada 38x GP and AP boards support
2015-01-08 17:38 ` Gregory CLEMENT
@ 2015-01-09 15:20 ` Andrew Lunn
-1 siblings, 0 replies; 34+ messages in thread
From: Andrew Lunn @ 2015-01-09 15:20 UTC (permalink / raw)
To: linux-arm-kernel
> Gregory CLEMENT (5):
> ARM: mvebu: a38x: Add more pinctrl functions
> ARM: mvebu: a38x: Add missing labels
> ARM: mvebu: Document the Device Tree binding for the Armada 388 SoC
> ARM: mvebu: Add Device Tree description of the Armada 388 SoC
> ARM: mvebu: Add Armada 388 General Purpose Development Board support
All added to mvebu/dt
>
> Maxime Ripard (7):
> ARM: mvebu: Rename DEBUG_LL to indicate UART index
> ARM: mvebu: Add UART1 as DEBUG_LL possible target
Added to mvebu/soc
> ARM: mvebu: a38x: Fix node names
All added to mvebu/dt
> pinctrl: mvebu: a38x: Add UART1 muxing options
Linus took this one already
> ARM: mvebu: A38x: Remove redundant pinctrl informations
> ARM: mvebu: Add a number of pinctrl functions
> ARM: mvebu: Add Armada 385 Access Point Development Board support
All added to mvebu/dt
Thanks
Andrew
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v4 00/12] Add Armada 38x GP and AP boards support
@ 2015-01-09 15:20 ` Andrew Lunn
0 siblings, 0 replies; 34+ messages in thread
From: Andrew Lunn @ 2015-01-09 15:20 UTC (permalink / raw)
To: Gregory CLEMENT
Cc: Thomas Petazzoni, Boris BREZILLON, Jason Cooper, Tawfik Bayouk,
devicetree, Nadav Haklai, Lior Amsalem, Ezequiel Garcia,
Mark Rutland, Maxime Ripard, linux-arm-kernel,
Sebastian Hesselbarth
> Gregory CLEMENT (5):
> ARM: mvebu: a38x: Add more pinctrl functions
> ARM: mvebu: a38x: Add missing labels
> ARM: mvebu: Document the Device Tree binding for the Armada 388 SoC
> ARM: mvebu: Add Device Tree description of the Armada 388 SoC
> ARM: mvebu: Add Armada 388 General Purpose Development Board support
All added to mvebu/dt
>
> Maxime Ripard (7):
> ARM: mvebu: Rename DEBUG_LL to indicate UART index
> ARM: mvebu: Add UART1 as DEBUG_LL possible target
Added to mvebu/soc
> ARM: mvebu: a38x: Fix node names
All added to mvebu/dt
> pinctrl: mvebu: a38x: Add UART1 muxing options
Linus took this one already
> ARM: mvebu: A38x: Remove redundant pinctrl informations
> ARM: mvebu: Add a number of pinctrl functions
> ARM: mvebu: Add Armada 385 Access Point Development Board support
All added to mvebu/dt
Thanks
Andrew
^ permalink raw reply [flat|nested] 34+ messages in thread