[PATCH v2 0/3] arm: introduce basic Renesas R-Car Gen2 platform support

[PATCH v2 0/3] arm: introduce basic Renesas R-Car Gen2 platform support

[Iurii Konovalenko]

From: Iurii Konovalenko <iurii.konovalenko@globallogic.com>

Changes in v2:
1. Remove timer initialization from board file (timer shold be initialized in u-boot)
2. Coding style fixes.
3. Change ioremap_attr() to ioremap_nocache().
4. Other misc fixes.


The following patch series adds basic support needed for R-Car Gen2 evm boards.
Verified on Xen 4.5.0 stable on Lager board with and without early_printk.

Iurii Konovalenko (1):
  xen/arm: Introduce support for Renesas R-Car Gen2 platform

Oleksandr Tyshchenko (2):
  xen/arm: Add R-Car Gen2 support for early printk
  xen/arm: Add new driver for R-Car Gen2 UART

 config/arm32.mk                    |   1 +
 docs/misc/arm/early-printk.txt     |   1 +
 xen/arch/arm/Rules.mk              |   4 +
 xen/arch/arm/arm32/debug-rcar2.inc |  49 +++++
 xen/arch/arm/platforms/Makefile    |   1 +
 xen/arch/arm/platforms/shmobile.c  |  71 +++++++
 xen/drivers/char/Makefile          |   1 +
 xen/drivers/char/rcar2-uart.c      | 376 +++++++++++++++++++++++++++++++++++++
 xen/include/asm-arm/rcar2-uart.h   | 107 +++++++++++
 9 files changed, 611 insertions(+)
 create mode 100644 xen/arch/arm/arm32/debug-rcar2.inc
 create mode 100644 xen/arch/arm/platforms/shmobile.c
 create mode 100644 xen/drivers/char/rcar2-uart.c
 create mode 100644 xen/include/asm-arm/rcar2-uart.h

-- 
1.9.1

[PATCH v2 1/3] xen/arm: Add R-Car Gen2 support for early printk

[Iurii Konovalenko]

From: Oleksandr Tyshchenko <oleksandr.tyshchenko@globallogic.com>

Signed-off-by: Oleksandr Tyshchenko <oleksandr.tyshchenko@globallogic.com>
---
 docs/misc/arm/early-printk.txt     |   1 +
 xen/arch/arm/Rules.mk              |   4 ++
 xen/arch/arm/arm32/debug-rcar2.inc |  49 +++++++++++++++++
 xen/include/asm-arm/rcar2-uart.h   | 107 +++++++++++++++++++++++++++++++++++++
 4 files changed, 161 insertions(+)
 create mode 100644 xen/arch/arm/arm32/debug-rcar2.inc
 create mode 100644 xen/include/asm-arm/rcar2-uart.h

diff --git a/docs/misc/arm/early-printk.txt b/docs/misc/arm/early-printk.txt
index 71a0247..1ca2a55 100644
--- a/docs/misc/arm/early-printk.txt
+++ b/docs/misc/arm/early-printk.txt
@@ -19,6 +19,7 @@ where mach is the name of the machine:
   - brcm: printk with 8250 on Broadcom 7445D0 boards with A15 processors.
   - hip04-d01: printk with 8250 on HiSilicon Hip-04 D01
   - seattle: printk with pl011 for AMD Seattle processor
+  - lager: printk with SCIF0 on Renesas R-Car H2 processors
 
 The base address and baud rate is hardcoded in xen/arch/arm/Rules.mk,
 see there when adding support for new machines.
diff --git a/xen/arch/arm/Rules.mk b/xen/arch/arm/Rules.mk
index 4ee51a9..ff02893 100644
--- a/xen/arch/arm/Rules.mk
+++ b/xen/arch/arm/Rules.mk
@@ -109,6 +109,10 @@ ifeq ($(CONFIG_EARLY_PRINTK), seattle)
 EARLY_PRINTK_INC := pl011
 EARLY_UART_BASE_ADDRESS := 0xe1010000
 endif
+ifeq ($(CONFIG_EARLY_PRINTK), lager)
+EARLY_PRINTK_INC := rcar2
+EARLY_UART_BASE_ADDRESS := 0xe6e60000
+endif
 
 ifneq ($(EARLY_PRINTK_INC),)
 EARLY_PRINTK := y
diff --git a/xen/arch/arm/arm32/debug-rcar2.inc b/xen/arch/arm/arm32/debug-rcar2.inc
new file mode 100644
index 0000000..e8d17f3
--- /dev/null
+++ b/xen/arch/arm/arm32/debug-rcar2.inc
@@ -0,0 +1,49 @@
+/*
+ * xen/arch/arm/arm32/debug-rcar2.inc
+ *
+ * R-Car Gen2 specific debug code
+ *
+ * Oleksandr Tyshchenko <oleksandr.tyshchenko@globallogic.com>
+ * Copyright (C) 2014, Globallogic.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <asm/rcar2-uart.h>
+
+/* R-Car Gen2 UART wait UART to be ready to transmit
+ * rb: register which contains the UART base address
+ * rc: scratch register
+ */
+.macro early_uart_ready rb rc
+1:
+        ldrh   \rc, [\rb, #SCIF_SCFSR]   /* <- SCFSR (status register) */
+        tst    \rc, #SCFSR_TDFE          /* Check TDFE bit */
+        beq    1b                        /* Wait for the UART to be ready */
+.endm
+
+/* R-Car Gen2 UART transmit character
+ * rb: register which contains the UART base address
+ * rt: register which contains the character to transmit
+ */
+.macro early_uart_transmit rb rt
+        strb   \rt, [\rb, #SCIF_SCFTDR]                  /* -> SCFTDR (data register) */
+        ldrh   \rt, [\rb, #SCIF_SCFSR]                   /* <- SCFSR (status register) */
+        and    \rt, \rt, #(~(SCFSR_TEND | SCFSR_TDFE))   /* Clear TEND and TDFE bits */
+        strh   \rt, [\rb, #SCIF_SCFSR]                   /* -> SCFSR (status register) */
+.endm
+
+/*
+ * Local variables:
+ * mode: ASM
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/include/asm-arm/rcar2-uart.h b/xen/include/asm-arm/rcar2-uart.h
new file mode 100644
index 0000000..3a5871a
--- /dev/null
+++ b/xen/include/asm-arm/rcar2-uart.h
@@ -0,0 +1,107 @@
+/*
+ * xen/include/asm-arm/rcar2-uart.h
+ *
+ * Common constant definition between early printk and the UART driver
+ * for the R-Car Gen2 UART.
+ *
+ * Oleksandr Tyshchenko <oleksandr.tyshchenko@globallogic.com>
+ * Copyright (C) 2014, Globallogic.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARM_RCAR2_UART_H
+#define __ASM_ARM_RCAR2_UART_H
+
+#define SCIF_FIFO_MAX_SIZE    16
+#define SCIF_CLK_FREQ         14745600
+
+/* Register offsets */
+#define SCIF_SCSMR     (0x00)    /* Serial mode register           */
+#define SCIF_SCBRR     (0x04)    /* Bit rate register              */
+#define SCIF_SCSCR     (0x08)    /* Serial control register        */
+#define SCIF_SCFTDR    (0x0C)    /* Transmit FIFO data register    */
+#define SCIF_SCFSR     (0x10)    /* Serial status register         */
+#define SCIF_SCFRDR    (0x14)    /* Receive FIFO data register     */
+#define SCIF_SCFCR     (0x18)    /* FIFO control register          */
+#define SCIF_SCFDR     (0x1C)    /* FIFO data count register       */
+#define SCIF_SCSPTR    (0x20)    /* Serial port register           */
+#define SCIF_SCLSR     (0x24)    /* Line status register           */
+#define SCIF_DL        (0x30)    /* Frequency division register    */
+#define SCIF_CKS       (0x34)    /* Clock Select register          */
+
+/* Serial Control Register (SCSCR) */
+#define SCSCR_TIE     (1 << 7)    /* Transmit Interrupt Enable */
+#define SCSCR_RIE     (1 << 6)    /* Receive Interrupt Enable */
+#define SCSCR_TE      (1 << 5)    /* Transmit Enable */
+#define SCSCR_RE      (1 << 4)    /* Receive Enable */
+#define SCSCR_REIE    (1 << 3)    /* Receive Error Interrupt Enable */
+#define SCSCR_TOIE    (1 << 2)    /* Timeout Interrupt Enable */
+#define SCSCR_CKE1    (1 << 1)    /* Clock Enable 1 */
+#define SCSCR_CKE0    (1 << 0)    /* Clock Enable 0 */
+
+#define SCSCR_CKE00    (0)
+#define SCSCR_CKE01    (SCSCR_CKE0)
+#define SCSCR_CKE10    (SCSCR_CKE1)
+#define SCSCR_CKE11    (SCSCR_CKE1 | SCSCR_CKE0)
+
+/* Serial Mode Register (SCSMR) */
+#define SCSMR_CHR     (1 << 6)    /* 7-bit Character Length */
+#define SCSMR_PE      (1 << 5)    /* Parity Enable */
+#define SCSMR_ODD     (1 << 4)    /* Odd Parity */
+#define SCSMR_STOP    (1 << 3)    /* Stop Bit Length */
+
+/* Serial Status Register (SCFSR) */
+#define SCFSR_ER      (1 << 7)    /* Receive Error */
+#define SCFSR_TEND    (1 << 6)    /* Transmission End */
+#define SCFSR_TDFE    (1 << 5)    /* Transmit FIFO Data Empty */
+#define SCFSR_BRK     (1 << 4)    /* Break Detect */
+#define SCFSR_FER     (1 << 3)    /* Framing Error */
+#define SCFSR_PER     (1 << 2)    /* Parity Error */
+#define SCFSR_RDF     (1 << 1)    /* Receive FIFO Data Full */
+#define SCFSR_DR      (1 << 0)    /* Receive Data Ready */
+
+#define SCIF_ERRORS    (SCFSR_PER | SCFSR_FER | SCFSR_ER | SCFSR_BRK)
+
+/* Line Status Register (SCLSR) */
+#define SCLSR_TO      (1 << 2)    /* Timeout */
+#define SCLSR_ORER    (1 << 0)    /* Overrun Error */
+
+/* FIFO Control Register (SCFCR) */
+#define SCFCR_RTRG1    (1 << 7)    /* Receive FIFO Data Count Trigger 1 */
+#define SCFCR_RTRG0    (1 << 6)    /* Receive FIFO Data Count Trigger 0 */
+#define SCFCR_TTRG1    (1 << 5)    /* Transmit FIFO Data Count Trigger 1 */
+#define SCFCR_TTRG0    (1 << 4)    /* Transmit FIFO Data Count Trigger 0 */
+#define SCFCR_MCE      (1 << 3)    /* Modem Control Enable */
+#define SCFCR_TFRST    (1 << 2)    /* Transmit FIFO Data Register Reset */
+#define SCFCR_RFRST    (1 << 1)    /* Receive FIFO Data Register Reset */
+#define SCFCR_LOOP     (1 << 0)    /* Loopback Test */
+
+#define SCFCR_RTRG00    (0)
+#define SCFCR_RTRG01    (SCFCR_RTRG0)
+#define SCFCR_RTRG10    (SCFCR_RTRG1)
+#define SCFCR_RTRG11    (SCFCR_RTRG1 | SCFCR_RTRG0)
+
+#define SCFCR_TTRG00    (0)
+#define SCFCR_TTRG01    (SCFCR_TTRG0)
+#define SCFCR_TTRG10    (SCFCR_TTRG1)
+#define SCFCR_TTRG11    (SCFCR_TTRG1 | SCFCR_TTRG0)
+
+#endif /* __ASM_ARM_RCAR2_UART_H */
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
-- 
1.9.1

Re: [PATCH v2 1/3] xen/arm: Add R-Car Gen2 support for early printk

[Julien Grall]

Hi Iurii,

On 21/01/15 14:16, Iurii Konovalenko wrote:
> From: Oleksandr Tyshchenko <oleksandr.tyshchenko@globallogic.com>
> 
> Signed-off-by: Oleksandr Tyshchenko <oleksandr.tyshchenko@globallogic.com>

Reviewed-by: Julien Grall <julien.grall@linaro.org>

Regards,

> ---
>  docs/misc/arm/early-printk.txt     |   1 +
>  xen/arch/arm/Rules.mk              |   4 ++
>  xen/arch/arm/arm32/debug-rcar2.inc |  49 +++++++++++++++++
>  xen/include/asm-arm/rcar2-uart.h   | 107 +++++++++++++++++++++++++++++++++++++
>  4 files changed, 161 insertions(+)
>  create mode 100644 xen/arch/arm/arm32/debug-rcar2.inc
>  create mode 100644 xen/include/asm-arm/rcar2-uart.h
> 
> diff --git a/docs/misc/arm/early-printk.txt b/docs/misc/arm/early-printk.txt
> index 71a0247..1ca2a55 100644
> --- a/docs/misc/arm/early-printk.txt
> +++ b/docs/misc/arm/early-printk.txt
> @@ -19,6 +19,7 @@ where mach is the name of the machine:
>    - brcm: printk with 8250 on Broadcom 7445D0 boards with A15 processors.
>    - hip04-d01: printk with 8250 on HiSilicon Hip-04 D01
>    - seattle: printk with pl011 for AMD Seattle processor
> +  - lager: printk with SCIF0 on Renesas R-Car H2 processors
>  
>  The base address and baud rate is hardcoded in xen/arch/arm/Rules.mk,
>  see there when adding support for new machines.
> diff --git a/xen/arch/arm/Rules.mk b/xen/arch/arm/Rules.mk
> index 4ee51a9..ff02893 100644
> --- a/xen/arch/arm/Rules.mk
> +++ b/xen/arch/arm/Rules.mk
> @@ -109,6 +109,10 @@ ifeq ($(CONFIG_EARLY_PRINTK), seattle)
>  EARLY_PRINTK_INC := pl011
>  EARLY_UART_BASE_ADDRESS := 0xe1010000
>  endif
> +ifeq ($(CONFIG_EARLY_PRINTK), lager)
> +EARLY_PRINTK_INC := rcar2
> +EARLY_UART_BASE_ADDRESS := 0xe6e60000
> +endif
>  
>  ifneq ($(EARLY_PRINTK_INC),)
>  EARLY_PRINTK := y
> diff --git a/xen/arch/arm/arm32/debug-rcar2.inc b/xen/arch/arm/arm32/debug-rcar2.inc
> new file mode 100644
> index 0000000..e8d17f3
> --- /dev/null
> +++ b/xen/arch/arm/arm32/debug-rcar2.inc
> @@ -0,0 +1,49 @@
> +/*
> + * xen/arch/arm/arm32/debug-rcar2.inc
> + *
> + * R-Car Gen2 specific debug code
> + *
> + * Oleksandr Tyshchenko <oleksandr.tyshchenko@globallogic.com>
> + * Copyright (C) 2014, Globallogic.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <asm/rcar2-uart.h>
> +
> +/* R-Car Gen2 UART wait UART to be ready to transmit
> + * rb: register which contains the UART base address
> + * rc: scratch register
> + */
> +.macro early_uart_ready rb rc
> +1:
> +        ldrh   \rc, [\rb, #SCIF_SCFSR]   /* <- SCFSR (status register) */
> +        tst    \rc, #SCFSR_TDFE          /* Check TDFE bit */
> +        beq    1b                        /* Wait for the UART to be ready */
> +.endm
> +
> +/* R-Car Gen2 UART transmit character
> + * rb: register which contains the UART base address
> + * rt: register which contains the character to transmit
> + */
> +.macro early_uart_transmit rb rt
> +        strb   \rt, [\rb, #SCIF_SCFTDR]                  /* -> SCFTDR (data register) */
> +        ldrh   \rt, [\rb, #SCIF_SCFSR]                   /* <- SCFSR (status register) */
> +        and    \rt, \rt, #(~(SCFSR_TEND | SCFSR_TDFE))   /* Clear TEND and TDFE bits */
> +        strh   \rt, [\rb, #SCIF_SCFSR]                   /* -> SCFSR (status register) */
> +.endm
> +
> +/*
> + * Local variables:
> + * mode: ASM
> + * indent-tabs-mode: nil
> + * End:
> + */
> diff --git a/xen/include/asm-arm/rcar2-uart.h b/xen/include/asm-arm/rcar2-uart.h
> new file mode 100644
> index 0000000..3a5871a
> --- /dev/null
> +++ b/xen/include/asm-arm/rcar2-uart.h
> @@ -0,0 +1,107 @@
> +/*
> + * xen/include/asm-arm/rcar2-uart.h
> + *
> + * Common constant definition between early printk and the UART driver
> + * for the R-Car Gen2 UART.
> + *
> + * Oleksandr Tyshchenko <oleksandr.tyshchenko@globallogic.com>
> + * Copyright (C) 2014, Globallogic.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#ifndef __ASM_ARM_RCAR2_UART_H
> +#define __ASM_ARM_RCAR2_UART_H
> +
> +#define SCIF_FIFO_MAX_SIZE    16
> +#define SCIF_CLK_FREQ         14745600
> +
> +/* Register offsets */
> +#define SCIF_SCSMR     (0x00)    /* Serial mode register           */
> +#define SCIF_SCBRR     (0x04)    /* Bit rate register              */
> +#define SCIF_SCSCR     (0x08)    /* Serial control register        */
> +#define SCIF_SCFTDR    (0x0C)    /* Transmit FIFO data register    */
> +#define SCIF_SCFSR     (0x10)    /* Serial status register         */
> +#define SCIF_SCFRDR    (0x14)    /* Receive FIFO data register     */
> +#define SCIF_SCFCR     (0x18)    /* FIFO control register          */
> +#define SCIF_SCFDR     (0x1C)    /* FIFO data count register       */
> +#define SCIF_SCSPTR    (0x20)    /* Serial port register           */
> +#define SCIF_SCLSR     (0x24)    /* Line status register           */
> +#define SCIF_DL        (0x30)    /* Frequency division register    */
> +#define SCIF_CKS       (0x34)    /* Clock Select register          */
> +
> +/* Serial Control Register (SCSCR) */
> +#define SCSCR_TIE     (1 << 7)    /* Transmit Interrupt Enable */
> +#define SCSCR_RIE     (1 << 6)    /* Receive Interrupt Enable */
> +#define SCSCR_TE      (1 << 5)    /* Transmit Enable */
> +#define SCSCR_RE      (1 << 4)    /* Receive Enable */
> +#define SCSCR_REIE    (1 << 3)    /* Receive Error Interrupt Enable */
> +#define SCSCR_TOIE    (1 << 2)    /* Timeout Interrupt Enable */
> +#define SCSCR_CKE1    (1 << 1)    /* Clock Enable 1 */
> +#define SCSCR_CKE0    (1 << 0)    /* Clock Enable 0 */
> +
> +#define SCSCR_CKE00    (0)
> +#define SCSCR_CKE01    (SCSCR_CKE0)
> +#define SCSCR_CKE10    (SCSCR_CKE1)
> +#define SCSCR_CKE11    (SCSCR_CKE1 | SCSCR_CKE0)
> +
> +/* Serial Mode Register (SCSMR) */
> +#define SCSMR_CHR     (1 << 6)    /* 7-bit Character Length */
> +#define SCSMR_PE      (1 << 5)    /* Parity Enable */
> +#define SCSMR_ODD     (1 << 4)    /* Odd Parity */
> +#define SCSMR_STOP    (1 << 3)    /* Stop Bit Length */
> +
> +/* Serial Status Register (SCFSR) */
> +#define SCFSR_ER      (1 << 7)    /* Receive Error */
> +#define SCFSR_TEND    (1 << 6)    /* Transmission End */
> +#define SCFSR_TDFE    (1 << 5)    /* Transmit FIFO Data Empty */
> +#define SCFSR_BRK     (1 << 4)    /* Break Detect */
> +#define SCFSR_FER     (1 << 3)    /* Framing Error */
> +#define SCFSR_PER     (1 << 2)    /* Parity Error */
> +#define SCFSR_RDF     (1 << 1)    /* Receive FIFO Data Full */
> +#define SCFSR_DR      (1 << 0)    /* Receive Data Ready */
> +
> +#define SCIF_ERRORS    (SCFSR_PER | SCFSR_FER | SCFSR_ER | SCFSR_BRK)
> +
> +/* Line Status Register (SCLSR) */
> +#define SCLSR_TO      (1 << 2)    /* Timeout */
> +#define SCLSR_ORER    (1 << 0)    /* Overrun Error */
> +
> +/* FIFO Control Register (SCFCR) */
> +#define SCFCR_RTRG1    (1 << 7)    /* Receive FIFO Data Count Trigger 1 */
> +#define SCFCR_RTRG0    (1 << 6)    /* Receive FIFO Data Count Trigger 0 */
> +#define SCFCR_TTRG1    (1 << 5)    /* Transmit FIFO Data Count Trigger 1 */
> +#define SCFCR_TTRG0    (1 << 4)    /* Transmit FIFO Data Count Trigger 0 */
> +#define SCFCR_MCE      (1 << 3)    /* Modem Control Enable */
> +#define SCFCR_TFRST    (1 << 2)    /* Transmit FIFO Data Register Reset */
> +#define SCFCR_RFRST    (1 << 1)    /* Receive FIFO Data Register Reset */
> +#define SCFCR_LOOP     (1 << 0)    /* Loopback Test */
> +
> +#define SCFCR_RTRG00    (0)
> +#define SCFCR_RTRG01    (SCFCR_RTRG0)
> +#define SCFCR_RTRG10    (SCFCR_RTRG1)
> +#define SCFCR_RTRG11    (SCFCR_RTRG1 | SCFCR_RTRG0)
> +
> +#define SCFCR_TTRG00    (0)
> +#define SCFCR_TTRG01    (SCFCR_TTRG0)
> +#define SCFCR_TTRG10    (SCFCR_TTRG1)
> +#define SCFCR_TTRG11    (SCFCR_TTRG1 | SCFCR_TTRG0)
> +
> +#endif /* __ASM_ARM_RCAR2_UART_H */
> +
> +/*
> + * Local variables:
> + * mode: C
> + * c-file-style: "BSD"
> + * c-basic-offset: 4
> + * indent-tabs-mode: nil
> + * End:
> + */
> 


-- 
Julien Grall

[PATCH v2 2/3] xen/arm: Add new driver for R-Car Gen2 UART

[Iurii Konovalenko]

From: Oleksandr Tyshchenko <oleksandr.tyshchenko@globallogic.com>

Signed-off-by: Oleksandr Tyshchenko <oleksandr.tyshchenko@globallogic.com>
Signed-off-by: Iurii Konovalenko <iurii.konovalenko@globallogic.com>
---
 config/arm32.mk               |   1 +
 xen/drivers/char/Makefile     |   1 +
 xen/drivers/char/rcar2-uart.c | 376 ++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 378 insertions(+)
 create mode 100644 xen/drivers/char/rcar2-uart.c

diff --git a/config/arm32.mk b/config/arm32.mk
index 4f83a63..6ee5173 100644
--- a/config/arm32.mk
+++ b/config/arm32.mk
@@ -12,6 +12,7 @@ CFLAGS += -marm
 HAS_PL011 := y
 HAS_EXYNOS4210 := y
 HAS_OMAP := y
+HAS_RCAR2 := y
 HAS_NS16550 := y
 
 # Use only if calling $(LD) directly.
diff --git a/xen/drivers/char/Makefile b/xen/drivers/char/Makefile
index 911b788..64428b7 100644
--- a/xen/drivers/char/Makefile
+++ b/xen/drivers/char/Makefile
@@ -3,6 +3,7 @@ obj-$(HAS_NS16550) += ns16550.o
 obj-$(HAS_PL011) += pl011.o
 obj-$(HAS_EXYNOS4210) += exynos4210-uart.o
 obj-$(HAS_OMAP) += omap-uart.o
+obj-$(HAS_RCAR2) += rcar2-uart.o
 obj-$(HAS_EHCI) += ehci-dbgp.o
 obj-$(CONFIG_ARM) += dt-uart.o
 obj-y += serial.o
diff --git a/xen/drivers/char/rcar2-uart.c b/xen/drivers/char/rcar2-uart.c
new file mode 100644
index 0000000..0929db7
--- /dev/null
+++ b/xen/drivers/char/rcar2-uart.c
@@ -0,0 +1,376 @@
+/*
+ * xen/drivers/char/rcar2-uart.c
+ *
+ * Driver for R-Car Gen2 UART.
+ *
+ * Oleksandr Tyshchenko <oleksandr.tyshchenko@globallogic.com>
+ * Copyright (C) 2014, Globallogic.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <xen/config.h>
+#include <xen/console.h>
+#include <xen/errno.h>
+#include <xen/serial.h>
+#include <xen/init.h>
+#include <xen/irq.h>
+#include <xen/mm.h>
+#include <xen/delay.h>
+#include <asm/device.h>
+#include <asm/rcar2-uart.h>
+#include <asm/io.h>
+
+#define PARITY_NONE    0
+#define PARITY_EVEN    1
+#define PARITY_ODD     2
+
+#define rcar2_readb(uart, off)          readb((uart)->regs + (off))
+#define rcar2_writeb(uart, off, val)    writeb((val), (uart)->regs + (off))
+
+#define rcar2_readw(uart, off)          readw((uart)->regs + (off))
+#define rcar2_writew(uart, off, val)    writew((val), (uart)->regs + (off))
+
+static struct rcar2_uart {
+    unsigned int baud, clock_hz, data_bits, parity, stop_bits;
+    unsigned int irq;
+    char __iomem *regs;
+    struct irqaction irqaction;
+    struct vuart_info vuart;
+    bool_t irq_en;
+} rcar2_com = {0};
+
+static void rcar2_uart_interrupt(int irq, void *data, struct cpu_user_regs *regs)
+{
+    struct serial_port *port = data;
+    struct rcar2_uart *uart = port->uart;
+    uint16_t status, ctrl;
+
+    ctrl = rcar2_readw(uart, SCIF_SCSCR);
+    status = rcar2_readw(uart, SCIF_SCFSR) & ~SCFSR_TEND;
+    /* Ignore next flag if TX Interrupt is disabled */
+    if ( !(ctrl & SCSCR_TIE) )
+        status &= ~SCFSR_TDFE;
+
+    while ( status != 0 )
+    {
+        /* TX Interrupt */
+        if ( status & SCFSR_TDFE )
+        {
+            serial_tx_interrupt(port, regs);
+
+            if ( port->txbufc == port->txbufp )
+            {
+                /*
+                 * There is no data bytes to send. We have to disable
+                 * TX Interrupt to prevent us from getting stuck in the
+                 * interrupt handler
+                 */
+                ctrl = rcar2_readw(uart, SCIF_SCSCR);
+                ctrl &= ~SCSCR_TIE;
+                rcar2_writew(uart, SCIF_SCSCR, ctrl);
+            }
+        }
+
+        /* RX Interrupt */
+        if ( status & (SCFSR_RDF | SCFSR_DR) )
+            serial_rx_interrupt(port, regs);
+
+        /* Error Interrupt */
+        if ( status & SCIF_ERRORS )
+            rcar2_writew(uart, SCIF_SCFSR, ~SCIF_ERRORS);
+        if ( rcar2_readw(uart, SCIF_SCLSR) & SCLSR_ORER )
+            rcar2_writew(uart, SCIF_SCLSR, 0);
+
+        status = rcar2_readw(uart, SCIF_SCFSR) & ~SCFSR_TEND;
+        if ( !(ctrl & SCSCR_TIE) )
+            status &= ~SCFSR_TDFE;
+    }
+}
+
+static void __init rcar2_uart_init_preirq(struct serial_port *port)
+{
+    struct rcar2_uart *uart = port->uart;
+    unsigned int divisor;
+    uint16_t val;
+
+    /*
+     * Wait until last bit has been transmitted. This is needed for a smooth
+     * transition when we come from early printk
+     */
+    while ( !(rcar2_readw(uart, SCIF_SCFSR) & SCFSR_TEND) );
+
+    /* Disable TX/RX parts and all interrupts */
+    rcar2_writew(uart, SCIF_SCSCR, 0);
+
+    /* Reset TX/RX FIFOs */
+    rcar2_writew(uart, SCIF_SCFCR, SCFCR_RFRST | SCFCR_TFRST);
+
+    /* Clear all errors and flags */
+    rcar2_readw(uart, SCIF_SCFSR);
+    rcar2_writew(uart, SCIF_SCFSR, 0);
+    rcar2_readw(uart, SCIF_SCLSR);
+    rcar2_writew(uart, SCIF_SCLSR, 0);
+
+    /* Select Baud rate generator output as a clock source */
+    rcar2_writew(uart, SCIF_SCSCR, SCSCR_CKE10);
+
+    /* Setup protocol format and Baud rate, select Asynchronous mode */
+    val = 0;
+    ASSERT( uart->data_bits >= 7 && uart->data_bits <= 8 );
+    if ( uart->data_bits == 7 )
+        val |= SCSMR_CHR;
+    else
+        val &= ~SCSMR_CHR;
+
+    ASSERT( uart->stop_bits >= 1 && uart->stop_bits <= 2 );
+    if ( uart->stop_bits == 2 )
+        val |= SCSMR_STOP;
+    else
+        val &= ~SCSMR_STOP;
+
+    ASSERT( uart->parity >= PARITY_NONE && uart->parity <= PARITY_ODD );
+    switch ( uart->parity )
+    {
+    case PARITY_NONE:
+        val &= ~SCSMR_PE;
+        break;
+
+    case PARITY_EVEN:
+        val |= SCSMR_PE;
+        break;
+
+    case PARITY_ODD:
+        val |= SCSMR_PE | SCSMR_ODD;
+        break;
+    }
+    rcar2_writew(uart, SCIF_SCSMR, val);
+
+    ASSERT( uart->clock_hz > 0 );
+    if ( uart->baud != BAUD_AUTO )
+    {
+        /* Setup desired Baud rate */
+        divisor = uart->clock_hz / (uart->baud << 4);
+        ASSERT( divisor >= 1 && divisor <= (uint16_t)UINT_MAX );
+        rcar2_writew(uart, SCIF_DL, (uint16_t)divisor);
+        /* Selects the frequency divided clock (SC_CLK external input) */
+        rcar2_writew(uart, SCIF_CKS, 0);
+        /*
+         * TODO: should be uncommented
+         * udelay(1000000 / uart->baud + 1);
+         */
+    }
+    else
+    {
+        /* Read current Baud rate */
+        divisor = rcar2_readw(uart, SCIF_DL);
+        ASSERT( divisor >= 1 && divisor <= (uint16_t)UINT_MAX );
+        uart->baud = uart->clock_hz / (divisor << 4);
+    }
+
+    /* Setup trigger level for TX/RX FIFOs */
+    rcar2_writew(uart, SCIF_SCFCR, SCFCR_RTRG11 | SCFCR_TTRG11);
+
+    /* Enable TX/RX parts */
+    rcar2_writew(uart, SCIF_SCSCR, rcar2_readw(uart, SCIF_SCSCR) |
+                 SCSCR_TE | SCSCR_RE);
+}
+
+static void __init rcar2_uart_init_postirq(struct serial_port *port)
+{
+    struct rcar2_uart *uart = port->uart;
+    int rc;
+
+    uart->irqaction.handler = rcar2_uart_interrupt;
+    uart->irqaction.name    = "rcar2_uart";
+    uart->irqaction.dev_id  = port;
+
+    if ( (rc = setup_irq(uart->irq, 0, &uart->irqaction)) != 0 )
+        dprintk(XENLOG_ERR, "Failed to allocated rcar2_uart IRQ %d\n",
+                uart->irq);
+
+    /* Clear all errors */
+    if ( rcar2_readw(uart, SCIF_SCFSR) & SCIF_ERRORS )
+        rcar2_writew(uart, SCIF_SCFSR, ~SCIF_ERRORS);
+    if ( rcar2_readw(uart, SCIF_SCLSR) & SCLSR_ORER )
+        rcar2_writew(uart, SCIF_SCLSR, 0);
+
+    /* Enable TX/RX and Error Interrupts  */
+    rcar2_writew(uart, SCIF_SCSCR, rcar2_readw(uart, SCIF_SCSCR) |
+                 SCSCR_TIE | SCSCR_RIE | SCSCR_REIE);
+
+    uart->irq_en = 1;
+}
+
+static void rcar2_uart_suspend(struct serial_port *port)
+{
+    BUG();
+}
+
+static void rcar2_uart_resume(struct serial_port *port)
+{
+    BUG();
+}
+
+static int rcar2_uart_tx_ready(struct serial_port *port)
+{
+    struct rcar2_uart *uart = port->uart;
+    uint16_t cnt;
+
+    /* Check for empty space in TX FIFO */
+    if ( !(rcar2_readw(uart, SCIF_SCFSR) & SCFSR_TDFE) )
+        return 0;
+
+    /*
+     * It seems that the Framework has a data bytes to send.
+     * Enable TX Interrupt disabled from interrupt handler before
+     */
+    if ( uart->irq_en )
+        rcar2_writew(uart, SCIF_SCSCR, rcar2_readw(uart, SCIF_SCSCR) |
+                     SCSCR_TIE);
+
+     /* Check number of data bytes stored in TX FIFO */
+    cnt = rcar2_readw(uart, SCIF_SCFDR) >> 8;
+    ASSERT( cnt >= 0 && cnt <= SCIF_FIFO_MAX_SIZE );
+
+    return (SCIF_FIFO_MAX_SIZE - cnt);
+}
+
+static void rcar2_uart_putc(struct serial_port *port, char c)
+{
+    struct rcar2_uart *uart = port->uart;
+
+    rcar2_writeb(uart, SCIF_SCFTDR, c);
+    /* Clear required TX flags */
+    rcar2_writew(uart, SCIF_SCFSR, rcar2_readw(uart, SCIF_SCFSR) &
+                 ~(SCFSR_TEND | SCFSR_TDFE));
+}
+
+static int rcar2_uart_getc(struct serial_port *port, char *pc)
+{
+    struct rcar2_uart *uart = port->uart;
+
+    /* Check for available data bytes in RX FIFO */
+    if ( !(rcar2_readw(uart, SCIF_SCFSR) & (SCFSR_RDF | SCFSR_DR)) )
+        return 0;
+
+    *pc = rcar2_readb(uart, SCIF_SCFRDR);
+
+    /* dummy read */
+    rcar2_readw(uart, SCIF_SCFSR);
+    /* Clear required RX flags */
+    rcar2_writew(uart, SCIF_SCFSR, ~(SCFSR_RDF | SCFSR_DR));
+
+    return 1;
+}
+
+static int __init rcar2_uart_irq(struct serial_port *port)
+{
+    struct rcar2_uart *uart = port->uart;
+
+    return ((uart->irq > 0) ? uart->irq : -1);
+}
+
+static const struct vuart_info *rcar2_vuart_info(struct serial_port *port)
+{
+    struct rcar2_uart *uart = port->uart;
+
+    return &uart->vuart;
+}
+
+static struct uart_driver __read_mostly rcar2_uart_driver = {
+    .init_preirq  = rcar2_uart_init_preirq,
+    .init_postirq = rcar2_uart_init_postirq,
+    .endboot      = NULL,
+    .suspend      = rcar2_uart_suspend,
+    .resume       = rcar2_uart_resume,
+    .tx_ready     = rcar2_uart_tx_ready,
+    .putc         = rcar2_uart_putc,
+    .getc         = rcar2_uart_getc,
+    .irq          = rcar2_uart_irq,
+    .vuart_info   = rcar2_vuart_info,
+};
+
+static int __init rcar2_uart_init(struct dt_device_node *dev,
+                                 const void *data)
+{
+    const char *config = data;
+    struct rcar2_uart *uart;
+    int res;
+    u64 addr, size;
+
+    if ( strcmp(config, "") )
+        printk("WARNING: UART configuration is not supported\n");
+
+    uart = &rcar2_com;
+
+    uart->clock_hz  = SCIF_CLK_FREQ;
+    uart->baud      = BAUD_AUTO;
+    uart->data_bits = 8;
+    uart->parity    = PARITY_NONE;
+    uart->stop_bits = 1;
+
+    res = dt_device_get_address(dev, 0, &addr, &size);
+    if ( res )
+    {
+        printk("rcar2-uart: Unable to retrieve the base"
+                     " address of the UART\n");
+        return res;
+    }
+
+    uart->regs = ioremap_nocache(addr, size);
+    if ( !uart->regs )
+    {
+        printk("rcar2-uart: Unable to map the UART memory\n");
+        return -ENOMEM;
+    }
+
+    res = platform_get_irq(dev, 0);
+    if ( res < 0 )
+    {
+        printk("rcar2-uart: Unable to retrieve the IRQ\n");
+        return res;
+    }
+    uart->irq = res;
+
+    uart->vuart.base_addr  = addr;
+    uart->vuart.size       = size;
+    uart->vuart.data_off   = SCIF_SCFTDR;
+    uart->vuart.status_off = SCIF_SCFSR;
+    uart->vuart.status     = SCFSR_TDFE;
+
+    /* Register with generic serial driver */
+    serial_register_uart(SERHND_DTUART, &rcar2_uart_driver, uart);
+
+    dt_device_set_used_by(dev, DOMID_XEN);
+
+    return 0;
+}
+
+static const char * const rcar2_uart_dt_compat[] __initconst =
+{
+    "renesas,scif",
+    NULL
+};
+
+DT_DEVICE_START(rcar2_uart, "R-Car Gen2 UART", DEVICE_SERIAL)
+    .compatible = rcar2_uart_dt_compat,
+    .init = rcar2_uart_init,
+DT_DEVICE_END
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
-- 
1.9.1

Re: [PATCH v2 2/3] xen/arm: Add new driver for R-Car Gen2 UART

[Julien Grall]

Hi Iurii,

On 21/01/15 14:16, Iurii Konovalenko wrote:
> diff --git a/xen/drivers/char/rcar2-uart.c b/xen/drivers/char/rcar2-uart.c
> +static void rcar2_uart_interrupt(int irq, void *data, struct cpu_user_regs *regs)
> +{
> +    struct serial_port *port = data;
> +    struct rcar2_uart *uart = port->uart;
> +    uint16_t status, ctrl;
> +
> +    ctrl = rcar2_readw(uart, SCIF_SCSCR);
> +    status = rcar2_readw(uart, SCIF_SCFSR) & ~SCFSR_TEND;
> +    /* Ignore next flag if TX Interrupt is disabled */
> +    if ( !(ctrl & SCSCR_TIE) )
> +        status &= ~SCFSR_TDFE;
> +
> +    while ( status != 0 )
> +    {
> +        /* TX Interrupt */
> +        if ( status & SCFSR_TDFE )
> +        {
> +            serial_tx_interrupt(port, regs);
> +
> +            if ( port->txbufc == port->txbufp )
> +            {
> +                /*
> +                 * There is no data bytes to send. We have to disable
> +                 * TX Interrupt to prevent us from getting stuck in the
> +                 * interrupt handler
> +                 */
> +                ctrl = rcar2_readw(uart, SCIF_SCSCR);
> +                ctrl &= ~SCSCR_TIE;
> +                rcar2_writew(uart, SCIF_SCSCR, ctrl);
> +            }

serial_start_tx and serial_stop_tx callback have been recently
introduced to start/stop transmission.

I think you could use them to replace this if (and maybe some others).

[..]

> +static void __init rcar2_uart_init_preirq(struct serial_port *port)
> +{
> +    struct rcar2_uart *uart = port->uart;
> +    unsigned int divisor;
> +    uint16_t val;
> +
> +    /*
> +     * Wait until last bit has been transmitted. This is needed for a smooth
> +     * transition when we come from early printk
> +     */
> +    while ( !(rcar2_readw(uart, SCIF_SCFSR) & SCFSR_TEND) );

Would it be possible that it get stucks forever?

[..]

> +    ASSERT( uart->clock_hz > 0 );
> +    if ( uart->baud != BAUD_AUTO )
> +    {
> +        /* Setup desired Baud rate */
> +        divisor = uart->clock_hz / (uart->baud << 4);
> +        ASSERT( divisor >= 1 && divisor <= (uint16_t)UINT_MAX );
> +        rcar2_writew(uart, SCIF_DL, (uint16_t)divisor);
> +        /* Selects the frequency divided clock (SC_CLK external input) */
> +        rcar2_writew(uart, SCIF_CKS, 0);
> +        /*
> +         * TODO: should be uncommented
> +         * udelay(1000000 / uart->baud + 1);
> +         */

Why didn't you uncommented?

[..]

> +static int rcar2_uart_tx_ready(struct serial_port *port)
> +{
> +    struct rcar2_uart *uart = port->uart;
> +    uint16_t cnt;
> +
> +    /* Check for empty space in TX FIFO */
> +    if ( !(rcar2_readw(uart, SCIF_SCFSR) & SCFSR_TDFE) )
> +        return 0;
> +
> +    /*
> +     * It seems that the Framework has a data bytes to send.
> +     * Enable TX Interrupt disabled from interrupt handler before
> +     */
> +    if ( uart->irq_en )
> +        rcar2_writew(uart, SCIF_SCSCR, rcar2_readw(uart, SCIF_SCSCR) |
> +                     SCSCR_TIE);

I think you can replace it by implementing the callback start_tx.

[..]

> +static int __init rcar2_uart_init(struct dt_device_node *dev,
> +                                 const void *data)
> +{
> +    const char *config = data;
> +    struct rcar2_uart *uart;
> +    int res;
> +    u64 addr, size;
> +
> +    if ( strcmp(config, "") )
> +        printk("WARNING: UART configuration is not supported\n");
> +
> +    uart = &rcar2_com;
> +
> +    uart->clock_hz  = SCIF_CLK_FREQ;
> +    uart->baud      = BAUD_AUTO;
> +    uart->data_bits = 8;
> +    uart->parity    = PARITY_NONE;
> +    uart->stop_bits = 1;
> +
> +    res = dt_device_get_address(dev, 0, &addr, &size);
> +    if ( res )
> +    {
> +        printk("rcar2-uart: Unable to retrieve the base"
> +                     " address of the UART\n");
> +        return res;
> +    }
> +
> +    uart->regs = ioremap_nocache(addr, size);
> +    if ( !uart->regs )
> +    {
> +        printk("rcar2-uart: Unable to map the UART memory\n");
> +        return -ENOMEM;
> +    }
> +
> +    res = platform_get_irq(dev, 0);
> +    if ( res < 0 )
> +    {
> +        printk("rcar2-uart: Unable to retrieve the IRQ\n");
> +        return res;

if platform_get_irq fails, the driver will leak the mapping made with
ioremap_cache. I would invert the 2 call:

res = platform_get_irq(dev, 0);
if ( res < 0 )
	...

uart->regs = ioremap_nocache(addr, size);
if ( !uart->regs )
	...

Regards,

-- 
Julien Grall

Re: [PATCH v2 2/3] xen/arm: Add new driver for R-Car Gen2 UART

[Oleksandr Tyshchenko]

[-- Attachment #1.1: Type: text/plain, Size: 5652 bytes --]

On Thu, Jan 22, 2015 at 4:44 PM, Julien Grall <julien.grall@linaro.org>
wrote:
>
> Hi Iurii,

Hi Julien,
It's Oleksandr. Thank you for your comments.

>
>
> On 21/01/15 14:16, Iurii Konovalenko wrote:
> > diff --git a/xen/drivers/char/rcar2-uart.c
b/xen/drivers/char/rcar2-uart.c
> > +static void rcar2_uart_interrupt(int irq, void *data, struct
cpu_user_regs *regs)
> > +{
> > +    struct serial_port *port = data;
> > +    struct rcar2_uart *uart = port->uart;
> > +    uint16_t status, ctrl;
> > +
> > +    ctrl = rcar2_readw(uart, SCIF_SCSCR);
> > +    status = rcar2_readw(uart, SCIF_SCFSR) & ~SCFSR_TEND;
> > +    /* Ignore next flag if TX Interrupt is disabled */
> > +    if ( !(ctrl & SCSCR_TIE) )
> > +        status &= ~SCFSR_TDFE;
> > +
> > +    while ( status != 0 )
> > +    {
> > +        /* TX Interrupt */
> > +        if ( status & SCFSR_TDFE )
> > +        {
> > +            serial_tx_interrupt(port, regs);
> > +
> > +            if ( port->txbufc == port->txbufp )
> > +            {
> > +                /*
> > +                 * There is no data bytes to send. We have to disable
> > +                 * TX Interrupt to prevent us from getting stuck in the
> > +                 * interrupt handler
> > +                 */
> > +                ctrl = rcar2_readw(uart, SCIF_SCSCR);
> > +                ctrl &= ~SCSCR_TIE;
> > +                rcar2_writew(uart, SCIF_SCSCR, ctrl);
> > +            }
>
> serial_start_tx and serial_stop_tx callback have been recently
> introduced to start/stop transmission.
>
> I think you could use them to replace this if (and maybe some others).

Am I right that you are speaking about this patch "[PATCH v1] xen/arm:
Manage pl011 uart TX interrupt correctly"?
http://www.gossamer-threads.com/lists/xen/devel/359033

I will rewrite code to use these callbacks.

>
>
> [..]
>
> > +static void __init rcar2_uart_init_preirq(struct serial_port *port)
> > +{
> > +    struct rcar2_uart *uart = port->uart;
> > +    unsigned int divisor;
> > +    uint16_t val;
> > +
> > +    /*
> > +     * Wait until last bit has been transmitted. This is needed for a
smooth
> > +     * transition when we come from early printk
> > +     */
> > +    while ( !(rcar2_readw(uart, SCIF_SCFSR) & SCFSR_TEND) );
>
> Would it be possible that it get stucks forever?

I don't think so. We just waiting for transmission to end. But anyway, I
can break this loop by timeout.

>
> [..]
>
> > +    ASSERT( uart->clock_hz > 0 );
> > +    if ( uart->baud != BAUD_AUTO )
> > +    {
> > +        /* Setup desired Baud rate */
> > +        divisor = uart->clock_hz / (uart->baud << 4);
> > +        ASSERT( divisor >= 1 && divisor <= (uint16_t)UINT_MAX );
> > +        rcar2_writew(uart, SCIF_DL, (uint16_t)divisor);
> > +        /* Selects the frequency divided clock (SC_CLK external input)
*/
> > +        rcar2_writew(uart, SCIF_CKS, 0);
> > +        /*
> > +         * TODO: should be uncommented
> > +         * udelay(1000000 / uart->baud + 1);
> > +         */
>
> Why didn't you uncommented?

Ah, I just recollected about this. This is due to driver get stucks in
udelay().
http://lists.xen.org/archives/html/xen-devel/2014-10/msg01935.html

Now, we come from U-Boot with arch timer enabled.
I will try your suggestion (about moving init_xen_time() before
console_init_preirq()) again.
I hope that we can uncomment this call.

>
> [..]
>
> > +static int rcar2_uart_tx_ready(struct serial_port *port)
> > +{
> > +    struct rcar2_uart *uart = port->uart;
> > +    uint16_t cnt;
> > +
> > +    /* Check for empty space in TX FIFO */
> > +    if ( !(rcar2_readw(uart, SCIF_SCFSR) & SCFSR_TDFE) )
> > +        return 0;
> > +
> > +    /*
> > +     * It seems that the Framework has a data bytes to send.
> > +     * Enable TX Interrupt disabled from interrupt handler before
> > +     */
> > +    if ( uart->irq_en )
> > +        rcar2_writew(uart, SCIF_SCSCR, rcar2_readw(uart, SCIF_SCSCR) |
> > +                     SCSCR_TIE);
>
> I think you can replace it by implementing the callback start_tx.

ok.

>
> [..]
>
> > +static int __init rcar2_uart_init(struct dt_device_node *dev,
> > +                                 const void *data)
> > +{
> > +    const char *config = data;
> > +    struct rcar2_uart *uart;
> > +    int res;
> > +    u64 addr, size;
> > +
> > +    if ( strcmp(config, "") )
> > +        printk("WARNING: UART configuration is not supported\n");
> > +
> > +    uart = &rcar2_com;
> > +
> > +    uart->clock_hz  = SCIF_CLK_FREQ;
> > +    uart->baud      = BAUD_AUTO;
> > +    uart->data_bits = 8;
> > +    uart->parity    = PARITY_NONE;
> > +    uart->stop_bits = 1;
> > +
> > +    res = dt_device_get_address(dev, 0, &addr, &size);
> > +    if ( res )
> > +    {
> > +        printk("rcar2-uart: Unable to retrieve the base"
> > +                     " address of the UART\n");
> > +        return res;
> > +    }
> > +
> > +    uart->regs = ioremap_nocache(addr, size);
> > +    if ( !uart->regs )
> > +    {
> > +        printk("rcar2-uart: Unable to map the UART memory\n");
> > +        return -ENOMEM;
> > +    }
> > +
> > +    res = platform_get_irq(dev, 0);
> > +    if ( res < 0 )
> > +    {
> > +        printk("rcar2-uart: Unable to retrieve the IRQ\n");
> > +        return res;
>
> if platform_get_irq fails, the driver will leak the mapping made with
> ioremap_cache. I would invert the 2 call:
>
> res = platform_get_irq(dev, 0);
> if ( res < 0 )
>         ...
>
> uart->regs = ioremap_nocache(addr, size);
> if ( !uart->regs )

Sounds reasonable. ok.

>         ...
>
> Regards,
>
> --
> Julien Grall

-- 

Oleksandr Tyshchenko | Embedded Dev
GlobalLogic
www.globallogic.com

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Re: [PATCH v2 2/3] xen/arm: Add new driver for R-Car Gen2 UART

[Julien Grall]

On 22/01/15 16:04, Oleksandr Tyshchenko wrote:
> 
> 
> On Thu, Jan 22, 2015 at 4:44 PM, Julien Grall <julien.grall@linaro.org
> <mailto:julien.grall@linaro.org>> wrote:

> Hi Julien,

Hi Oleksandr,

>>
>> On 21/01/15 14:16, Iurii Konovalenko wrote:
>> > diff --git a/xen/drivers/char/rcar2-uart.c
> b/xen/drivers/char/rcar2-uart.c
>> > +static void rcar2_uart_interrupt(int irq, void *data, struct
> cpu_user_regs *regs)
>> > +{
>> > +    struct serial_port *port = data;
>> > +    struct rcar2_uart *uart = port->uart;
>> > +    uint16_t status, ctrl;
>> > +
>> > +    ctrl = rcar2_readw(uart, SCIF_SCSCR);
>> > +    status = rcar2_readw(uart, SCIF_SCFSR) & ~SCFSR_TEND;
>> > +    /* Ignore next flag if TX Interrupt is disabled */
>> > +    if ( !(ctrl & SCSCR_TIE) )
>> > +        status &= ~SCFSR_TDFE;
>> > +
>> > +    while ( status != 0 )
>> > +    {
>> > +        /* TX Interrupt */
>> > +        if ( status & SCFSR_TDFE )
>> > +        {
>> > +            serial_tx_interrupt(port, regs);
>> > +
>> > +            if ( port->txbufc == port->txbufp )
>> > +            {
>> > +                /*
>> > +                 * There is no data bytes to send. We have to disable
>> > +                 * TX Interrupt to prevent us from getting stuck in the
>> > +                 * interrupt handler
>> > +                 */
>> > +                ctrl = rcar2_readw(uart, SCIF_SCSCR);
>> > +                ctrl &= ~SCSCR_TIE;
>> > +                rcar2_writew(uart, SCIF_SCSCR, ctrl);
>> > +            }
>>
>> serial_start_tx and serial_stop_tx callback have been recently
>> introduced to start/stop transmission.
>>
>> I think you could use them to replace this if (and maybe some others).
> 
> Am I right that you are speaking about this patch "[PATCH v1] xen/arm:
> Manage pl011 uart TX interrupt correctly"?
> http://www.gossamer-threads.com/lists/xen/devel/359033

Yes. FYI, Ian is planning to cherry-pick in Xen 4.5.

> I will rewrite code to use these callbacks.

Thanks!

>>
>>
>> [..]
>>
>> > +static void __init rcar2_uart_init_preirq(struct serial_port *port)
>> > +{
>> > +    struct rcar2_uart *uart = port->uart;
>> > +    unsigned int divisor;
>> > +    uint16_t val;
>> > +
>> > +    /*
>> > +     * Wait until last bit has been transmitted. This is needed for
> a smooth
>> > +     * transition when we come from early printk
>> > +     */
>> > +    while ( !(rcar2_readw(uart, SCIF_SCFSR) & SCFSR_TEND) );
>>
>> Would it be possible that it get stucks forever?
> 
> I don't think so. We just waiting for transmission to end. But anyway, I
> can break this loop by timeout.

It's not necessary to move to a timeout. We have other place with such
loop (see most UART interrupt handlers).

I should have add OOI before my question.

>>
>> [..]
>>
>> > +    ASSERT( uart->clock_hz > 0 );
>> > +    if ( uart->baud != BAUD_AUTO )
>> > +    {
>> > +        /* Setup desired Baud rate */
>> > +        divisor = uart->clock_hz / (uart->baud << 4);
>> > +        ASSERT( divisor >= 1 && divisor <= (uint16_t)UINT_MAX );
>> > +        rcar2_writew(uart, SCIF_DL, (uint16_t)divisor);
>> > +        /* Selects the frequency divided clock (SC_CLK external
> input) */
>> > +        rcar2_writew(uart, SCIF_CKS, 0);
>> > +        /*
>> > +         * TODO: should be uncommented
>> > +         * udelay(1000000 / uart->baud + 1);
>> > +         */
>>
>> Why didn't you uncommented?
> 
> Ah, I just recollected about this. This is due to driver get stucks in
> udelay().
> http://lists.xen.org/archives/html/xen-devel/2014-10/msg01935.html
> 
> Now, we come from U-Boot with arch timer enabled.
> I will try your suggestion (about moving init_xen_time() before
> console_init_preirq()) again.
> I hope that we can uncomment this call.

I though about it, and I don't think we should move init_xen_time early.
It's depends to platform_init() and processor_id(). Although, we can
remove the processor_id().

My main concern is we will print lots useful message with early printk.

If early printk is not available (for example when debug=n), we will
loose those messages.

Unless we find a way to keep those messages until the console is
initialize, we should not move xen_init_time earlier.

Regards,

-- 
Julien Grall

Re: [PATCH v2 2/3] xen/arm: Add new driver for R-Car Gen2 UART

[Oleksandr Tyshchenko]

On Thu, Jan 22, 2015 at 6:18 PM, Julien Grall <julien.grall@linaro.org> wrote:
> On 22/01/15 16:04, Oleksandr Tyshchenko wrote:
>>
>>
>> On Thu, Jan 22, 2015 at 4:44 PM, Julien Grall <julien.grall@linaro.org
>> <mailto:julien.grall@linaro.org>> wrote:
>
>> Hi Julien,
>
> Hi Oleksandr,
>
>>>
>>> On 21/01/15 14:16, Iurii Konovalenko wrote:
>>> > diff --git a/xen/drivers/char/rcar2-uart.c
>> b/xen/drivers/char/rcar2-uart.c
>>> > +static void rcar2_uart_interrupt(int irq, void *data, struct
>> cpu_user_regs *regs)
>>> > +{
>>> > +    struct serial_port *port = data;
>>> > +    struct rcar2_uart *uart = port->uart;
>>> > +    uint16_t status, ctrl;
>>> > +
>>> > +    ctrl = rcar2_readw(uart, SCIF_SCSCR);
>>> > +    status = rcar2_readw(uart, SCIF_SCFSR) & ~SCFSR_TEND;
>>> > +    /* Ignore next flag if TX Interrupt is disabled */
>>> > +    if ( !(ctrl & SCSCR_TIE) )
>>> > +        status &= ~SCFSR_TDFE;
>>> > +
>>> > +    while ( status != 0 )
>>> > +    {
>>> > +        /* TX Interrupt */
>>> > +        if ( status & SCFSR_TDFE )
>>> > +        {
>>> > +            serial_tx_interrupt(port, regs);
>>> > +
>>> > +            if ( port->txbufc == port->txbufp )
>>> > +            {
>>> > +                /*
>>> > +                 * There is no data bytes to send. We have to disable
>>> > +                 * TX Interrupt to prevent us from getting stuck in the
>>> > +                 * interrupt handler
>>> > +                 */
>>> > +                ctrl = rcar2_readw(uart, SCIF_SCSCR);
>>> > +                ctrl &= ~SCSCR_TIE;
>>> > +                rcar2_writew(uart, SCIF_SCSCR, ctrl);
>>> > +            }
>>>
>>> serial_start_tx and serial_stop_tx callback have been recently
>>> introduced to start/stop transmission.
>>>
>>> I think you could use them to replace this if (and maybe some others).
>>
>> Am I right that you are speaking about this patch "[PATCH v1] xen/arm:
>> Manage pl011 uart TX interrupt correctly"?
>> http://www.gossamer-threads.com/lists/xen/devel/359033
>
> Yes. FYI, Ian is planning to cherry-pick in Xen 4.5.
>
>> I will rewrite code to use these callbacks.
>
> Thanks!
>
>>>
>>>
>>> [..]
>>>
>>> > +static void __init rcar2_uart_init_preirq(struct serial_port *port)
>>> > +{
>>> > +    struct rcar2_uart *uart = port->uart;
>>> > +    unsigned int divisor;
>>> > +    uint16_t val;
>>> > +
>>> > +    /*
>>> > +     * Wait until last bit has been transmitted. This is needed for
>> a smooth
>>> > +     * transition when we come from early printk
>>> > +     */
>>> > +    while ( !(rcar2_readw(uart, SCIF_SCFSR) & SCFSR_TEND) );
>>>
>>> Would it be possible that it get stucks forever?
>>
>> I don't think so. We just waiting for transmission to end. But anyway, I
>> can break this loop by timeout.
>
> It's not necessary to move to a timeout. We have other place with such
> loop (see most UART interrupt handlers).
>
> I should have add OOI before my question.
>
>>>
>>> [..]
>>>
>>> > +    ASSERT( uart->clock_hz > 0 );
>>> > +    if ( uart->baud != BAUD_AUTO )
>>> > +    {
>>> > +        /* Setup desired Baud rate */
>>> > +        divisor = uart->clock_hz / (uart->baud << 4);
>>> > +        ASSERT( divisor >= 1 && divisor <= (uint16_t)UINT_MAX );
>>> > +        rcar2_writew(uart, SCIF_DL, (uint16_t)divisor);
>>> > +        /* Selects the frequency divided clock (SC_CLK external
>> input) */
>>> > +        rcar2_writew(uart, SCIF_CKS, 0);
>>> > +        /*
>>> > +         * TODO: should be uncommented
>>> > +         * udelay(1000000 / uart->baud + 1);
>>> > +         */
>>>
>>> Why didn't you uncommented?
>>
>> Ah, I just recollected about this. This is due to driver get stucks in
>> udelay().
>> http://lists.xen.org/archives/html/xen-devel/2014-10/msg01935.html
>>
>> Now, we come from U-Boot with arch timer enabled.
>> I will try your suggestion (about moving init_xen_time() before
>> console_init_preirq()) again.
>> I hope that we can uncomment this call.
>
> I though about it, and I don't think we should move init_xen_time early.
> It's depends to platform_init() and processor_id(). Although, we can
> remove the processor_id().
>
> My main concern is we will print lots useful message with early printk.
>
> If early printk is not available (for example when debug=n), we will
> loose those messages.
>
> Unless we find a way to keep those messages until the console is
> initialize, we should not move xen_init_time earlier.
I understand, then I will implement local delay func in uart driver
based on READ_SYSREG64(CNTPCT_EL0).

>
> Regards,
>
> --
> Julien Grall



-- 

Oleksandr Tyshchenko | Embedded Dev
GlobalLogic
www.globallogic.com

Re: [PATCH v2 2/3] xen/arm: Add new driver for R-Car Gen2 UART

[Julien Grall]

On 22/01/15 16:44, Oleksandr Tyshchenko wrote:
> I understand, then I will implement local delay func in uart driver
> based on READ_SYSREG64(CNTPCT_EL0).

Unless I miss something, udelay should work in your case even if the
xen_init_time is not called.

Regards,

-- 
Julien Grall

Re: [PATCH v2 2/3] xen/arm: Add new driver for R-Car Gen2 UART

[Oleksandr Tyshchenko]

On Thu, Jan 22, 2015 at 6:49 PM, Julien Grall <julien.grall@linaro.org> wrote:
> On 22/01/15 16:44, Oleksandr Tyshchenko wrote:
>> I understand, then I will implement local delay func in uart driver
>> based on READ_SYSREG64(CNTPCT_EL0).
>
> Unless I miss something, udelay should work in your case even if the
> xen_init_time is not called.
Unfortunately, no. If I understand correctly the var "cpu_khz" (used
in ticks_to_ns()) is initialized in init_xen_time().

>
> Regards,
>
> --
> Julien Grall



-- 

Oleksandr Tyshchenko | Embedded Dev
GlobalLogic
www.globallogic.com

Re: [PATCH v2 2/3] xen/arm: Add new driver for R-Car Gen2 UART

[Julien Grall]

On 22/01/15 16:55, Oleksandr Tyshchenko wrote:
> On Thu, Jan 22, 2015 at 6:49 PM, Julien Grall <julien.grall@linaro.org> wrote:
>> On 22/01/15 16:44, Oleksandr Tyshchenko wrote:
>>> I understand, then I will implement local delay func in uart driver
>>> based on READ_SYSREG64(CNTPCT_EL0).
>>
>> Unless I miss something, udelay should work in your case even if the
>> xen_init_time is not called.
> Unfortunately, no. If I understand correctly the var "cpu_khz" (used
> in ticks_to_ns()) is initialized in init_xen_time().

Hrm, right. I looked too quickly to the function.

I don't like the idea to use READ_SYSREG64(CNTPCT_EL0) in the UART drivers.

Does the udelay necessary here? If yes, maybe we should either split the
xen_init_time in 2 parts or create a udelay_tick function to use when
timer is not set.

I'm not sure what is the best one.

Regards,

-- 
Julien Grall

Re: [PATCH v2 2/3] xen/arm: Add new driver for R-Car Gen2 UART

[Oleksandr Tyshchenko]

On Thu, Jan 22, 2015 at 7:02 PM, Julien Grall <julien.grall@linaro.org> wrote:
> On 22/01/15 16:55, Oleksandr Tyshchenko wrote:
>> On Thu, Jan 22, 2015 at 6:49 PM, Julien Grall <julien.grall@linaro.org> wrote:
>>> On 22/01/15 16:44, Oleksandr Tyshchenko wrote:
>>>> I understand, then I will implement local delay func in uart driver
>>>> based on READ_SYSREG64(CNTPCT_EL0).
>>>
>>> Unless I miss something, udelay should work in your case even if the
>>> xen_init_time is not called.
>> Unfortunately, no. If I understand correctly the var "cpu_khz" (used
>> in ticks_to_ns()) is initialized in init_xen_time().
>
> Hrm, right. I looked too quickly to the function.
>
> I don't like the idea to use READ_SYSREG64(CNTPCT_EL0) in the UART drivers.
>
> Does the udelay necessary here? If yes, maybe we should either split the
> xen_init_time in 2 parts or create a udelay_tick function to use when
> timer is not set.
>
> I'm not sure what is the best one.
>
> Regards,
>
> --
> Julien Grall

According to the TRM for this family we need to add delay after
changing baudrate before continuing init sequence.
I tried without udelay and it is worked fine. But, if the TRM says we
need to follow this.

-- 

Oleksandr Tyshchenko | Embedded Dev
GlobalLogic
www.globallogic.com

Re: [PATCH v2 2/3] xen/arm: Add new driver for R-Car Gen2 UART

[Oleksandr Tyshchenko]

On Thu, Jan 22, 2015 at 7:27 PM, Oleksandr Tyshchenko
<oleksandr.tyshchenko@globallogic.com> wrote:
> On Thu, Jan 22, 2015 at 7:02 PM, Julien Grall <julien.grall@linaro.org> wrote:
>> On 22/01/15 16:55, Oleksandr Tyshchenko wrote:
>>> On Thu, Jan 22, 2015 at 6:49 PM, Julien Grall <julien.grall@linaro.org> wrote:
>>>> On 22/01/15 16:44, Oleksandr Tyshchenko wrote:
>>>>> I understand, then I will implement local delay func in uart driver
>>>>> based on READ_SYSREG64(CNTPCT_EL0).
>>>>
>>>> Unless I miss something, udelay should work in your case even if the
>>>> xen_init_time is not called.
>>> Unfortunately, no. If I understand correctly the var "cpu_khz" (used
>>> in ticks_to_ns()) is initialized in init_xen_time().
>>
>> Hrm, right. I looked too quickly to the function.
>>
>> I don't like the idea to use READ_SYSREG64(CNTPCT_EL0) in the UART drivers.
>>
>> Does the udelay necessary here? If yes, maybe we should either split the
>> xen_init_time in 2 parts or create a udelay_tick function to use when
>> timer is not set.
>>
>> I'm not sure what is the best one.
>>
>> Regards,
>>
>> --
>> Julien Grall
>
> According to the TRM for this family we need to add delay after
> changing baudrate before continuing init sequence.
> I tried without udelay and it is worked fine. But, if the TRM says we
> need to follow this.
>
> --
>
> Oleksandr Tyshchenko | Embedded Dev
> GlobalLogic
> www.globallogic.com

I would prefer a first variant. In xen_init_time_1() initialize
"cpu_khz" and "boot_count" only.

 cpu_khz = READ_SYSREG32(CNTFRQ_EL0) / 1000;
 boot_count = READ_SYSREG64(CNTPCT_EL0);

In xen_init_time_2() perform all initialization as it was done for
this moment and correct "cpu_khz" if node is present.

What do you think?

-- 

Oleksandr Tyshchenko | Embedded Dev
GlobalLogic
www.globallogic.com

Re: [PATCH v2 2/3] xen/arm: Add new driver for R-Car Gen2 UART

[Julien Grall]

On 22/01/15 17:43, Oleksandr Tyshchenko wrote:
> On Thu, Jan 22, 2015 at 7:27 PM, Oleksandr Tyshchenko
> <oleksandr.tyshchenko@globallogic.com> wrote:
>> On Thu, Jan 22, 2015 at 7:02 PM, Julien Grall <julien.grall@linaro.org> wrote:
>>> On 22/01/15 16:55, Oleksandr Tyshchenko wrote:
>>>> On Thu, Jan 22, 2015 at 6:49 PM, Julien Grall <julien.grall@linaro.org> wrote:
>>>>> On 22/01/15 16:44, Oleksandr Tyshchenko wrote:
>>>>>> I understand, then I will implement local delay func in uart driver
>>>>>> based on READ_SYSREG64(CNTPCT_EL0).
>>>>>
>>>>> Unless I miss something, udelay should work in your case even if the
>>>>> xen_init_time is not called.
>>>> Unfortunately, no. If I understand correctly the var "cpu_khz" (used
>>>> in ticks_to_ns()) is initialized in init_xen_time().
>>>
>>> Hrm, right. I looked too quickly to the function.
>>>
>>> I don't like the idea to use READ_SYSREG64(CNTPCT_EL0) in the UART drivers.
>>>
>>> Does the udelay necessary here? If yes, maybe we should either split the
>>> xen_init_time in 2 parts or create a udelay_tick function to use when
>>> timer is not set.
>>>
>>> I'm not sure what is the best one.
>>>
>>> Regards,
>>>
>>> --
>>> Julien Grall
>>
>> According to the TRM for this family we need to add delay after
>> changing baudrate before continuing init sequence.
>> I tried without udelay and it is worked fine. But, if the TRM says we
>> need to follow this.
>>
>> --
>>
>> Oleksandr Tyshchenko | Embedded Dev
>> GlobalLogic
>> www.globallogic.com
> 
> I would prefer a first variant. In xen_init_time_1() initialize
> "cpu_khz" and "boot_count" only.
> 
>  cpu_khz = READ_SYSREG32(CNTFRQ_EL0) / 1000;
>  boot_count = READ_SYSREG64(CNTPCT_EL0);
> 
> In xen_init_time_2() perform all initialization as it was done for
> this moment and correct "cpu_khz" if node is present.
> 
> What do you think?
> 

The clock-frequency property is usually present when CNTFRQ_EL0 is
invalid. So the udelay won't work correctly for those board.

Also, some platform may need to have specific initialization for timer
before been able to access it. (see platform_init_time).

So we need to move at least to move preinit_xen_time:
	platform_init()
        read property clock-frequency
	cpu_khz = ...
	boot_count = ...

init_xen_time would contain:
	retrieve IRQs
	print messages

Regards,

-- 
Julien Grall

Re: [PATCH v2 2/3] xen/arm: Add new driver for R-Car Gen2 UART

[Oleksandr Tyshchenko]

On Thu, Jan 22, 2015 at 8:09 PM, Julien Grall <julien.grall@linaro.org> wrote:
> On 22/01/15 17:43, Oleksandr Tyshchenko wrote:
>> On Thu, Jan 22, 2015 at 7:27 PM, Oleksandr Tyshchenko
>> <oleksandr.tyshchenko@globallogic.com> wrote:
>>> On Thu, Jan 22, 2015 at 7:02 PM, Julien Grall <julien.grall@linaro.org> wrote:
>>>> On 22/01/15 16:55, Oleksandr Tyshchenko wrote:
>>>>> On Thu, Jan 22, 2015 at 6:49 PM, Julien Grall <julien.grall@linaro.org> wrote:
>>>>>> On 22/01/15 16:44, Oleksandr Tyshchenko wrote:
>>>>>>> I understand, then I will implement local delay func in uart driver
>>>>>>> based on READ_SYSREG64(CNTPCT_EL0).
>>>>>>
>>>>>> Unless I miss something, udelay should work in your case even if the
>>>>>> xen_init_time is not called.
>>>>> Unfortunately, no. If I understand correctly the var "cpu_khz" (used
>>>>> in ticks_to_ns()) is initialized in init_xen_time().
>>>>
>>>> Hrm, right. I looked too quickly to the function.
>>>>
>>>> I don't like the idea to use READ_SYSREG64(CNTPCT_EL0) in the UART drivers.
>>>>
>>>> Does the udelay necessary here? If yes, maybe we should either split the
>>>> xen_init_time in 2 parts or create a udelay_tick function to use when
>>>> timer is not set.
>>>>
>>>> I'm not sure what is the best one.
>>>>
>>>> Regards,
>>>>
>>>> --
>>>> Julien Grall
>>>
>>> According to the TRM for this family we need to add delay after
>>> changing baudrate before continuing init sequence.
>>> I tried without udelay and it is worked fine. But, if the TRM says we
>>> need to follow this.
>>>
>>> --
>>>
>>> Oleksandr Tyshchenko | Embedded Dev
>>> GlobalLogic
>>> www.globallogic.com
>>
>> I would prefer a first variant. In xen_init_time_1() initialize
>> "cpu_khz" and "boot_count" only.
>>
>>  cpu_khz = READ_SYSREG32(CNTFRQ_EL0) / 1000;
>>  boot_count = READ_SYSREG64(CNTPCT_EL0);
>>
>> In xen_init_time_2() perform all initialization as it was done for
>> this moment and correct "cpu_khz" if node is present.
>>
>> What do you think?
>>
>
> The clock-frequency property is usually present when CNTFRQ_EL0 is
> invalid. So the udelay won't work correctly for those board.
>
> Also, some platform may need to have specific initialization for timer
> before been able to access it. (see platform_init_time).
>
> So we need to move at least to move preinit_xen_time:
>         platform_init()
>         read property clock-frequency
>         cpu_khz = ...
>         boot_count = ...
>
> init_xen_time would contain:
>         retrieve IRQs
>         print messages
>
> Regards,
>
> --
> Julien Grall

It is clear. I will try.
Thank you



-- 

Oleksandr Tyshchenko | Embedded Dev
GlobalLogic
www.globallogic.com

Re: [PATCH v2 2/3] xen/arm: Add new driver for R-Car Gen2 UART

[Oleksandr Tyshchenko]

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Hi, Julien.

I created a new patch set (v3) and pushed.

Also I created a standalone patch according to your suggestion above:
http://lists.xen.org/archives/html/xen-devel/2015-01/msg02964.html
I checked it on Lager board on current master.


On Thu, Jan 22, 2015 at 8:33 PM, Oleksandr Tyshchenko <
oleksandr.tyshchenko@globallogic.com> wrote:

> On Thu, Jan 22, 2015 at 8:09 PM, Julien Grall <julien.grall@linaro.org>
> wrote:
> > On 22/01/15 17:43, Oleksandr Tyshchenko wrote:
> >> On Thu, Jan 22, 2015 at 7:27 PM, Oleksandr Tyshchenko
> >> <oleksandr.tyshchenko@globallogic.com> wrote:
> >>> On Thu, Jan 22, 2015 at 7:02 PM, Julien Grall <julien.grall@linaro.org>
> wrote:
> >>>> On 22/01/15 16:55, Oleksandr Tyshchenko wrote:
> >>>>> On Thu, Jan 22, 2015 at 6:49 PM, Julien Grall <
> julien.grall@linaro.org> wrote:
> >>>>>> On 22/01/15 16:44, Oleksandr Tyshchenko wrote:
> >>>>>>> I understand, then I will implement local delay func in uart driver
> >>>>>>> based on READ_SYSREG64(CNTPCT_EL0).
> >>>>>>
> >>>>>> Unless I miss something, udelay should work in your case even if the
> >>>>>> xen_init_time is not called.
> >>>>> Unfortunately, no. If I understand correctly the var "cpu_khz" (used
> >>>>> in ticks_to_ns()) is initialized in init_xen_time().
> >>>>
> >>>> Hrm, right. I looked too quickly to the function.
> >>>>
> >>>> I don't like the idea to use READ_SYSREG64(CNTPCT_EL0) in the UART
> drivers.
> >>>>
> >>>> Does the udelay necessary here? If yes, maybe we should either split
> the
> >>>> xen_init_time in 2 parts or create a udelay_tick function to use when
> >>>> timer is not set.
> >>>>
> >>>> I'm not sure what is the best one.
> >>>>
> >>>> Regards,
> >>>>
> >>>> --
> >>>> Julien Grall
> >>>
> >>> According to the TRM for this family we need to add delay after
> >>> changing baudrate before continuing init sequence.
> >>> I tried without udelay and it is worked fine. But, if the TRM says we
> >>> need to follow this.
> >>>
> >>> --
> >>>
> >>> Oleksandr Tyshchenko | Embedded Dev
> >>> GlobalLogic
> >>> www.globallogic.com
> >>
> >> I would prefer a first variant. In xen_init_time_1() initialize
> >> "cpu_khz" and "boot_count" only.
> >>
> >>  cpu_khz = READ_SYSREG32(CNTFRQ_EL0) / 1000;
> >>  boot_count = READ_SYSREG64(CNTPCT_EL0);
> >>
> >> In xen_init_time_2() perform all initialization as it was done for
> >> this moment and correct "cpu_khz" if node is present.
> >>
> >> What do you think?
> >>
> >
> > The clock-frequency property is usually present when CNTFRQ_EL0 is
> > invalid. So the udelay won't work correctly for those board.
> >
> > Also, some platform may need to have specific initialization for timer
> > before been able to access it. (see platform_init_time).
> >
> > So we need to move at least to move preinit_xen_time:
> >         platform_init()
> >         read property clock-frequency
> >         cpu_khz = ...
> >         boot_count = ...
> >
> > init_xen_time would contain:
> >         retrieve IRQs
> >         print messages
> >
> > Regards,
> >
> > --
> > Julien Grall
>
> It is clear. I will try.
> Thank you
>
>
>
> --
>
> Oleksandr Tyshchenko | Embedded Dev
> GlobalLogic
> www.globallogic.com
>



-- 

Oleksandr Tyshchenko | Embedded Dev
GlobalLogic
www.globallogic.com
<http://www.globallogic.com/>

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_______________________________________________
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[PATCH v2 3/3] xen/arm: Introduce support for Renesas R-Car Gen2 platform

[Iurii Konovalenko]

From: Iurii Konovalenko <iurii.konovalenko@globallogic.com>

Signed-off-by: Iurii Konovalenko <iurii.konovalenko@globallogic.com>
---
 xen/arch/arm/platforms/Makefile   |  1 +
 xen/arch/arm/platforms/shmobile.c | 71 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 72 insertions(+)
 create mode 100644 xen/arch/arm/platforms/shmobile.c

diff --git a/xen/arch/arm/platforms/Makefile b/xen/arch/arm/platforms/Makefile
index 8f47c16..29e931a 100644
--- a/xen/arch/arm/platforms/Makefile
+++ b/xen/arch/arm/platforms/Makefile
@@ -4,5 +4,6 @@ obj-$(CONFIG_ARM_32) += exynos5.o
 obj-$(CONFIG_ARM_32) += midway.o
 obj-$(CONFIG_ARM_32) += omap5.o
 obj-$(CONFIG_ARM_32) += sunxi.o
+obj-$(CONFIG_ARM_32) += shmobile.o
 obj-$(CONFIG_ARM_64) += seattle.o
 obj-$(CONFIG_ARM_64) += xgene-storm.o
diff --git a/xen/arch/arm/platforms/shmobile.c b/xen/arch/arm/platforms/shmobile.c
new file mode 100644
index 0000000..c462b0e
--- /dev/null
+++ b/xen/arch/arm/platforms/shmobile.c
@@ -0,0 +1,71 @@
+/*
+ * xen/arch/arm/platforms/shmobile.c
+ *
+ * Renesas R-Car Gen2 specific settings
+ *
+ * Iurii Konovalenko <iurii.konovalenko@globallogic.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <xen/mm.h>
+#include <xen/vmap.h>
+#include <asm/platform.h>
+#include <asm/io.h>
+
+#define SHMOBILE_RAM_ADDR                         0xE63C0000
+#define SHMOBILE_RAM_SIZE                         0x1000
+#define SHMOBILE_SMP_START_OFFSET                 0xFFC
+
+static int __init shmobile_smp_init(void)
+{
+    void __iomem *pram;
+
+    /* map ICRAM */
+    pram = ioremap_nocache(SHMOBILE_RAM_ADDR, SHMOBILE_RAM_SIZE);
+    if( !pram )
+    {
+        dprintk( XENLOG_ERR, "Unable to map Shmobile ICRAM\n");
+        return -ENOMEM;
+    }
+
+    /* setup reset vectors */
+    writel(__pa(init_secondary), pram + SHMOBILE_SMP_START_OFFSET);
+    iounmap(pram);
+
+    sev();
+
+    return 0;
+}
+
+static const char const *shmobile_dt_compat[] __initdata =
+{
+    "renesas,lager",
+    NULL
+};
+
+PLATFORM_START(shmobile, "Renesas R-Car Gen2")
+    .compatible = shmobile_dt_compat,
+    .cpu_up = cpu_up_send_sgi,
+    .smp_init = shmobile_smp_init,
+
+    .dom0_gnttab_start = 0xc0000000,
+    .dom0_gnttab_size = 0x20000,
+PLATFORM_END
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
-- 
1.9.1

Re: [PATCH v2 3/3] xen/arm: Introduce support for Renesas R-Car Gen2 platform

[Julien Grall]

Hi Iurii,

On 21/01/15 14:16, Iurii Konovalenko wrote:
> From: Iurii Konovalenko <iurii.konovalenko@globallogic.com>
> 
> Signed-off-by: Iurii Konovalenko <iurii.konovalenko@globallogic.com>

Reviewed-by: Julien Grall <julien.grall@linaro.org>

Regards,

> ---
>  xen/arch/arm/platforms/Makefile   |  1 +
>  xen/arch/arm/platforms/shmobile.c | 71 +++++++++++++++++++++++++++++++++++++++
>  2 files changed, 72 insertions(+)
>  create mode 100644 xen/arch/arm/platforms/shmobile.c
> 
> diff --git a/xen/arch/arm/platforms/Makefile b/xen/arch/arm/platforms/Makefile
> index 8f47c16..29e931a 100644
> --- a/xen/arch/arm/platforms/Makefile
> +++ b/xen/arch/arm/platforms/Makefile
> @@ -4,5 +4,6 @@ obj-$(CONFIG_ARM_32) += exynos5.o
>  obj-$(CONFIG_ARM_32) += midway.o
>  obj-$(CONFIG_ARM_32) += omap5.o
>  obj-$(CONFIG_ARM_32) += sunxi.o
> +obj-$(CONFIG_ARM_32) += shmobile.o
>  obj-$(CONFIG_ARM_64) += seattle.o
>  obj-$(CONFIG_ARM_64) += xgene-storm.o
> diff --git a/xen/arch/arm/platforms/shmobile.c b/xen/arch/arm/platforms/shmobile.c
> new file mode 100644
> index 0000000..c462b0e
> --- /dev/null
> +++ b/xen/arch/arm/platforms/shmobile.c
> @@ -0,0 +1,71 @@
> +/*
> + * xen/arch/arm/platforms/shmobile.c
> + *
> + * Renesas R-Car Gen2 specific settings
> + *
> + * Iurii Konovalenko <iurii.konovalenko@globallogic.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <xen/mm.h>
> +#include <xen/vmap.h>
> +#include <asm/platform.h>
> +#include <asm/io.h>
> +
> +#define SHMOBILE_RAM_ADDR                         0xE63C0000
> +#define SHMOBILE_RAM_SIZE                         0x1000
> +#define SHMOBILE_SMP_START_OFFSET                 0xFFC
> +
> +static int __init shmobile_smp_init(void)
> +{
> +    void __iomem *pram;
> +
> +    /* map ICRAM */
> +    pram = ioremap_nocache(SHMOBILE_RAM_ADDR, SHMOBILE_RAM_SIZE);
> +    if( !pram )
> +    {
> +        dprintk( XENLOG_ERR, "Unable to map Shmobile ICRAM\n");
> +        return -ENOMEM;
> +    }
> +
> +    /* setup reset vectors */
> +    writel(__pa(init_secondary), pram + SHMOBILE_SMP_START_OFFSET);
> +    iounmap(pram);
> +
> +    sev();
> +
> +    return 0;
> +}
> +
> +static const char const *shmobile_dt_compat[] __initdata =
> +{
> +    "renesas,lager",
> +    NULL
> +};
> +
> +PLATFORM_START(shmobile, "Renesas R-Car Gen2")
> +    .compatible = shmobile_dt_compat,
> +    .cpu_up = cpu_up_send_sgi,
> +    .smp_init = shmobile_smp_init,
> +
> +    .dom0_gnttab_start = 0xc0000000,
> +    .dom0_gnttab_size = 0x20000,
> +PLATFORM_END
> +
> +/*
> + * Local variables:
> + * mode: C
> + * c-file-style: "BSD"
> + * c-basic-offset: 4
> + * indent-tabs-mode: nil
> + * End:
> + */
> 


-- 
Julien Grall

Re: [PATCH v2 0/3] arm: introduce basic Renesas R-Car Gen2 platform support

[Iurii Konovalenko]

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Hi, guys!

We are just planning to push to u-boot support of Xen start for
Renesas R-Car Gen2 boards.
As for now, we have just draft patches, that provide this functionality.
Patches, which contain preperations, needed to run Xen (ie. shitching
to hypervisor mode), are based on mainline u-boot (commit hash:
f7ca1f7, net: sh-eth: Add cache writeback control after setting bit of
DMA descriptor).
Additionaly, it is needed to apply patches from archive, attached to
this letter.
"lager_xen_defconfig" is config to build u-boot, that starts Xen.

Best regards.
Iurii Konovalenko | Senior Software Engineer
GlobalLogic
P +3.8044.492.9695 M +38.099.932.2909
S yufuntik
www.globallogic.com
http://www.globallogic.com/email_disclaimer.txt

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Re: [PATCH v2 0/3] arm: introduce basic Renesas R-Car Gen2 platform support

[Julien Grall]

Hi Iurii,

On 21/01/15 14:16, Iurii Konovalenko wrote:
> From: Iurii Konovalenko <iurii.konovalenko@globallogic.com>
> 
> Changes in v2:
> 1. Remove timer initialization from board file (timer shold be initialized in u-boot)

Can you document on the Xen wiki [1] which version of u-boot is required
to boot Xen? And maybe how to update it for this board.

Regards,

[1] http://wiki.xen.org/wiki/Xen_ARM_with_Virtualization_Extensions

-- 
Julien Grall

Re: [PATCH v2 0/3] arm: introduce basic Renesas R-Car Gen2 platform support

[Iurii Konovalenko]

Hi, Julien!

I tried to add new page with Renesas platform specific configuration,
but I failed.
On "view source" tab I see following message:

You do not have permission to edit this page, for the following reason:
The action you have requested is limited to users in the group: write.
You can view and copy the source of this page:
So it seems I don't have rights to edit pages ((((

Best regards.

Iurii Konovalenko | Senior Software Engineer
GlobalLogic

On Thu, Jan 22, 2015 at 4:52 PM, Julien Grall <julien.grall@linaro.org> wrote:
> Hi Iurii,
>
> On 21/01/15 14:16, Iurii Konovalenko wrote:
>> From: Iurii Konovalenko <iurii.konovalenko@globallogic.com>
>>
>> Changes in v2:
>> 1. Remove timer initialization from board file (timer shold be initialized in u-boot)
>
> Can you document on the Xen wiki [1] which version of u-boot is required
> to boot Xen? And maybe how to update it for this board.
>
> Regards,
>
> [1] http://wiki.xen.org/wiki/Xen_ARM_with_Virtualization_Extensions
>
> --
> Julien Grall

Re: [PATCH v2 0/3] arm: introduce basic Renesas R-Car Gen2 platform support

[Julien Grall]

On 23/01/15 11:27, Iurii Konovalenko wrote:
> Hi, Julien!

Hello Iurii,

> 
> I tried to add new page with Renesas platform specific configuration,
> but I failed.
> On "view source" tab I see following message:
> 
> You do not have permission to edit this page, for the following reason:
> The action you have requested is limited to users in the group: write.
> You can view and copy the source of this page:
> So it seems I don't have rights to edit pages ((((

We had some spam issue last year on the wiki page. By default a user
doesn't the permission to write. We have to give it manually. Can you
send us your wiki login?

Regards,

-- 
Julien Grall

Re: [PATCH v2 0/3] arm: introduce basic Renesas R-Car Gen2 platform support

[Iurii Konovalenko]

My wiki login is: iurii.konovalenko

Best regards.

Iurii Konovalenko | Senior Software Engineer
GlobalLogic

On Fri, Jan 23, 2015 at 1:47 PM, Julien Grall <julien.grall@linaro.org> wrote:
> On 23/01/15 11:27, Iurii Konovalenko wrote:
>> Hi, Julien!
>
> Hello Iurii,
>
>>
>> I tried to add new page with Renesas platform specific configuration,
>> but I failed.
>> On "view source" tab I see following message:
>>
>> You do not have permission to edit this page, for the following reason:
>> The action you have requested is limited to users in the group: write.
>> You can view and copy the source of this page:
>> So it seems I don't have rights to edit pages ((((
>
> We had some spam issue last year on the wiki page. By default a user
> doesn't the permission to write. We have to give it manually. Can you
> send us your wiki login?
>
> Regards,
>
> --
> Julien Grall

Re: [PATCH v2 0/3] arm: introduce basic Renesas R-Car Gen2 platform support

[Julien Grall]

On 23/01/15 12:12, Iurii Konovalenko wrote:
> My wiki login is: iurii.konovalenko

You should have the write permission now.

Regards,

-- 
Julien Grall

Re: [PATCH v2 0/3] arm: introduce basic Renesas R-Car Gen2 platform support

[Iurii Konovalenko]

Thanks, now I have permissions to edit.
The last question about patches for u-boot. I can't upload them to
wiki because of file type filter.
What is the best way to share them?
Best regards.

Iurii Konovalenko | Senior Software Engineer
GlobalLogic
P +3.8044.492.9695 M +38.099.932.2909
S yufuntik
www.globallogic.com
http://www.globallogic.com/email_disclaimer.txt


On Fri, Jan 23, 2015 at 2:19 PM, Julien Grall <julien.grall@linaro.org> wrote:
> On 23/01/15 12:12, Iurii Konovalenko wrote:
>> My wiki login is: iurii.konovalenko
>
> You should have the write permission now.
>
> Regards,
>
> --
> Julien Grall

Re: [PATCH v2 0/3] arm: introduce basic Renesas R-Car Gen2 platform support

[Julien Grall]

On 23/01/15 13:20, Iurii Konovalenko wrote:
> Thanks, now I have permissions to edit.
> The last question about patches for u-boot. I can't upload them to
> wiki because of file type filter.
> What is the best way to share them?

The best solution would be to provide a git tree with the patched u-boot.

Otherwise you could point to the mail you sent with the patches [1],
and give instruction to getting u-boot.

Regards,

[1] http://lists.xen.org/archives/html/xen-devel/2015-01/msg02475.html

-- 
Julien Grall

Re: [PATCH v2 0/3] arm: introduce basic Renesas R-Car Gen2 platform support

[Iurii Konovalenko]

Julien, thanks a lot for your support.
I've created new wiki page for Lager board [1].
Also, I've added link to [1] in Xen ARM wiki in "Platform specific
configuration" section [2].

[1] http://wiki.xen.org/wiki/Xen_ARM_with_Virtualization_Extensions/Lager
[2] http://wiki.xen.org/wiki/Xen_ARM_with_Virtualization_Extensions#Platform_specific_configuration

Best regards.
Iurii Konovalenko | Senior Software Engineer
GlobalLogic

On Fri, Jan 23, 2015 at 3:53 PM, Julien Grall <julien.grall@linaro.org> wrote:
> On 23/01/15 13:20, Iurii Konovalenko wrote:
>> Thanks, now I have permissions to edit.
>> The last question about patches for u-boot. I can't upload them to
>> wiki because of file type filter.
>> What is the best way to share them?
>
> The best solution would be to provide a git tree with the patched u-boot.
>
> Otherwise you could point to the mail you sent with the patches [1],
> and give instruction to getting u-boot.
>
> Regards,
>
> [1] http://lists.xen.org/archives/html/xen-devel/2015-01/msg02475.html
>
> --
> Julien Grall