From: sergei.shtylyov@cogentembedded.com (Sergei Shtylyov)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 3/3] pm: at91: add disable/enable the L1/L2 cache while suspend/resume
Date: Wed, 28 Jan 2015 13:09:15 +0300 [thread overview]
Message-ID: <54C8B54B.3090607@cogentembedded.com> (raw)
In-Reply-To: <1422411844-13241-1-git-send-email-wenyou.yang@atmel.com>
Hello.
On 1/28/2015 5:24 AM, Wenyou Yang wrote:
> For the sama5, disable L1 D-cache and L2 cache before the cpu go to wfi,
> after wakeing up, enable L1 D-cache and L2 cache.
Waking.
> Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
> ---
> arch/arm/mach-at91/pm.c | 12 +++++
> arch/arm/mach-at91/pm_suspend.S | 107 +++++++++++++++++++++++++++++++++++++++
> 2 files changed, 119 insertions(+)
[...]
> diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
> index 311cc23..02d4e56 100644
> --- a/arch/arm/mach-at91/pm_suspend.S
> +++ b/arch/arm/mach-at91/pm_suspend.S
[...]
> @@ -324,3 +325,109 @@ ram_restored:
[...]
> +l2x_sync:
I don't see where this label is used.
> + ldr r0, [r2, #L2X0_CACHE_SYNC]
> + bic r0, r0, #0x1
> + str r0, [r2, #L2X0_CACHE_SYNC]
> +sync:
> + ldr r0, [r2, #L2X0_CACHE_SYNC]
> + ands r0, r0, #0x1
> + bne sync
> +
> +skip_l2disable:
> + ldmfd sp!, {r4 - r12, pc}
> +ENDPROC(at91_disable_l1_l2_cache)
[...]
WBR, Sergei
WARNING: multiple messages have this Message-ID (diff)
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: Wenyou Yang <wenyou.yang@atmel.com>,
nicolas.ferre@atmel.com, linux@arm.linux.org.uk
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
alexandre.belloni@free-electrons.com,
sylvain.rochet@finsecur.com, peda@axentia.se, linux@maxim.org.za
Subject: Re: [PATCH v2 3/3] pm: at91: add disable/enable the L1/L2 cache while suspend/resume
Date: Wed, 28 Jan 2015 13:09:15 +0300 [thread overview]
Message-ID: <54C8B54B.3090607@cogentembedded.com> (raw)
In-Reply-To: <1422411844-13241-1-git-send-email-wenyou.yang@atmel.com>
Hello.
On 1/28/2015 5:24 AM, Wenyou Yang wrote:
> For the sama5, disable L1 D-cache and L2 cache before the cpu go to wfi,
> after wakeing up, enable L1 D-cache and L2 cache.
Waking.
> Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
> ---
> arch/arm/mach-at91/pm.c | 12 +++++
> arch/arm/mach-at91/pm_suspend.S | 107 +++++++++++++++++++++++++++++++++++++++
> 2 files changed, 119 insertions(+)
[...]
> diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
> index 311cc23..02d4e56 100644
> --- a/arch/arm/mach-at91/pm_suspend.S
> +++ b/arch/arm/mach-at91/pm_suspend.S
[...]
> @@ -324,3 +325,109 @@ ram_restored:
[...]
> +l2x_sync:
I don't see where this label is used.
> + ldr r0, [r2, #L2X0_CACHE_SYNC]
> + bic r0, r0, #0x1
> + str r0, [r2, #L2X0_CACHE_SYNC]
> +sync:
> + ldr r0, [r2, #L2X0_CACHE_SYNC]
> + ands r0, r0, #0x1
> + bne sync
> +
> +skip_l2disable:
> + ldmfd sp!, {r4 - r12, pc}
> +ENDPROC(at91_disable_l1_l2_cache)
[...]
WBR, Sergei
next prev parent reply other threads:[~2015-01-28 10:09 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-28 2:21 [PATCH v2 0/3] AT91 pm improvements for 3.20 Wenyou Yang
2015-01-28 2:21 ` Wenyou Yang
2015-01-28 2:22 ` [PATCH v2 1/3] pm: at91: pm_suspend: add the WFI support for ARMv7 Wenyou Yang
2015-01-28 2:22 ` Wenyou Yang
2015-01-28 2:23 ` [PATCH v2 2/3] pm: at91: pm_suspend: MOR register KEY was missing Wenyou Yang
2015-01-28 2:23 ` Wenyou Yang
2015-01-28 2:24 ` [PATCH v2 3/3] pm: at91: add disable/enable the L1/L2 cache while suspend/resume Wenyou Yang
2015-01-28 2:24 ` Wenyou Yang
2015-01-28 10:09 ` Sergei Shtylyov [this message]
2015-01-28 10:09 ` Sergei Shtylyov
2015-01-29 2:22 ` Yang, Wenyou
2015-01-29 2:22 ` Yang, Wenyou
2015-01-29 11:34 ` Russell King - ARM Linux
2015-01-29 11:34 ` Russell King - ARM Linux
2015-01-30 7:32 ` Yang, Wenyou
2015-01-30 7:32 ` Yang, Wenyou
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