* [PATCH 0/2] MIPS: Fix build errors with binutils 2.24.51+
@ 2015-01-30 15:40 ` James Hogan
0 siblings, 0 replies; 8+ messages in thread
From: James Hogan @ 2015-01-30 15:40 UTC (permalink / raw)
To: Ralf Baechle, linux-mips; +Cc: James Hogan, Paul Burton, David Daney
Fix the following build error with binutils 2.24.51+ since v3.18-rc4:
{standard input}: Assembler messages:
{standard input}:2913: Error: opcode not supported on this processor: mips32r2 (mips32r2) `ctc1 $2,$31'
scripts/Makefile.build:257: recipe for target 'arch/mips/kernel/traps.o' failed
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
James Hogan (2):
MIPS: mipsregs.h: Add write_32bit_cp1_register()
MIPS: traps: Fix inline asm ctc1 missing .set hardfloat
arch/mips/include/asm/mipsregs.h | 15 +++++++++++++++
arch/mips/kernel/traps.c | 3 ++-
2 files changed, 17 insertions(+), 1 deletion(-)
--
2.0.5
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 0/2] MIPS: Fix build errors with binutils 2.24.51+
@ 2015-01-30 15:40 ` James Hogan
0 siblings, 0 replies; 8+ messages in thread
From: James Hogan @ 2015-01-30 15:40 UTC (permalink / raw)
To: Ralf Baechle, linux-mips; +Cc: James Hogan, Paul Burton, David Daney
Fix the following build error with binutils 2.24.51+ since v3.18-rc4:
{standard input}: Assembler messages:
{standard input}:2913: Error: opcode not supported on this processor: mips32r2 (mips32r2) `ctc1 $2,$31'
scripts/Makefile.build:257: recipe for target 'arch/mips/kernel/traps.o' failed
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
James Hogan (2):
MIPS: mipsregs.h: Add write_32bit_cp1_register()
MIPS: traps: Fix inline asm ctc1 missing .set hardfloat
arch/mips/include/asm/mipsregs.h | 15 +++++++++++++++
arch/mips/kernel/traps.c | 3 ++-
2 files changed, 17 insertions(+), 1 deletion(-)
--
2.0.5
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/2] MIPS: mipsregs.h: Add write_32bit_cp1_register()
@ 2015-01-30 15:40 ` James Hogan
0 siblings, 0 replies; 8+ messages in thread
From: James Hogan @ 2015-01-30 15:40 UTC (permalink / raw)
To: Ralf Baechle, linux-mips; +Cc: James Hogan, Paul Burton, David Daney
Add a write_32bit_cp1_register() macro to compliment the
read_32bit_cp1_register() macro. This is to abstract whether .set
hardfloat needs to be used based on GAS_HAS_SET_HARDFLOAT.
The implementation of _read_32bit_cp1_register() .sets mips1 due to
failure of gas v2.19 to assemble cfc1 for Octeon (see commit
25c300030016 ("MIPS: Override assembler target architecture for
octeon.")). I haven't copied this over to _write_32bit_cp1_register() as
I'm uncertain whether it applies to ctc1 too, or whether anybody cares
about that version of binutils any longer.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
---
arch/mips/include/asm/mipsregs.h | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 5e4aef304b02..5b720d8c2745 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -1386,12 +1386,27 @@ do { \
__res; \
})
+#define _write_32bit_cp1_register(dest, val, gas_hardfloat) \
+do { \
+ __asm__ __volatile__( \
+ " .set push \n" \
+ " .set reorder \n" \
+ " "STR(gas_hardfloat)" \n" \
+ " ctc1 %0,"STR(dest)" \n" \
+ " .set pop \n" \
+ : : "r" (val)); \
+} while (0)
+
#ifdef GAS_HAS_SET_HARDFLOAT
#define read_32bit_cp1_register(source) \
_read_32bit_cp1_register(source, .set hardfloat)
+#define write_32bit_cp1_register(dest, val) \
+ _write_32bit_cp1_register(dest, val, .set hardfloat)
#else
#define read_32bit_cp1_register(source) \
_read_32bit_cp1_register(source, )
+#define write_32bit_cp1_register(dest, val) \
+ _write_32bit_cp1_register(dest, val, )
#endif
#ifdef HAVE_AS_DSP
--
2.0.5
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 1/2] MIPS: mipsregs.h: Add write_32bit_cp1_register()
@ 2015-01-30 15:40 ` James Hogan
0 siblings, 0 replies; 8+ messages in thread
From: James Hogan @ 2015-01-30 15:40 UTC (permalink / raw)
To: Ralf Baechle, linux-mips; +Cc: James Hogan, Paul Burton, David Daney
Add a write_32bit_cp1_register() macro to compliment the
read_32bit_cp1_register() macro. This is to abstract whether .set
hardfloat needs to be used based on GAS_HAS_SET_HARDFLOAT.
The implementation of _read_32bit_cp1_register() .sets mips1 due to
failure of gas v2.19 to assemble cfc1 for Octeon (see commit
25c300030016 ("MIPS: Override assembler target architecture for
octeon.")). I haven't copied this over to _write_32bit_cp1_register() as
I'm uncertain whether it applies to ctc1 too, or whether anybody cares
about that version of binutils any longer.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
---
arch/mips/include/asm/mipsregs.h | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 5e4aef304b02..5b720d8c2745 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -1386,12 +1386,27 @@ do { \
__res; \
})
+#define _write_32bit_cp1_register(dest, val, gas_hardfloat) \
+do { \
+ __asm__ __volatile__( \
+ " .set push \n" \
+ " .set reorder \n" \
+ " "STR(gas_hardfloat)" \n" \
+ " ctc1 %0,"STR(dest)" \n" \
+ " .set pop \n" \
+ : : "r" (val)); \
+} while (0)
+
#ifdef GAS_HAS_SET_HARDFLOAT
#define read_32bit_cp1_register(source) \
_read_32bit_cp1_register(source, .set hardfloat)
+#define write_32bit_cp1_register(dest, val) \
+ _write_32bit_cp1_register(dest, val, .set hardfloat)
#else
#define read_32bit_cp1_register(source) \
_read_32bit_cp1_register(source, )
+#define write_32bit_cp1_register(dest, val) \
+ _write_32bit_cp1_register(dest, val, )
#endif
#ifdef HAVE_AS_DSP
--
2.0.5
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/2] MIPS: traps: Fix inline asm ctc1 missing .set hardfloat
@ 2015-01-30 15:40 ` James Hogan
0 siblings, 0 replies; 8+ messages in thread
From: James Hogan @ 2015-01-30 15:40 UTC (permalink / raw)
To: Ralf Baechle, linux-mips; +Cc: James Hogan, Paul Burton, stable
Commit 842dfc11ea9a ("MIPS: Fix build with binutils 2.24.51+") in v3.18
enabled -msoft-float and sprinkled ".set hardfloat" where necessary to
use FP instructions. However it missed enable_restore_fp_context() which
since v3.17 does a ctc1 with inline assembly, causing the following
assembler errors on Mentor's 2014.05 toolchain:
{standard input}: Assembler messages:
{standard input}:2913: Error: opcode not supported on this processor: mips32r2 (mips32r2) `ctc1 $2,$31'
scripts/Makefile.build:257: recipe for target 'arch/mips/kernel/traps.o' failed
Fix that to use the new write_32bit_cp1_register() macro so that ".set
hardfloat" is automatically added when -msoft-float is in use.
Fixes 842dfc11ea9a ("MIPS: Fix build with binutils 2.24.51+")
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: <stable@vger.kernel.org> # 3.18+, depends on "MIPS: mipsregs.h: Add write_32bit_cp1_register()"
---
arch/mips/kernel/traps.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index dc209a4a1b8b..c8677b842d78 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1232,7 +1232,8 @@ static int enable_restore_fp_context(int msa)
/* Restore the scalar FP control & status register */
if (!was_fpu_owner)
- asm volatile("ctc1 %0, $31" : : "r"(current->thread.fpu.fcr31));
+ write_32bit_cp1_register(CP1_STATUS,
+ current->thread.fpu.fcr31);
}
out:
--
2.0.5
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/2] MIPS: traps: Fix inline asm ctc1 missing .set hardfloat
@ 2015-01-30 15:40 ` James Hogan
0 siblings, 0 replies; 8+ messages in thread
From: James Hogan @ 2015-01-30 15:40 UTC (permalink / raw)
To: Ralf Baechle, linux-mips; +Cc: James Hogan, Paul Burton, stable
Commit 842dfc11ea9a ("MIPS: Fix build with binutils 2.24.51+") in v3.18
enabled -msoft-float and sprinkled ".set hardfloat" where necessary to
use FP instructions. However it missed enable_restore_fp_context() which
since v3.17 does a ctc1 with inline assembly, causing the following
assembler errors on Mentor's 2014.05 toolchain:
{standard input}: Assembler messages:
{standard input}:2913: Error: opcode not supported on this processor: mips32r2 (mips32r2) `ctc1 $2,$31'
scripts/Makefile.build:257: recipe for target 'arch/mips/kernel/traps.o' failed
Fix that to use the new write_32bit_cp1_register() macro so that ".set
hardfloat" is automatically added when -msoft-float is in use.
Fixes 842dfc11ea9a ("MIPS: Fix build with binutils 2.24.51+")
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: <stable@vger.kernel.org> # 3.18+, depends on "MIPS: mipsregs.h: Add write_32bit_cp1_register()"
---
arch/mips/kernel/traps.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index dc209a4a1b8b..c8677b842d78 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1232,7 +1232,8 @@ static int enable_restore_fp_context(int msa)
/* Restore the scalar FP control & status register */
if (!was_fpu_owner)
- asm volatile("ctc1 %0, $31" : : "r"(current->thread.fpu.fcr31));
+ write_32bit_cp1_register(CP1_STATUS,
+ current->thread.fpu.fcr31);
}
out:
--
2.0.5
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 0/2] MIPS: Fix build errors with binutils 2.24.51+
@ 2015-01-30 15:45 ` Markos Chandras
0 siblings, 0 replies; 8+ messages in thread
From: Markos Chandras @ 2015-01-30 15:45 UTC (permalink / raw)
To: James Hogan, Ralf Baechle, linux-mips; +Cc: Paul Burton, David Daney
On 01/30/2015 03:40 PM, James Hogan wrote:
> Fix the following build error with binutils 2.24.51+ since v3.18-rc4:
>
> {standard input}: Assembler messages:
> {standard input}:2913: Error: opcode not supported on this processor: mips32r2 (mips32r2) `ctc1 $2,$31'
> scripts/Makefile.build:257: recipe for target 'arch/mips/kernel/traps.o' failed
>
> Cc: Ralf Baechle <ralf@linux-mips.org>
> Cc: Paul Burton <paul.burton@imgtec.com>
> Cc: David Daney <david.daney@cavium.com>
> Cc: linux-mips@linux-mips.org
>
> James Hogan (2):
> MIPS: mipsregs.h: Add write_32bit_cp1_register()
> MIPS: traps: Fix inline asm ctc1 missing .set hardfloat
>
> arch/mips/include/asm/mipsregs.h | 15 +++++++++++++++
> arch/mips/kernel/traps.c | 3 ++-
> 2 files changed, 17 insertions(+), 1 deletion(-)
>
both look good to me. Thanks!
Reviewed-by: Markos Chandras <markos.chandras@imgtec.com>
--
markos
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 0/2] MIPS: Fix build errors with binutils 2.24.51+
@ 2015-01-30 15:45 ` Markos Chandras
0 siblings, 0 replies; 8+ messages in thread
From: Markos Chandras @ 2015-01-30 15:45 UTC (permalink / raw)
To: James Hogan, Ralf Baechle, linux-mips; +Cc: Paul Burton, David Daney
On 01/30/2015 03:40 PM, James Hogan wrote:
> Fix the following build error with binutils 2.24.51+ since v3.18-rc4:
>
> {standard input}: Assembler messages:
> {standard input}:2913: Error: opcode not supported on this processor: mips32r2 (mips32r2) `ctc1 $2,$31'
> scripts/Makefile.build:257: recipe for target 'arch/mips/kernel/traps.o' failed
>
> Cc: Ralf Baechle <ralf@linux-mips.org>
> Cc: Paul Burton <paul.burton@imgtec.com>
> Cc: David Daney <david.daney@cavium.com>
> Cc: linux-mips@linux-mips.org
>
> James Hogan (2):
> MIPS: mipsregs.h: Add write_32bit_cp1_register()
> MIPS: traps: Fix inline asm ctc1 missing .set hardfloat
>
> arch/mips/include/asm/mipsregs.h | 15 +++++++++++++++
> arch/mips/kernel/traps.c | 3 ++-
> 2 files changed, 17 insertions(+), 1 deletion(-)
>
both look good to me. Thanks!
Reviewed-by: Markos Chandras <markos.chandras@imgtec.com>
--
markos
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2015-01-30 15:45 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
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2015-01-30 15:40 [PATCH 0/2] MIPS: Fix build errors with binutils 2.24.51+ James Hogan
2015-01-30 15:40 ` James Hogan
2015-01-30 15:40 ` [PATCH 1/2] MIPS: mipsregs.h: Add write_32bit_cp1_register() James Hogan
2015-01-30 15:40 ` James Hogan
2015-01-30 15:40 ` [PATCH 2/2] MIPS: traps: Fix inline asm ctc1 missing .set hardfloat James Hogan
2015-01-30 15:40 ` James Hogan
2015-01-30 15:45 ` [PATCH 0/2] MIPS: Fix build errors with binutils 2.24.51+ Markos Chandras
2015-01-30 15:45 ` Markos Chandras
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