Re: [Xenomai] ipipe: issues with ARM exception handling

[Jan Kiszka <jan.kiszka@siemens.com>]

On 2015-02-23 19:16, Jan Kiszka wrote:
> On 2015-02-23 19:11, Gilles Chanteperdrix wrote:
>> On Mon, Feb 23, 2015 at 07:04:25PM +0100, Gilles Chanteperdrix wrote:
>>> So, finally, I propose:
>>
>> Mmmm. try again.
>>
>>>
>>> static inline unsigned long ipipe_fault_entry(void)
>>> {
>>> 	unsigned long flags;
>>>
>>> 	local_irq_save(flags);      /* Re-enables hw irqs */
>>
>> We need the explicit hard_local_irq_enable() here.

And we need to fix up regs->ARM_cpsr according to flags.

>>
>>>
>>> 	return flags;
>>> }
>>>
>>> static inline void ipipe_fault_exit(unsigned long x)
>>> {
>>> 	if (irqs_disabled()) {
>>> 		__ipipe_restore_root_nosync(x);
>>> 		hard_local_irq_disable();
>>> 	}
>>> }
>>
>> We need hard_local_irq_disable() before __ipipe_restore_root_nosync,
>> to avoid the preemption of a Linux interrupt where this should not
>> be possible.
> 
> ipipe_restore_root_nosync?
> 
> But we first need to understand the differences to x86 to be sure that
> we don't miss something. The remaining differences either have to have
> an architecture-specific reason - or one side is still wrong (or
> needlessly complex).

Seems like we are converging now with the last mystery (special x86
handling on root entry) solved.

Jan

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