Re: [Qemu-devel] QEMU pci mach-virt: setting PCI_INTERRUPT_LINE?

[Claudio Fontana <claudio.fontana@huawei.com>]

On 25.02.2015 13:08, Alexander Graf wrote:
> 
> 
> On 25.02.15 13:07, Claudio Fontana wrote:
>>
>>
>> On 24.02.2015 15:34, Claudio Fontana wrote:
>>> Hello,
>>>
>>> I am trying to set the pci interrupt line field in the configuration space
>>> (offset 0x3c), since it is initialized as zero.
>>>
>>> I would like to set it to the right value as read from the device tree,
>>> in order for other existing software which relies on it to be able to work unmodified..
>>>
>>> but it does not seem to work (I seem to read back zero even after setting the PCI_INTERRUPT_LINE field).
>>>
>>> I am also reading the interrupt pin, but that one instead seems to work out of the box..
>>>
>>> Thank you for any suggestion,
>>>
>>> Claudio
>>
>> By the way, I am currently just avoiding to rely on PCI_INTERRUPT_LINE for AArch64,
>> but shouldn't the register be programmable?
> 
> As far as I understand the register should really just be a scratch r/w
> register, yeah. Are you sure you're writing in byte granularity?
> 
> 
> Alex

Relatively sure, yeah.. I'll check again, but at least for x86_64 the get function works.
It's OSv's pci-function.cc

u8 function::get_interrupt_line()
{
    return pci_readb(PCI_CFG_INTERRUPT_LINE);
}

void function::set_interrupt_line(u8 irq)
{
    pci_writeb(PCI_CFG_INTERRUPT_LINE, irq);
}

I'll try to debug with PCI_DEBUG and such things, see if I find out something...

Ciao,

Claudio





-- 
Claudio Fontana
Server Virtualization Architect
Huawei Technologies Duesseldorf GmbH
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