From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: ville.syrjala@linux.intel.com, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 02/12] drm/i915: Kill DRAIN_LATENCY_PRECISION_* defines
Date: Fri, 27 Feb 2015 09:38:10 -0800 [thread overview]
Message-ID: <54F0AB82.7070509@virtuousgeek.org> (raw)
In-Reply-To: <1423574909-1074-3-git-send-email-ville.syrjala@linux.intel.com>
On 02/10/2015 05:28 AM, ville.syrjala@linux.intel.com wrote:
> @@ -957,8 +954,7 @@ static void valleyview_update_sprite_wm(struct
drm_plane *plane,
> int plane_prec;
> int sprite_dl;
> int prec_mult;
> - const int high_precision = IS_CHERRYVIEW(dev) ?
> - DRAIN_LATENCY_PRECISION_32 : DRAIN_LATENCY_PRECISION_64;
> + const int high_precision = IS_CHERRYVIEW(dev) ? 16 : 64;
>
> sprite_dl = I915_READ(VLV_DDL(pipe)) & ~(DDL_SPRITE_PRECISION_HIGH(sprite) |
> (DRAIN_LATENCY_MASK << DDL_SPRITE_SHIFT(sprite)));
>
This hunk changes things; did it belong in the earlier patch?
With that explained:
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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next prev parent reply other threads:[~2015-02-27 17:45 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-10 13:28 [PATCH 00/12] drm/i915: Redo VLV/CHV watermark code ville.syrjala
2015-02-10 13:28 ` [PATCH 01/12] drm/i915: Reduce CHV DDL multiplier to 16/8 ville.syrjala
2015-02-27 17:36 ` Jesse Barnes
2015-02-27 18:02 ` Ville Syrjälä
[not found] ` <54F42A58.1020103@linux.intel.com>
2015-03-02 9:36 ` Arun R Murthy
2015-02-10 13:28 ` [PATCH 02/12] drm/i915: Kill DRAIN_LATENCY_PRECISION_* defines ville.syrjala
2015-02-27 17:38 ` Jesse Barnes [this message]
2015-02-27 18:06 ` Ville Syrjälä
2015-02-10 13:28 ` [PATCH 03/12] drm/i915: Simplify VLV drain latency computation ville.syrjala
2015-02-27 17:40 ` Jesse Barnes
2015-02-10 13:28 ` [PATCH 04/12] drm/i915: Hide VLV DDL precision handling ville.syrjala
2015-02-27 17:46 ` Jesse Barnes
2015-02-10 13:28 ` [PATCH 05/12] drm/i915: Reorganize VLV DDL setup ville.syrjala
2015-02-27 17:52 ` Jesse Barnes
2015-02-10 13:28 ` [PATCH 06/12] drm/i915: Pass plane to vlv_compute_drain_latency() ville.syrjala
2015-02-27 17:57 ` Jesse Barnes
2015-02-27 18:09 ` Ville Syrjälä
2015-02-27 20:37 ` Jesse Barnes
2015-03-02 14:44 ` Daniel Vetter
2015-03-02 14:49 ` Ville Syrjälä
2015-03-02 17:18 ` Daniel Vetter
2015-02-10 13:28 ` [PATCH 07/12] drm/i915: Read out display FIFO size on VLV/CHV ville.syrjala
2015-02-12 18:59 ` [PATCH v2 " ville.syrjala
2015-02-27 18:04 ` Jesse Barnes
2015-02-10 13:28 ` [PATCH 08/12] drm/i915: Make sure PND deadline mode is enabled " ville.syrjala
2015-02-27 20:38 ` Jesse Barnes
2015-02-27 20:48 ` Ville Syrjälä
2015-02-10 13:28 ` [PATCH 09/12] drm/i915: Rewrite VLV/CHV watermark code ville.syrjala
2015-03-05 17:22 ` Ville Syrjälä
2015-02-10 13:28 ` [PATCH 10/12] drm/i915: Support maxfifo with two planes on CHV ville.syrjala
2015-03-04 14:04 ` Purushothaman, Vijay A
2015-03-04 14:50 ` Ville Syrjälä
2015-02-10 13:28 ` [PATCH 11/12] drm/i915: Program PFI credits for VLV ville.syrjala
2015-03-04 14:25 ` Purushothaman, Vijay A
2015-03-04 15:06 ` Ville Syrjälä
2015-03-04 15:26 ` Ville Syrjälä
2015-02-10 13:28 ` [PATCH 12/12] drm/i915: Enable the maxfifo PM5 mode when appropriate on CHV ville.syrjala
2015-02-11 0:01 ` shuang.he
2015-02-26 19:01 ` [PATCH v2 " ville.syrjala
2015-03-04 14:28 ` [PATCH " Purushothaman, Vijay A
2015-03-04 15:07 ` Ville Syrjälä
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