From: zyw@rock-chips.com (Chris Zhong)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/2] ARM: rockchip: decrease the wait time for resume
Date: Tue, 03 Mar 2015 13:45:21 +0800 [thread overview]
Message-ID: <54F54A71.4080706@rock-chips.com> (raw)
In-Reply-To: <30327138.BhvlayfjZW@phil>
On 03/03/2015 04:47 AM, Heiko Stuebner wrote:
> Am Montag, 9. Februar 2015, 21:12:22 schrieb Chris Zhong:
>> The delay time for wait the 24MHz OSC stabilization is 750ms, and the
>> delay time for wait the external PMU stabilization is 750ms too, let's
>> decrease them to 30ms.
> just to understand whats happening here:
>
> The default delay time for wait the 24MHz OSC and PMU stabilization is 750ms,
> = reset value in the register and your patch is decreasing this to 30ms.
>
> Are the new 30ms for each of the two long enough in all cases?
Yes, the 30ms are safe for wait them to stabilization.
>
> Heiko
>
>
>> Signed-off-by: Chris Zhong <zyw@rock-chips.com>
>> ---
>>
>> arch/arm/mach-rockchip/pm.c | 3 +++
>> arch/arm/mach-rockchip/pm.h | 4 ++++
>> 2 files changed, 7 insertions(+)
>>
>> diff --git a/arch/arm/mach-rockchip/pm.c b/arch/arm/mach-rockchip/pm.c
>> index 50cb781..a3ab397 100644
>> --- a/arch/arm/mach-rockchip/pm.c
>> +++ b/arch/arm/mach-rockchip/pm.c
>> @@ -209,6 +209,9 @@ static int rk3288_suspend_init(struct device_node *np)
>> memcpy(rk3288_bootram_base, rockchip_slp_cpu_resume,
>> rk3288_bootram_sz);
>>
>> + regmap_write(pmu_regmap, RK3288_PMU_OSC_CNT, OSC_STABL_CNT_THRESH);
>> + regmap_write(pmu_regmap, RK3288_PMU_STABL_CNT, PMU_STABL_CNT_THRESH);
>> +
>> return 0;
>> }
>>
>> diff --git a/arch/arm/mach-rockchip/pm.h b/arch/arm/mach-rockchip/pm.h
>> index 7d752ff..96beaa0 100644
>> --- a/arch/arm/mach-rockchip/pm.h
>> +++ b/arch/arm/mach-rockchip/pm.h
>> @@ -57,6 +57,10 @@ void __init rockchip_suspend_init(void);
>> /* PMU_WAKEUP_CFG1 bits */
>> #define PMU_ARMINT_WAKEUP_EN BIT(0)
>>
>> +/* wait 30ms for OSC stable and 30ms for pmic stable */
>> +#define OSC_STABL_CNT_THRESH (32 * 30)
>> +#define PMU_STABL_CNT_THRESH (32 * 30)
>> +
>> enum rk3288_pwr_mode_con {
>> PMU_PWR_MODE_EN = 0,
>> PMU_CLK_CORE_SRC_GATE_EN,
>
>
>
WARNING: multiple messages have this Message-ID (diff)
From: Chris Zhong <zyw@rock-chips.com>
To: Heiko Stuebner <heiko@sntech.de>
Cc: dianders@chromium.org, djkurtz@chromium.org,
sonnyrao@chromium.org, linux-rockchip@lists.infradead.org,
Russell King <linux@arm.linux.org.uk>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] ARM: rockchip: decrease the wait time for resume
Date: Tue, 03 Mar 2015 13:45:21 +0800 [thread overview]
Message-ID: <54F54A71.4080706@rock-chips.com> (raw)
In-Reply-To: <30327138.BhvlayfjZW@phil>
On 03/03/2015 04:47 AM, Heiko Stuebner wrote:
> Am Montag, 9. Februar 2015, 21:12:22 schrieb Chris Zhong:
>> The delay time for wait the 24MHz OSC stabilization is 750ms, and the
>> delay time for wait the external PMU stabilization is 750ms too, let's
>> decrease them to 30ms.
> just to understand whats happening here:
>
> The default delay time for wait the 24MHz OSC and PMU stabilization is 750ms,
> = reset value in the register and your patch is decreasing this to 30ms.
>
> Are the new 30ms for each of the two long enough in all cases?
Yes, the 30ms are safe for wait them to stabilization.
>
> Heiko
>
>
>> Signed-off-by: Chris Zhong <zyw@rock-chips.com>
>> ---
>>
>> arch/arm/mach-rockchip/pm.c | 3 +++
>> arch/arm/mach-rockchip/pm.h | 4 ++++
>> 2 files changed, 7 insertions(+)
>>
>> diff --git a/arch/arm/mach-rockchip/pm.c b/arch/arm/mach-rockchip/pm.c
>> index 50cb781..a3ab397 100644
>> --- a/arch/arm/mach-rockchip/pm.c
>> +++ b/arch/arm/mach-rockchip/pm.c
>> @@ -209,6 +209,9 @@ static int rk3288_suspend_init(struct device_node *np)
>> memcpy(rk3288_bootram_base, rockchip_slp_cpu_resume,
>> rk3288_bootram_sz);
>>
>> + regmap_write(pmu_regmap, RK3288_PMU_OSC_CNT, OSC_STABL_CNT_THRESH);
>> + regmap_write(pmu_regmap, RK3288_PMU_STABL_CNT, PMU_STABL_CNT_THRESH);
>> +
>> return 0;
>> }
>>
>> diff --git a/arch/arm/mach-rockchip/pm.h b/arch/arm/mach-rockchip/pm.h
>> index 7d752ff..96beaa0 100644
>> --- a/arch/arm/mach-rockchip/pm.h
>> +++ b/arch/arm/mach-rockchip/pm.h
>> @@ -57,6 +57,10 @@ void __init rockchip_suspend_init(void);
>> /* PMU_WAKEUP_CFG1 bits */
>> #define PMU_ARMINT_WAKEUP_EN BIT(0)
>>
>> +/* wait 30ms for OSC stable and 30ms for pmic stable */
>> +#define OSC_STABL_CNT_THRESH (32 * 30)
>> +#define PMU_STABL_CNT_THRESH (32 * 30)
>> +
>> enum rk3288_pwr_mode_con {
>> PMU_PWR_MODE_EN = 0,
>> PMU_CLK_CORE_SRC_GATE_EN,
>
>
>
next prev parent reply other threads:[~2015-03-03 5:45 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-09 13:12 [PATCH 1/2] ARM: rockchip: decrease the wait time for resume Chris Zhong
2015-02-09 13:12 ` Chris Zhong
2015-02-09 13:12 ` [PATCH 2/2] ARM: rockchip: disable watchdog during suspend Chris Zhong
2015-02-09 13:12 ` Chris Zhong
2015-03-02 20:50 ` Heiko Stuebner
2015-03-02 20:50 ` Heiko Stuebner
2015-03-03 5:57 ` Chris Zhong
2015-03-03 5:57 ` Chris Zhong
2015-03-11 21:23 ` Doug Anderson
2015-03-11 21:23 ` Doug Anderson
2015-03-11 21:43 ` Heiko Stuebner
2015-03-11 21:43 ` Heiko Stuebner
2015-03-02 20:47 ` [PATCH 1/2] ARM: rockchip: decrease the wait time for resume Heiko Stuebner
2015-03-02 20:47 ` Heiko Stuebner
2015-03-03 5:45 ` Chris Zhong [this message]
2015-03-03 5:45 ` Chris Zhong
2015-03-11 21:31 ` Doug Anderson
2015-03-11 21:31 ` Doug Anderson
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