From: Clément Léger <cleger@rivosinc.com>
To: kvm-riscv@lists.infradead.org
Subject: [kvm-unit-tests PATCH v3 4/4] riscv: sbi: Add SSE extension tests
Date: Mon, 25 Nov 2024 15:09:26 +0100 [thread overview]
Message-ID: <54ac149d-65ac-4b2a-ad52-70bca87e8862@rivosinc.com> (raw)
In-Reply-To: <20241125-01fae59d27bb81fff71e794e@orel>
On 25/11/2024 14:53, Andrew Jones wrote:
> On Mon, Nov 25, 2024 at 12:54:48PM +0100, Cl?ment L?ger wrote:
>> Add SBI SSE extension tests for the following features:
>> - Test attributes errors (invalid values, RO, etc)
>> - Registration errors
>> - Simple events (register, enable, inject)
>> - Events with different priorities
>> - Global events dispatch on different harts
>> - Local events on all harts
>
> And now also double trap and mask/unmask.
Hi drew,
It does not really tests double trap though, only the double trap SSE
event (similar to the RAS one or whatever SSE local event). I'll update
it with mask/unmask at least.
Cl?ment
>
> Thanks,
> drew
WARNING: multiple messages have this Message-ID (diff)
From: "Clément Léger" <cleger@rivosinc.com>
To: Andrew Jones <andrew.jones@linux.dev>
Cc: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
Andrew Jones <ajones@ventanamicro.com>,
Anup Patel <apatel@ventanamicro.com>,
Atish Patra <atishp@rivosinc.com>
Subject: Re: [kvm-unit-tests PATCH v3 4/4] riscv: sbi: Add SSE extension tests
Date: Mon, 25 Nov 2024 15:09:26 +0100 [thread overview]
Message-ID: <54ac149d-65ac-4b2a-ad52-70bca87e8862@rivosinc.com> (raw)
In-Reply-To: <20241125-01fae59d27bb81fff71e794e@orel>
On 25/11/2024 14:53, Andrew Jones wrote:
> On Mon, Nov 25, 2024 at 12:54:48PM +0100, Clément Léger wrote:
>> Add SBI SSE extension tests for the following features:
>> - Test attributes errors (invalid values, RO, etc)
>> - Registration errors
>> - Simple events (register, enable, inject)
>> - Events with different priorities
>> - Global events dispatch on different harts
>> - Local events on all harts
>
> And now also double trap and mask/unmask.
Hi drew,
It does not really tests double trap though, only the double trap SSE
event (similar to the RAS one or whatever SSE local event). I'll update
it with mask/unmask at least.
Clément
>
> Thanks,
> drew
next prev parent reply other threads:[~2024-11-25 14:09 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-25 11:54 [kvm-unit-tests PATCH v3 0/4] riscv: add SBI SSE extension tests Clément Léger
2024-11-25 11:54 ` Clément Léger
2024-11-25 11:54 ` [kvm-unit-tests PATCH v3 1/4] riscv: Add "-deps" handling for tests Clément Léger
2024-11-25 11:54 ` Clément Léger
2024-11-25 12:52 ` Andrew Jones
2024-11-25 12:52 ` Andrew Jones
2024-11-25 11:54 ` [kvm-unit-tests PATCH v3 2/4] riscv: lib: Add SBI SSE extension definitions Clément Léger
2024-11-25 11:54 ` Clément Léger
2024-11-25 12:55 ` Andrew Jones
2024-11-25 12:55 ` Andrew Jones
2024-11-25 11:54 ` [kvm-unit-tests PATCH v3 3/4] riscv: lib: Add SSE assembly entry handling Clément Léger
2024-11-25 11:54 ` Clément Léger
2024-11-25 13:50 ` Andrew Jones
2024-11-25 13:50 ` Andrew Jones
2024-11-25 14:13 ` Clément Léger
2024-11-25 14:13 ` Clément Léger
2024-11-25 14:26 ` Andrew Jones
2024-11-25 14:26 ` Andrew Jones
2024-11-25 14:41 ` Clément Léger
2024-11-25 14:41 ` Clément Léger
2024-11-25 11:54 ` [kvm-unit-tests PATCH v3 4/4] riscv: sbi: Add SSE extension tests Clément Léger
2024-11-25 11:54 ` Clément Léger
2024-11-25 13:53 ` Andrew Jones
2024-11-25 13:53 ` Andrew Jones
2024-11-25 14:09 ` Clément Léger [this message]
2024-11-25 14:09 ` Clément Léger
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