From: Boaz Harrosh <boaz@plexistor.com>
To: "Elliott, Robert (Server Storage)" <Elliott@hp.com>,
Andy Lutomirski <luto@amacapital.net>
Cc: Matthew Wilcox <willy@linux.intel.com>,
Ross Zwisler <ross.zwisler@linux.intel.com>,
X86 ML <x86@kernel.org>, Thomas Gleixner <tglx@linutronix.de>,
Dan Williams <dan.j.williams@intel.com>,
Ingo Molnar <mingo@redhat.com>,
"Roger C. Pao" <rcpao.enmotus@gmail.com>,
linux-nvdimm <linux-nvdimm@lists.01.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
"H. Peter Anvin" <hpa@zytor.com>,
Christoph Hellwig <hch@infradead.org>,
"Kani, Toshimitsu" <toshi.kani@hp.com>,
Christoph Hellwig <hch@lst.de>
Subject: Re: [PATCH 1/8] pmem: Initial version of persistent memory driver
Date: Thu, 26 Mar 2015 09:51:40 +0200 [thread overview]
Message-ID: <5513BA8C.2040105@plexistor.com> (raw)
In-Reply-To: <94D0CD8314A33A4D9D801C0FE68B40295A84453E@G9W0745.americas.hpqcorp.net>
On 03/26/2015 06:00 AM, Elliott, Robert (Server Storage) wrote:
>
>
>> -----Original Message-----
>> From: linux-kernel-owner@vger.kernel.org [mailto:linux-kernel-
>> owner@vger.kernel.org] On Behalf Of Andy Lutomirski
>> Sent: Wednesday, March 18, 2015 1:07 PM
>> To: Boaz Harrosh
>> Cc: Matthew Wilcox; Ross Zwisler; X86 ML; Thomas Gleixner; Dan Williams;
>> Ingo Molnar; Roger C. Pao; linux-nvdimm; linux-kernel; H. Peter Anvin;
>> Christoph Hellwig
>> Subject: Re: [PATCH 1/8] pmem: Initial version of persistent memory driver
>>
>> On Mar 9, 2015 8:20 AM, "Boaz Harrosh" <boaz@plexistor.com> wrote:
>>>
>>> On 03/06/2015 01:03 AM, Andy Lutomirski wrote:
>>> <>
>>>>
>>>> I think it would be nice to have control over the caching mode.
>>>> Depending on the application, WT or UC could make more sense.
>>>>
>>>
>>> Patches are welcome. say
>>> map=sss@aaa:WT,sss@aaa:CA, ...
>>>
>>> But for us, with direct_access(), all benchmarks show a slight advantage
>>> for the cached mode.
>>
>> I'm sure cached is faster. The question is: who flushes the cache?
>>
>> --Andy
>
> Nobody.
>
> Therefore, pmem as currently proposed (mapping the memory with
> ioremap_cache, which uses _PAGE_CACHE_MODE_WB) is unsafe unless the
> system is doing something special to ensure L1, L2, and L3 caches are
> flushed on power loss.
>
> I think pmem needs to map the memory as UC or WT by default, providing
> WB and WC only as an option for users confident that those attributes
> are safe to use in their system.
>
> Even using UC or WT presumes that ADR is in place.
>
I will add command line options for these modes per range. (Unless you
care to send a patch before me)
Thanks this is a good idea
Boaz
WARNING: multiple messages have this Message-ID (diff)
From: Boaz Harrosh <boaz@plexistor.com>
To: "Elliott, Robert (Server Storage)" <Elliott@hp.com>,
Andy Lutomirski <luto@amacapital.net>
Cc: Matthew Wilcox <willy@linux.intel.com>,
Ross Zwisler <ross.zwisler@linux.intel.com>,
X86 ML <x86@kernel.org>, Thomas Gleixner <tglx@linutronix.de>,
Dan Williams <dan.j.williams@intel.com>,
Ingo Molnar <mingo@redhat.com>,
"Roger C. Pao" <rcpao.enmotus@gmail.com>,
linux-nvdimm <linux-nvdimm@ml01.01.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
"H. Peter Anvin" <hpa@zytor.com>,
Christoph Hellwig <hch@infradead.org>,
"Kani, Toshimitsu" <toshi.kani@hp.com>,
Christoph Hellwig <hch@lst.de>
Subject: Re: [PATCH 1/8] pmem: Initial version of persistent memory driver
Date: Thu, 26 Mar 2015 09:51:40 +0200 [thread overview]
Message-ID: <5513BA8C.2040105@plexistor.com> (raw)
In-Reply-To: <94D0CD8314A33A4D9D801C0FE68B40295A84453E@G9W0745.americas.hpqcorp.net>
On 03/26/2015 06:00 AM, Elliott, Robert (Server Storage) wrote:
>
>
>> -----Original Message-----
>> From: linux-kernel-owner@vger.kernel.org [mailto:linux-kernel-
>> owner@vger.kernel.org] On Behalf Of Andy Lutomirski
>> Sent: Wednesday, March 18, 2015 1:07 PM
>> To: Boaz Harrosh
>> Cc: Matthew Wilcox; Ross Zwisler; X86 ML; Thomas Gleixner; Dan Williams;
>> Ingo Molnar; Roger C. Pao; linux-nvdimm; linux-kernel; H. Peter Anvin;
>> Christoph Hellwig
>> Subject: Re: [PATCH 1/8] pmem: Initial version of persistent memory driver
>>
>> On Mar 9, 2015 8:20 AM, "Boaz Harrosh" <boaz@plexistor.com> wrote:
>>>
>>> On 03/06/2015 01:03 AM, Andy Lutomirski wrote:
>>> <>
>>>>
>>>> I think it would be nice to have control over the caching mode.
>>>> Depending on the application, WT or UC could make more sense.
>>>>
>>>
>>> Patches are welcome. say
>>> map=sss@aaa:WT,sss@aaa:CA, ...
>>>
>>> But for us, with direct_access(), all benchmarks show a slight advantage
>>> for the cached mode.
>>
>> I'm sure cached is faster. The question is: who flushes the cache?
>>
>> --Andy
>
> Nobody.
>
> Therefore, pmem as currently proposed (mapping the memory with
> ioremap_cache, which uses _PAGE_CACHE_MODE_WB) is unsafe unless the
> system is doing something special to ensure L1, L2, and L3 caches are
> flushed on power loss.
>
> I think pmem needs to map the memory as UC or WT by default, providing
> WB and WC only as an option for users confident that those attributes
> are safe to use in their system.
>
> Even using UC or WT presumes that ADR is in place.
>
I will add command line options for these modes per range. (Unless you
care to send a patch before me)
Thanks this is a good idea
Boaz
next prev parent reply other threads:[~2015-03-26 7:51 UTC|newest]
Thread overview: 83+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-05 10:16 [PATCH 0/3 v5] e820: Fix handling of NvDIMM chips Boaz Harrosh
2015-03-05 10:16 ` Boaz Harrosh
2015-03-05 10:20 ` [PATCH 1/3] e820: Don't let unknown DIMM type come out BUSY Boaz Harrosh
2015-03-05 10:20 ` Boaz Harrosh
2015-03-05 20:41 ` Dan Williams
2015-03-05 20:41 ` Dan Williams
2015-03-09 10:54 ` Boaz Harrosh
2015-03-09 10:54 ` Boaz Harrosh
2015-03-05 10:21 ` [PATCH 2/3] resource: Add new flag IORESOURCE_MEM_WARN Boaz Harrosh
2015-03-05 10:21 ` Boaz Harrosh
2015-03-05 10:24 ` [PATCH 3/3] e820: Add the unknown-12 Memory type (DDR3-NvDIMM) Boaz Harrosh
2015-03-05 10:24 ` Boaz Harrosh
2015-03-05 20:56 ` Dan Williams
2015-03-05 20:56 ` Dan Williams
2015-03-05 23:09 ` Andy Lutomirski
2015-03-05 23:09 ` Andy Lutomirski
2015-03-09 12:10 ` Boaz Harrosh
2015-03-09 12:10 ` Boaz Harrosh
2015-03-10 5:11 ` joeyli
2015-03-10 5:11 ` joeyli
2015-03-10 8:56 ` Boaz Harrosh
2015-03-10 8:56 ` Boaz Harrosh
2015-03-10 13:19 ` Andy Lutomirski
2015-03-10 13:19 ` Andy Lutomirski
2015-03-09 11:19 ` Boaz Harrosh
2015-03-09 11:19 ` Boaz Harrosh
2015-03-09 14:44 ` Dan Williams
2015-03-09 14:44 ` Dan Williams
2015-03-09 15:14 ` Andy Lutomirski
2015-03-09 15:14 ` Andy Lutomirski
2015-03-09 15:17 ` Dan Williams
2015-03-09 15:17 ` Dan Williams
2015-03-10 8:47 ` Boaz Harrosh
2015-03-10 8:47 ` Boaz Harrosh
2015-03-05 10:32 ` [RFC 0/8] pmem: Submission of the Persistent memory block device Boaz Harrosh
2015-03-05 10:32 ` Boaz Harrosh
2015-03-05 11:55 ` [PATCH 1/8] pmem: Initial version of persistent memory driver Boaz Harrosh
2015-03-05 11:55 ` Boaz Harrosh
2015-03-05 20:35 ` Paul Bolle
2015-03-05 20:35 ` Paul Bolle
2015-03-05 23:03 ` Andy Lutomirski
2015-03-05 23:03 ` Andy Lutomirski
2015-03-09 12:20 ` Boaz Harrosh
2015-03-09 12:20 ` Boaz Harrosh
2015-03-18 18:06 ` Andy Lutomirski
2015-03-18 18:06 ` Andy Lutomirski
2015-03-26 4:00 ` Elliott, Robert (Server Storage)
2015-03-26 4:00 ` Elliott, Robert (Server Storage)
2015-03-26 7:51 ` Boaz Harrosh [this message]
2015-03-26 7:51 ` Boaz Harrosh
2015-03-26 21:31 ` Dave Chinner
2015-03-26 21:31 ` Dave Chinner
2015-03-18 17:43 ` Ross Zwisler
2015-03-18 17:43 ` Ross Zwisler
2015-03-19 9:24 ` Boaz Harrosh
2015-03-19 9:24 ` Boaz Harrosh
2015-03-20 0:11 ` Dan Williams
2015-03-20 0:11 ` Dan Williams
2015-03-05 11:55 ` [PATCH 2/8] pmem: KISS, remove register_blkdev Boaz Harrosh
2015-03-05 11:55 ` Boaz Harrosh
2015-03-05 11:56 ` [PATCH 3/8] pmem: Add support for rw_page() Boaz Harrosh
2015-03-05 11:56 ` Boaz Harrosh
2015-03-05 11:57 ` [PATCH 4/8] pmem: Add support for direct_access() Boaz Harrosh
2015-03-05 11:57 ` Boaz Harrosh
2015-03-05 11:58 ` [PATCH 5/8] mm: Let sparse_{add,remove}_one_section receive a node_id Boaz Harrosh
2015-03-05 11:58 ` Boaz Harrosh
2015-03-06 18:43 ` Ross Zwisler
2015-03-06 18:43 ` Ross Zwisler
2015-03-05 11:59 ` [PATCH 6/8] mm: New add_persistent_memory/remove_persistent_memory Boaz Harrosh
2015-03-05 11:59 ` Boaz Harrosh
2015-03-05 11:59 ` [PATCH 7/8] pmem: Add support for page structs Boaz Harrosh
2015-03-05 11:59 ` Boaz Harrosh
2015-03-23 20:59 ` Dan Williams
2015-03-23 20:59 ` Dan Williams
2015-03-05 12:01 ` [PATCH 8/8] OUT-OF-TREE: pmem: Allow request_mem to fail (BLK_DEV_PMEM_IGNORE_REQUEST_MEM_RET) Boaz Harrosh
2015-03-05 12:01 ` Boaz Harrosh
2015-03-06 18:37 ` [RFC 0/8] pmem: Submission of the Persistent memory block device Ross Zwisler
2015-03-06 18:37 ` Ross Zwisler
2015-03-07 1:39 ` Christoph Hellwig
2015-03-09 12:41 ` Boaz Harrosh
2015-03-09 12:41 ` Boaz Harrosh
2015-03-05 22:48 ` [PATCH 0/3 v5] e820: Fix handling of NvDIMM chips H. Peter Anvin
2015-03-05 23:06 ` Andy Lutomirski
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5513BA8C.2040105@plexistor.com \
--to=boaz@plexistor.com \
--cc=Elliott@hp.com \
--cc=dan.j.williams@intel.com \
--cc=hch@infradead.org \
--cc=hch@lst.de \
--cc=hpa@zytor.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-nvdimm@lists.01.org \
--cc=luto@amacapital.net \
--cc=mingo@redhat.com \
--cc=rcpao.enmotus@gmail.com \
--cc=ross.zwisler@linux.intel.com \
--cc=tglx@linutronix.de \
--cc=toshi.kani@hp.com \
--cc=willy@linux.intel.com \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.