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From: Serguei Sagalovitch <serguei.sagalovitch@amd.com>
To: Jerome Glisse <j.glisse@gmail.com>
Cc: dri-devel@lists.freedesktop.org
Subject: Re: [RFC] drm/radeon: userfence IOCTL
Date: Mon, 13 Apr 2015 11:52:19 -0400	[thread overview]
Message-ID: <552BE633.9020306@amd.com> (raw)
In-Reply-To: <20150413153935.GB29334@gmail.com>


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 > Given that the userspace wait fence ioctl has not way to know which 
command buffer it is really waiting after then kernel has no knowledge 
of if this user fence will signal at all.
We could pass BO handle as  parameter in the "fence ioctl" to rely on it 
so kernel will know which BO  it is waiting.


 > So a malicious user space (we always have to assume this thing exist) 
could create a big VRAM BO and effectively pin it in VRAM leading to a 
GPU DOS (denial of service).
This problem  always exists. Malicious user space could allocate big BO 
and then submit shader running in loop which read/write from this BO.  
It could also spawn processes which will do the same thing. IMHO the 
only way to improve situation is  to have GPU Scheduler to allow 
"unloading" such application.

Sincerely yours,
Serguei Sagalovitch

On 15-04-13 11:39 AM, Jerome Glisse wrote:
> On Mon, Apr 13, 2015 at 11:25:30AM -0400, Serguei Sagalovitch wrote:
>>> the BO to be kept in the same place while it is mapped inside the kernel
>> page table
>> ...
>>> So this requires that we pin down the BO for the duration of the wait
>> IOCTL.
>>
>> But my understanding is that it should be not duration of "wait" IOCTL but
>> "duration" of command buffer execution.
>>
>> BTW: I would assume that this is not the new scenario.
>>
>>   This is scenario:
>>      - User allocate BO
>>      - User get CPU address for BO
>>      - User submit command buffer to write to BO
>>      - User could "poll" / "read" or "write" BO data by CPU
>>
>> So when  TTM needs  to move BO to another location it should also update CPU
>> "mapping" correctly so user will always read / write the correct data.
>>
>> Did I miss anything?
> No this is how things works. But we want to avoid pinning buffer.
> One use case for this userspace fence is i assume same BO same
> user fence use accross several command buffer. Given that the
> userspace wait fence ioctl has not way to know which command
> buffer it is really waiting after then kernel has no knowledge
> of if this user fence will signal at all. So a malicious user
> space (we always have to assume this thing exist) could create
> a big VRAM BO and effectively pin it in VRAM leading to a GPU
> DOS (denial of service).
>
> By the way Christian, i would add a timeout to this ioctl and
> return eagain to userspace on timeout so that userspace can
> resumit. That way a malicious userspace will just keep exhausting
> its cpu timeslot.
>
> Cheers,
> Jérôme


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  parent reply	other threads:[~2015-04-13 16:25 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-04-13 14:52 [RFC] drm/radeon: userfence IOCTL Christian König
2015-04-13 14:52 ` [PATCH 1/3] drm/radeon: wait for BO move to finish on kmap Christian König
2015-04-13 14:52 ` [PATCH 2/3] drm/radeon: cleanup radeon_cs_get_ring Christian König
2015-04-13 14:52 ` [PATCH 3/3] drm/radeon: add userfence IOCTL Christian König
2015-04-13 17:23   ` Daniel Vetter
2015-04-13 17:51     ` Jerome Glisse
2015-04-13 18:26       ` Christian König
2015-04-13 19:48         ` Jerome Glisse
2015-04-14  8:17           ` Daniel Vetter
2015-04-13 17:27   ` Daniel Vetter
2015-04-13 15:25 ` [RFC] drm/radeon: " Serguei Sagalovitch
2015-04-13 15:35   ` Christian König
2015-04-13 15:37     ` Serguei Sagalovitch
2015-04-13 15:46     ` Jerome Glisse
2015-04-13 15:39   ` Jerome Glisse
2015-04-13 15:47     ` Christian König
2015-04-13 15:52     ` Serguei Sagalovitch [this message]
2015-04-13 16:13       ` Jerome Glisse
2015-04-13 15:31 ` Jerome Glisse
2015-04-13 15:45   ` Christian König
2015-04-13 16:08     ` Jerome Glisse
2015-04-13 16:55       ` Christian König
2015-04-13 17:46         ` Jerome Glisse

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