* [PATCH 0/8] staging: rtl8192e: Fix more checkpatch.pl warnings
@ 2015-04-07 23:08 Mateusz Kulikowski
2015-04-07 23:08 ` [PATCH 1/8] staging: rtl8192e: Fix SPACE_BEFORE_TAB warnings Mateusz Kulikowski
` (8 more replies)
0 siblings, 9 replies; 10+ messages in thread
From: Mateusz Kulikowski @ 2015-04-07 23:08 UTC (permalink / raw)
To: gregkh; +Cc: Mateusz Kulikowski, devel, linux-kernel
This series of patches fixes another set of checkpatch.pl warnings.
Most of the patches are trivial, with the exception of #8, #7 and #5;
Driver logic should not be affected.
Some of the patches cause LONG_LINE warnings, but fix has to wait until
I do more driver refactorings (It's hard to keep line length when variable
names have 30 characters).
Series should apply to staging-next/testing (c610f7f7).
Smoke tested on rtl8192e card vs staging-next:
- Module load/unload
- Interface up/down
Mateusz Kulikowski (8):
staging: rtl8192e: Fix SPACE_BEFORE_TAB warnings
staging: rtl8192e: Copy comments from r819XE_phyreg.h to r8192E_phyreg.h
staging: rtl8192e: remove r819xE_phyreg.h
staging: rtl8192e: Fix SPACING errors
staging: rtl8192e: Remove bb tx gains from r8192_priv
staging: rtl8192e: Fix LINE_SPACING warning
staging: rtl8192e: Fix DEEP_INDENTATION warnings in rtllib_parse_info_param()
staging: rtl8192e: Fix DEEP_INDENTATION warnings in rtl_dm.c
drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c | 5 +-
drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c | 2 +-
drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h | 1496 +++++++++++----------
drivers/staging/rtl8192e/rtl8192e/r819xE_phyreg.h | 908 -------------
drivers/staging/rtl8192e/rtl8192e/rtl_core.c | 6 +-
drivers/staging/rtl8192e/rtl8192e/rtl_core.h | 20 +-
drivers/staging/rtl8192e/rtl8192e/rtl_dm.c | 821 +++--------
drivers/staging/rtl8192e/rtl8192e/rtl_dm.h | 9 +
drivers/staging/rtl8192e/rtllib_debug.h | 3 +-
drivers/staging/rtl8192e/rtllib_rx.c | 23 +-
10 files changed, 1014 insertions(+), 2279 deletions(-)
delete mode 100644 drivers/staging/rtl8192e/rtl8192e/r819xE_phyreg.h
--
1.8.4.1
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 1/8] staging: rtl8192e: Fix SPACE_BEFORE_TAB warnings 2015-04-07 23:08 [PATCH 0/8] staging: rtl8192e: Fix more checkpatch.pl warnings Mateusz Kulikowski @ 2015-04-07 23:08 ` Mateusz Kulikowski 2015-04-07 23:08 ` [PATCH 2/8] staging: rtl8192e: Copy comments from r819XE_phyreg.h to r8192E_phyreg.h Mateusz Kulikowski ` (7 subsequent siblings) 8 siblings, 0 replies; 10+ messages in thread From: Mateusz Kulikowski @ 2015-04-07 23:08 UTC (permalink / raw) To: gregkh; +Cc: Mateusz Kulikowski, devel, linux-kernel Reformat r8192E_phyreg.h to make checkpatch happy. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> --- drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h | 1442 ++++++++++----------- 1 file changed, 721 insertions(+), 721 deletions(-) diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h b/drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h index 7899dd5..d080876 100644 --- a/drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h +++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h @@ -3,7 +3,7 @@ * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with @@ -20,48 +20,48 @@ #define _R819XU_PHYREG_H -#define RF_DATA 0x1d4 - -#define rPMAC_Reset 0x100 -#define rPMAC_TxStart 0x104 -#define rPMAC_TxLegacySIG 0x108 -#define rPMAC_TxHTSIG1 0x10c -#define rPMAC_TxHTSIG2 0x110 -#define rPMAC_PHYDebug 0x114 -#define rPMAC_TxPacketNum 0x118 -#define rPMAC_TxIdle 0x11c -#define rPMAC_TxMACHeader0 0x120 -#define rPMAC_TxMACHeader1 0x124 -#define rPMAC_TxMACHeader2 0x128 -#define rPMAC_TxMACHeader3 0x12c -#define rPMAC_TxMACHeader4 0x130 -#define rPMAC_TxMACHeader5 0x134 -#define rPMAC_TxDataType 0x138 -#define rPMAC_TxRandomSeed 0x13c -#define rPMAC_CCKPLCPPreamble 0x140 -#define rPMAC_CCKPLCPHeader 0x144 -#define rPMAC_CCKCRC16 0x148 -#define rPMAC_OFDMRxCRC32OK 0x170 -#define rPMAC_OFDMRxCRC32Er 0x174 -#define rPMAC_OFDMRxParityEr 0x178 -#define rPMAC_OFDMRxCRC8Er 0x17c -#define rPMAC_CCKCRxRC16Er 0x180 -#define rPMAC_CCKCRxRC32Er 0x184 -#define rPMAC_CCKCRxRC32OK 0x188 -#define rPMAC_TxStatus 0x18c - -#define MCS_TXAGC 0x340 -#define CCK_TXAGC 0x348 +#define RF_DATA 0x1d4 + +#define rPMAC_Reset 0x100 +#define rPMAC_TxStart 0x104 +#define rPMAC_TxLegacySIG 0x108 +#define rPMAC_TxHTSIG1 0x10c +#define rPMAC_TxHTSIG2 0x110 +#define rPMAC_PHYDebug 0x114 +#define rPMAC_TxPacketNum 0x118 +#define rPMAC_TxIdle 0x11c +#define rPMAC_TxMACHeader0 0x120 +#define rPMAC_TxMACHeader1 0x124 +#define rPMAC_TxMACHeader2 0x128 +#define rPMAC_TxMACHeader3 0x12c +#define rPMAC_TxMACHeader4 0x130 +#define rPMAC_TxMACHeader5 0x134 +#define rPMAC_TxDataType 0x138 +#define rPMAC_TxRandomSeed 0x13c +#define rPMAC_CCKPLCPPreamble 0x140 +#define rPMAC_CCKPLCPHeader 0x144 +#define rPMAC_CCKCRC16 0x148 +#define rPMAC_OFDMRxCRC32OK 0x170 +#define rPMAC_OFDMRxCRC32Er 0x174 +#define rPMAC_OFDMRxParityEr 0x178 +#define rPMAC_OFDMRxCRC8Er 0x17c +#define rPMAC_CCKCRxRC16Er 0x180 +#define rPMAC_CCKCRxRC32Er 0x184 +#define rPMAC_CCKCRxRC32OK 0x188 +#define rPMAC_TxStatus 0x18c + +#define MCS_TXAGC 0x340 +#define CCK_TXAGC 0x348 /*---------------------0x400~0x4ff----------------------*/ -#define MacBlkCtrl 0x403 - -#define rFPGA0_RFMOD 0x800 -#define rFPGA0_TxInfo 0x804 -#define rFPGA0_PSDFunction 0x808 -#define rFPGA0_TxGainStage 0x80c -#define rFPGA0_RFTiming1 0x810 -#define rFPGA0_RFTiming2 0x814 +#define MacBlkCtrl 0x403 + +#define rFPGA0_RFMOD 0x800 +#define rFPGA0_TxInfo 0x804 +#define rFPGA0_PSDFunction 0x808 +#define rFPGA0_TxGainStage 0x80c +#define rFPGA0_RFTiming1 0x810 +#define rFPGA0_RFTiming2 0x814 #define rFPGA0_XA_HSSIParameter1 0x820 #define rFPGA0_XA_HSSIParameter2 0x824 #define rFPGA0_XB_HSSIParameter1 0x828 @@ -94,49 +94,49 @@ #define rFPGA0_XB_LSSIReadBack 0x8a4 #define rFPGA0_XC_LSSIReadBack 0x8a8 #define rFPGA0_XD_LSSIReadBack 0x8ac -#define rFPGA0_PSDReport 0x8b4 +#define rFPGA0_PSDReport 0x8b4 #define rFPGA0_XAB_RFInterfaceRB 0x8e0 #define rFPGA0_XCD_RFInterfaceRB 0x8e4 -#define rFPGA1_RFMOD 0x900 -#define rFPGA1_TxBlock 0x904 -#define rFPGA1_DebugSelect 0x908 -#define rFPGA1_TxInfo 0x90c - -#define rCCK0_System 0xa00 -#define rCCK0_AFESetting 0xa04 -#define rCCK0_CCA 0xa08 -#define rCCK0_RxAGC1 0xa0c -#define rCCK0_RxAGC2 0xa10 -#define rCCK0_RxHP 0xa14 +#define rFPGA1_RFMOD 0x900 +#define rFPGA1_TxBlock 0x904 +#define rFPGA1_DebugSelect 0x908 +#define rFPGA1_TxInfo 0x90c + +#define rCCK0_System 0xa00 +#define rCCK0_AFESetting 0xa04 +#define rCCK0_CCA 0xa08 +#define rCCK0_RxAGC1 0xa0c +#define rCCK0_RxAGC2 0xa10 +#define rCCK0_RxHP 0xa14 #define rCCK0_DSPParameter1 0xa18 #define rCCK0_DSPParameter2 0xa1c -#define rCCK0_TxFilter1 0xa20 -#define rCCK0_TxFilter2 0xa24 -#define rCCK0_DebugPort 0xa28 +#define rCCK0_TxFilter1 0xa20 +#define rCCK0_TxFilter2 0xa24 +#define rCCK0_DebugPort 0xa28 #define rCCK0_FalseAlarmReport 0xa2c -#define rCCK0_TRSSIReport 0xa50 -#define rCCK0_RxReport 0xa54 +#define rCCK0_TRSSIReport 0xa50 +#define rCCK0_RxReport 0xa54 #define rCCK0_FACounterLower 0xa5c #define rCCK0_FACounterUpper 0xa58 -#define rOFDM0_LSTF 0xc00 +#define rOFDM0_LSTF 0xc00 #define rOFDM0_TRxPathEnable 0xc04 -#define rOFDM0_TRMuxPar 0xc08 -#define rOFDM0_TRSWIsolation 0xc0c -#define rOFDM0_XARxAFE 0xc10 +#define rOFDM0_TRMuxPar 0xc08 +#define rOFDM0_TRSWIsolation 0xc0c +#define rOFDM0_XARxAFE 0xc10 #define rOFDM0_XARxIQImbalance 0xc14 -#define rOFDM0_XBRxAFE 0xc18 +#define rOFDM0_XBRxAFE 0xc18 #define rOFDM0_XBRxIQImbalance 0xc1c -#define rOFDM0_XCRxAFE 0xc20 +#define rOFDM0_XCRxAFE 0xc20 #define rOFDM0_XCRxIQImbalance 0xc24 -#define rOFDM0_XDRxAFE 0xc28 +#define rOFDM0_XDRxAFE 0xc28 #define rOFDM0_XDRxIQImbalance 0xc2c -#define rOFDM0_RxDetector1 0xc30 -#define rOFDM0_RxDetector2 0xc34 -#define rOFDM0_RxDetector3 0xc38 -#define rOFDM0_RxDetector4 0xc3c -#define rOFDM0_RxDSP 0xc40 +#define rOFDM0_RxDetector1 0xc30 +#define rOFDM0_RxDetector2 0xc34 +#define rOFDM0_RxDetector3 0xc38 +#define rOFDM0_RxDetector4 0xc3c +#define rOFDM0_RxDSP 0xc40 #define rOFDM0_CFOandDAGC 0xc44 #define rOFDM0_CCADropThreshold 0xc48 #define rOFDM0_ECCAThreshold 0xc4c @@ -151,702 +151,702 @@ #define rOFDM0_AGCParameter1 0xc70 #define rOFDM0_AGCParameter2 0xc74 #define rOFDM0_AGCRSSITable 0xc78 -#define rOFDM0_HTSTFAGC 0xc7c +#define rOFDM0_HTSTFAGC 0xc7c #define rOFDM0_XATxIQImbalance 0xc80 -#define rOFDM0_XATxAFE 0xc84 +#define rOFDM0_XATxAFE 0xc84 #define rOFDM0_XBTxIQImbalance 0xc88 -#define rOFDM0_XBTxAFE 0xc8c +#define rOFDM0_XBTxAFE 0xc8c #define rOFDM0_XCTxIQImbalance 0xc90 -#define rOFDM0_XCTxAFE 0xc94 +#define rOFDM0_XCTxAFE 0xc94 #define rOFDM0_XDTxIQImbalance 0xc98 -#define rOFDM0_XDTxAFE 0xc9c +#define rOFDM0_XDTxAFE 0xc9c #define rOFDM0_RxHPParameter 0xce0 #define rOFDM0_TxPseudoNoiseWgt 0xce4 -#define rOFDM0_FrameSync 0xcf0 -#define rOFDM0_DFSReport 0xcf4 -#define rOFDM0_TxCoeff1 0xca4 -#define rOFDM0_TxCoeff2 0xca8 -#define rOFDM0_TxCoeff3 0xcac -#define rOFDM0_TxCoeff4 0xcb0 -#define rOFDM0_TxCoeff5 0xcb4 -#define rOFDM0_TxCoeff6 0xcb8 +#define rOFDM0_FrameSync 0xcf0 +#define rOFDM0_DFSReport 0xcf4 +#define rOFDM0_TxCoeff1 0xca4 +#define rOFDM0_TxCoeff2 0xca8 +#define rOFDM0_TxCoeff3 0xcac +#define rOFDM0_TxCoeff4 0xcb0 +#define rOFDM0_TxCoeff5 0xcb4 +#define rOFDM0_TxCoeff6 0xcb8 -#define rOFDM1_LSTF 0xd00 +#define rOFDM1_LSTF 0xd00 #define rOFDM1_TRxPathEnable 0xd04 -#define rOFDM1_CFO 0xd08 -#define rOFDM1_CSI1 0xd10 -#define rOFDM1_SBD 0xd14 -#define rOFDM1_CSI2 0xd18 -#define rOFDM1_CFOTracking 0xd2c +#define rOFDM1_CFO 0xd08 +#define rOFDM1_CSI1 0xd10 +#define rOFDM1_SBD 0xd14 +#define rOFDM1_CSI2 0xd18 +#define rOFDM1_CFOTracking 0xd2c #define rOFDM1_TRxMesaure1 0xd34 -#define rOFDM1_IntfDet 0xd3c -#define rOFDM1_PseudoNoiseStateAB 0xd50 -#define rOFDM1_PseudoNoiseStateCD 0xd54 -#define rOFDM1_RxPseudoNoiseWgt 0xd58 -#define rOFDM_PHYCounter1 0xda0 -#define rOFDM_PHYCounter2 0xda4 -#define rOFDM_PHYCounter3 0xda8 -#define rOFDM_ShortCFOAB 0xdac -#define rOFDM_ShortCFOCD 0xdb0 -#define rOFDM_LongCFOAB 0xdb4 -#define rOFDM_LongCFOCD 0xdb8 -#define rOFDM_TailCFOAB 0xdbc -#define rOFDM_TailCFOCD 0xdc0 +#define rOFDM1_IntfDet 0xd3c +#define rOFDM1_PseudoNoiseStateAB 0xd50 +#define rOFDM1_PseudoNoiseStateCD 0xd54 +#define rOFDM1_RxPseudoNoiseWgt 0xd58 +#define rOFDM_PHYCounter1 0xda0 +#define rOFDM_PHYCounter2 0xda4 +#define rOFDM_PHYCounter3 0xda8 +#define rOFDM_ShortCFOAB 0xdac +#define rOFDM_ShortCFOCD 0xdb0 +#define rOFDM_LongCFOAB 0xdb4 +#define rOFDM_LongCFOCD 0xdb8 +#define rOFDM_TailCFOAB 0xdbc +#define rOFDM_TailCFOCD 0xdc0 #define rOFDM_PWMeasure1 0xdc4 #define rOFDM_PWMeasure2 0xdc8 -#define rOFDM_BWReport 0xdcc -#define rOFDM_AGCReport 0xdd0 -#define rOFDM_RxSNR 0xdd4 -#define rOFDM_RxEVMCSI 0xdd8 -#define rOFDM_SIGReport 0xddc +#define rOFDM_BWReport 0xdcc +#define rOFDM_AGCReport 0xdd0 +#define rOFDM_RxSNR 0xdd4 +#define rOFDM_RxEVMCSI 0xdd8 +#define rOFDM_SIGReport 0xddc -#define rTxAGC_Rate18_06 0xe00 -#define rTxAGC_Rate54_24 0xe04 -#define rTxAGC_CCK_Mcs32 0xe08 -#define rTxAGC_Mcs03_Mcs00 0xe10 -#define rTxAGC_Mcs07_Mcs04 0xe14 -#define rTxAGC_Mcs11_Mcs08 0xe18 -#define rTxAGC_Mcs15_Mcs12 0xe1c +#define rTxAGC_Rate18_06 0xe00 +#define rTxAGC_Rate54_24 0xe04 +#define rTxAGC_CCK_Mcs32 0xe08 +#define rTxAGC_Mcs03_Mcs00 0xe10 +#define rTxAGC_Mcs07_Mcs04 0xe14 +#define rTxAGC_Mcs11_Mcs08 0xe18 +#define rTxAGC_Mcs15_Mcs12 0xe1c #define rZebra1_HSSIEnable 0x0 #define rZebra1_TRxEnable1 0x1 #define rZebra1_TRxEnable2 0x2 -#define rZebra1_AGC 0x4 +#define rZebra1_AGC 0x4 #define rZebra1_ChargePump 0x5 -#define rZebra1_Channel 0x7 -#define rZebra1_TxGain 0x8 -#define rZebra1_TxLPF 0x9 -#define rZebra1_RxLPF 0xb +#define rZebra1_Channel 0x7 +#define rZebra1_TxGain 0x8 +#define rZebra1_TxLPF 0x9 +#define rZebra1_RxLPF 0xb #define rZebra1_RxHPFCorner 0xc -#define rGlobalCtrl 0 -#define rRTL8256_TxLPF 19 -#define rRTL8256_RxLPF 11 +#define rGlobalCtrl 0 +#define rRTL8256_TxLPF 19 +#define rRTL8256_RxLPF 11 -#define rRTL8258_TxLPF 0x11 -#define rRTL8258_RxLPF 0x13 +#define rRTL8258_TxLPF 0x11 +#define rRTL8258_RxLPF 0x13 #define rRTL8258_RSSILPF 0xa -#define bBBResetB 0x100 -#define bGlobalResetB 0x200 -#define bOFDMTxStart 0x4 -#define bCCKTxStart 0x8 -#define bCRC32Debug 0x100 -#define bPMACLoopback 0x10 -#define bTxLSIG 0xffffff -#define bOFDMTxRate 0xf -#define bOFDMTxReserved 0x10 -#define bOFDMTxLength 0x1ffe0 -#define bOFDMTxParity 0x20000 -#define bTxHTSIG1 0xffffff -#define bTxHTMCSRate 0x7f -#define bTxHTBW 0x80 -#define bTxHTLength 0xffff00 -#define bTxHTSIG2 0xffffff -#define bTxHTSmoothing 0x1 -#define bTxHTSounding 0x2 -#define bTxHTReserved 0x4 -#define bTxHTAggreation 0x8 -#define bTxHTSTBC 0x30 -#define bTxHTAdvanceCoding 0x40 -#define bTxHTShortGI 0x80 -#define bTxHTNumberHT_LTF 0x300 -#define bTxHTCRC8 0x3fc00 -#define bCounterReset 0x10000 -#define bNumOfOFDMTx 0xffff -#define bNumOfCCKTx 0xffff0000 -#define bTxIdleInterval 0xffff -#define bOFDMService 0xffff0000 -#define bTxMACHeader 0xffffffff -#define bTxDataInit 0xff -#define bTxHTMode 0x100 -#define bTxDataType 0x30000 -#define bTxRandomSeed 0xffffffff -#define bCCKTxPreamble 0x1 -#define bCCKTxSFD 0xffff0000 -#define bCCKTxSIG 0xff -#define bCCKTxService 0xff00 -#define bCCKLengthExt 0x8000 -#define bCCKTxLength 0xffff0000 -#define bCCKTxCRC16 0xffff -#define bCCKTxStatus 0x1 -#define bOFDMTxStatus 0x2 - -#define bRFMOD 0x1 -#define bJapanMode 0x2 -#define bCCKTxSC 0x30 -#define bCCKEn 0x1000000 -#define bOFDMEn 0x2000000 -#define bOFDMRxADCPhase 0x10000 -#define bOFDMTxDACPhase 0x40000 -#define bXATxAGC 0x3f -#define bXBTxAGC 0xf00 -#define bXCTxAGC 0xf000 -#define bXDTxAGC 0xf0000 -#define bPAStart 0xf0000000 -#define bTRStart 0x00f00000 -#define bRFStart 0x0000f000 -#define bBBStart 0x000000f0 -#define bBBCCKStart 0x0000000f -#define bPAEnd 0xf -#define bTREnd 0x0f000000 -#define bRFEnd 0x000f0000 -#define bCCAMask 0x000000f0 -#define bR2RCCAMask 0x00000f00 -#define bHSSI_R2TDelay 0xf8000000 -#define bHSSI_T2RDelay 0xf80000 -#define bContTxHSSI 0x400 -#define bIGFromCCK 0x200 -#define bAGCAddress 0x3f -#define bRxHPTx 0x7000 -#define bRxHPT2R 0x38000 -#define bRxHPCCKIni 0xc0000 -#define bAGCTxCode 0xc00000 -#define bAGCRxCode 0x300000 -#define b3WireDataLength 0x800 -#define b3WireAddressLength 0x400 -#define b3WireRFPowerDown 0x1 -#define b5GPAPEPolarity 0x40000000 -#define b2GPAPEPolarity 0x80000000 -#define bRFSW_TxDefaultAnt 0x3 -#define bRFSW_TxOptionAnt 0x30 -#define bRFSW_RxDefaultAnt 0x300 -#define bRFSW_RxOptionAnt 0x3000 -#define bRFSI_3WireData 0x1 -#define bRFSI_3WireClock 0x2 -#define bRFSI_3WireLoad 0x4 -#define bRFSI_3WireRW 0x8 -#define bRFSI_3Wire 0xf -#define bRFSI_RFENV 0x10 -#define bRFSI_TRSW 0x20 -#define bRFSI_TRSWB 0x40 -#define bRFSI_ANTSW 0x100 -#define bRFSI_ANTSWB 0x200 -#define bRFSI_PAPE 0x400 -#define bRFSI_PAPE5G 0x800 -#define bBandSelect 0x1 -#define bHTSIG2_GI 0x80 -#define bHTSIG2_Smoothing 0x01 -#define bHTSIG2_Sounding 0x02 -#define bHTSIG2_Aggreaton 0x08 -#define bHTSIG2_STBC 0x30 -#define bHTSIG2_AdvCoding 0x40 +#define bBBResetB 0x100 +#define bGlobalResetB 0x200 +#define bOFDMTxStart 0x4 +#define bCCKTxStart 0x8 +#define bCRC32Debug 0x100 +#define bPMACLoopback 0x10 +#define bTxLSIG 0xffffff +#define bOFDMTxRate 0xf +#define bOFDMTxReserved 0x10 +#define bOFDMTxLength 0x1ffe0 +#define bOFDMTxParity 0x20000 +#define bTxHTSIG1 0xffffff +#define bTxHTMCSRate 0x7f +#define bTxHTBW 0x80 +#define bTxHTLength 0xffff00 +#define bTxHTSIG2 0xffffff +#define bTxHTSmoothing 0x1 +#define bTxHTSounding 0x2 +#define bTxHTReserved 0x4 +#define bTxHTAggreation 0x8 +#define bTxHTSTBC 0x30 +#define bTxHTAdvanceCoding 0x40 +#define bTxHTShortGI 0x80 +#define bTxHTNumberHT_LTF 0x300 +#define bTxHTCRC8 0x3fc00 +#define bCounterReset 0x10000 +#define bNumOfOFDMTx 0xffff +#define bNumOfCCKTx 0xffff0000 +#define bTxIdleInterval 0xffff +#define bOFDMService 0xffff0000 +#define bTxMACHeader 0xffffffff +#define bTxDataInit 0xff +#define bTxHTMode 0x100 +#define bTxDataType 0x30000 +#define bTxRandomSeed 0xffffffff +#define bCCKTxPreamble 0x1 +#define bCCKTxSFD 0xffff0000 +#define bCCKTxSIG 0xff +#define bCCKTxService 0xff00 +#define bCCKLengthExt 0x8000 +#define bCCKTxLength 0xffff0000 +#define bCCKTxCRC16 0xffff +#define bCCKTxStatus 0x1 +#define bOFDMTxStatus 0x2 + +#define bRFMOD 0x1 +#define bJapanMode 0x2 +#define bCCKTxSC 0x30 +#define bCCKEn 0x1000000 +#define bOFDMEn 0x2000000 +#define bOFDMRxADCPhase 0x10000 +#define bOFDMTxDACPhase 0x40000 +#define bXATxAGC 0x3f +#define bXBTxAGC 0xf00 +#define bXCTxAGC 0xf000 +#define bXDTxAGC 0xf0000 +#define bPAStart 0xf0000000 +#define bTRStart 0x00f00000 +#define bRFStart 0x0000f000 +#define bBBStart 0x000000f0 +#define bBBCCKStart 0x0000000f +#define bPAEnd 0xf +#define bTREnd 0x0f000000 +#define bRFEnd 0x000f0000 +#define bCCAMask 0x000000f0 +#define bR2RCCAMask 0x00000f00 +#define bHSSI_R2TDelay 0xf8000000 +#define bHSSI_T2RDelay 0xf80000 +#define bContTxHSSI 0x400 +#define bIGFromCCK 0x200 +#define bAGCAddress 0x3f +#define bRxHPTx 0x7000 +#define bRxHPT2R 0x38000 +#define bRxHPCCKIni 0xc0000 +#define bAGCTxCode 0xc00000 +#define bAGCRxCode 0x300000 +#define b3WireDataLength 0x800 +#define b3WireAddressLength 0x400 +#define b3WireRFPowerDown 0x1 +#define b5GPAPEPolarity 0x40000000 +#define b2GPAPEPolarity 0x80000000 +#define bRFSW_TxDefaultAnt 0x3 +#define bRFSW_TxOptionAnt 0x30 +#define bRFSW_RxDefaultAnt 0x300 +#define bRFSW_RxOptionAnt 0x3000 +#define bRFSI_3WireData 0x1 +#define bRFSI_3WireClock 0x2 +#define bRFSI_3WireLoad 0x4 +#define bRFSI_3WireRW 0x8 +#define bRFSI_3Wire 0xf +#define bRFSI_RFENV 0x10 +#define bRFSI_TRSW 0x20 +#define bRFSI_TRSWB 0x40 +#define bRFSI_ANTSW 0x100 +#define bRFSI_ANTSWB 0x200 +#define bRFSI_PAPE 0x400 +#define bRFSI_PAPE5G 0x800 +#define bBandSelect 0x1 +#define bHTSIG2_GI 0x80 +#define bHTSIG2_Smoothing 0x01 +#define bHTSIG2_Sounding 0x02 +#define bHTSIG2_Aggreaton 0x08 +#define bHTSIG2_STBC 0x30 +#define bHTSIG2_AdvCoding 0x40 #define bHTSIG2_NumOfHTLTF 0x300 -#define bHTSIG2_CRC8 0x3fc -#define bHTSIG1_MCS 0x7f -#define bHTSIG1_BandWidth 0x80 -#define bHTSIG1_HTLength 0xffff -#define bLSIG_Rate 0xf -#define bLSIG_Reserved 0x10 -#define bLSIG_Length 0x1fffe -#define bLSIG_Parity 0x20 -#define bCCKRxPhase 0x4 -#define bLSSIReadAddress 0x3f000000 -#define bLSSIReadEdge 0x80000000 -#define bLSSIReadBackData 0xfff -#define bLSSIReadOKFlag 0x1000 -#define bCCKSampleRate 0x8 - -#define bRegulator0Standby 0x1 -#define bRegulatorPLLStandby 0x2 -#define bRegulator1Standby 0x4 -#define bPLLPowerUp 0x8 -#define bDPLLPowerUp 0x10 -#define bDA10PowerUp 0x20 -#define bAD7PowerUp 0x200 -#define bDA6PowerUp 0x2000 -#define bXtalPowerUp 0x4000 -#define b40MDClkPowerUP 0x8000 -#define bDA6DebugMode 0x20000 -#define bDA6Swing 0x380000 -#define bADClkPhase 0x4000000 -#define b80MClkDelay 0x18000000 -#define bAFEWatchDogEnable 0x20000000 -#define bXtalCap 0x0f000000 -#define bXtalCap01 0xc0000000 -#define bXtalCap23 0x3 -#define bXtalCap92x 0x0f000000 -#define bIntDifClkEnable 0x400 -#define bExtSigClkEnable 0x800 +#define bHTSIG2_CRC8 0x3fc +#define bHTSIG1_MCS 0x7f +#define bHTSIG1_BandWidth 0x80 +#define bHTSIG1_HTLength 0xffff +#define bLSIG_Rate 0xf +#define bLSIG_Reserved 0x10 +#define bLSIG_Length 0x1fffe +#define bLSIG_Parity 0x20 +#define bCCKRxPhase 0x4 +#define bLSSIReadAddress 0x3f000000 +#define bLSSIReadEdge 0x80000000 +#define bLSSIReadBackData 0xfff +#define bLSSIReadOKFlag 0x1000 +#define bCCKSampleRate 0x8 + +#define bRegulator0Standby 0x1 +#define bRegulatorPLLStandby 0x2 +#define bRegulator1Standby 0x4 +#define bPLLPowerUp 0x8 +#define bDPLLPowerUp 0x10 +#define bDA10PowerUp 0x20 +#define bAD7PowerUp 0x200 +#define bDA6PowerUp 0x2000 +#define bXtalPowerUp 0x4000 +#define b40MDClkPowerUP 0x8000 +#define bDA6DebugMode 0x20000 +#define bDA6Swing 0x380000 +#define bADClkPhase 0x4000000 +#define b80MClkDelay 0x18000000 +#define bAFEWatchDogEnable 0x20000000 +#define bXtalCap 0x0f000000 +#define bXtalCap01 0xc0000000 +#define bXtalCap23 0x3 +#define bXtalCap92x 0x0f000000 +#define bIntDifClkEnable 0x400 +#define bExtSigClkEnable 0x800 #define bBandgapMbiasPowerUp 0x10000 -#define bAD11SHGain 0xc0000 -#define bAD11InputRange 0x700000 -#define bAD11OPCurrent 0x3800000 -#define bIPathLoopback 0x4000000 -#define bQPathLoopback 0x8000000 -#define bAFELoopback 0x10000000 -#define bDA10Swing 0x7e0 -#define bDA10Reverse 0x800 -#define bDAClkSource 0x1000 -#define bAD7InputRange 0x6000 -#define bAD7Gain 0x38000 -#define bAD7OutputCMMode 0x40000 -#define bAD7InputCMMode 0x380000 -#define bAD7Current 0xc00000 -#define bRegulatorAdjust 0x7000000 -#define bAD11PowerUpAtTx 0x1 -#define bDA10PSAtTx 0x10 -#define bAD11PowerUpAtRx 0x100 -#define bDA10PSAtRx 0x1000 - -#define bCCKRxAGCFormat 0x200 - -#define bPSDFFTSamplepPoint 0xc000 -#define bPSDAverageNum 0x3000 -#define bIQPathControl 0xc00 -#define bPSDFreq 0x3ff -#define bPSDAntennaPath 0x30 -#define bPSDIQSwitch 0x40 -#define bPSDRxTrigger 0x400000 -#define bPSDTxTrigger 0x80000000 -#define bPSDSineToneScale 0x7f000000 -#define bPSDReport 0xffff - -#define bOFDMTxSC 0x30000000 -#define bCCKTxOn 0x1 -#define bOFDMTxOn 0x2 -#define bDebugPage 0xfff -#define bDebugItem 0xff -#define bAntL 0x10 -#define bAntNonHT 0x100 -#define bAntHT1 0x1000 -#define bAntHT2 0x10000 -#define bAntHT1S1 0x100000 -#define bAntNonHTS1 0x1000000 - -#define bCCKBBMode 0x3 -#define bCCKTxPowerSaving 0x80 -#define bCCKRxPowerSaving 0x40 -#define bCCKSideBand 0x10 -#define bCCKScramble 0x8 -#define bCCKAntDiversity 0x8000 +#define bAD11SHGain 0xc0000 +#define bAD11InputRange 0x700000 +#define bAD11OPCurrent 0x3800000 +#define bIPathLoopback 0x4000000 +#define bQPathLoopback 0x8000000 +#define bAFELoopback 0x10000000 +#define bDA10Swing 0x7e0 +#define bDA10Reverse 0x800 +#define bDAClkSource 0x1000 +#define bAD7InputRange 0x6000 +#define bAD7Gain 0x38000 +#define bAD7OutputCMMode 0x40000 +#define bAD7InputCMMode 0x380000 +#define bAD7Current 0xc00000 +#define bRegulatorAdjust 0x7000000 +#define bAD11PowerUpAtTx 0x1 +#define bDA10PSAtTx 0x10 +#define bAD11PowerUpAtRx 0x100 +#define bDA10PSAtRx 0x1000 + +#define bCCKRxAGCFormat 0x200 + +#define bPSDFFTSamplepPoint 0xc000 +#define bPSDAverageNum 0x3000 +#define bIQPathControl 0xc00 +#define bPSDFreq 0x3ff +#define bPSDAntennaPath 0x30 +#define bPSDIQSwitch 0x40 +#define bPSDRxTrigger 0x400000 +#define bPSDTxTrigger 0x80000000 +#define bPSDSineToneScale 0x7f000000 +#define bPSDReport 0xffff + +#define bOFDMTxSC 0x30000000 +#define bCCKTxOn 0x1 +#define bOFDMTxOn 0x2 +#define bDebugPage 0xfff +#define bDebugItem 0xff +#define bAntL 0x10 +#define bAntNonHT 0x100 +#define bAntHT1 0x1000 +#define bAntHT2 0x10000 +#define bAntHT1S1 0x100000 +#define bAntNonHTS1 0x1000000 + +#define bCCKBBMode 0x3 +#define bCCKTxPowerSaving 0x80 +#define bCCKRxPowerSaving 0x40 +#define bCCKSideBand 0x10 +#define bCCKScramble 0x8 +#define bCCKAntDiversity 0x8000 #define bCCKCarrierRecovery 0x4000 -#define bCCKTxRate 0x3000 -#define bCCKDCCancel 0x0800 -#define bCCKISICancel 0x0400 -#define bCCKMatchFilter 0x0200 -#define bCCKEqualizer 0x0100 -#define bCCKPreambleDetect 0x800000 -#define bCCKFastFalseCCA 0x400000 -#define bCCKChEstStart 0x300000 -#define bCCKCCACount 0x080000 -#define bCCKcs_lim 0x070000 -#define bCCKBistMode 0x80000000 -#define bCCKCCAMask 0x40000000 +#define bCCKTxRate 0x3000 +#define bCCKDCCancel 0x0800 +#define bCCKISICancel 0x0400 +#define bCCKMatchFilter 0x0200 +#define bCCKEqualizer 0x0100 +#define bCCKPreambleDetect 0x800000 +#define bCCKFastFalseCCA 0x400000 +#define bCCKChEstStart 0x300000 +#define bCCKCCACount 0x080000 +#define bCCKcs_lim 0x070000 +#define bCCKBistMode 0x80000000 +#define bCCKCCAMask 0x40000000 #define bCCKTxDACPhase 0x4 #define bCCKRxADCPhase 0x20000000 #define bCCKr_cp_mode0 0x0100 -#define bCCKTxDCOffset 0xf0 -#define bCCKRxDCOffset 0xf -#define bCCKCCAMode 0xc000 -#define bCCKFalseCS_lim 0x3f00 -#define bCCKCS_ratio 0xc00000 -#define bCCKCorgBit_sel 0x300000 -#define bCCKPD_lim 0x0f0000 -#define bCCKNewCCA 0x80000000 -#define bCCKRxHPofIG 0x8000 -#define bCCKRxIG 0x7f00 -#define bCCKLNAPolarity 0x800000 -#define bCCKRx1stGain 0x7f0000 -#define bCCKRFExtend 0x20000000 -#define bCCKRxAGCSatLevel 0x1f000000 -#define bCCKRxAGCSatCount 0xe0 -#define bCCKRxRFSettle 0x1f -#define bCCKFixedRxAGC 0x8000 -#define bCCKAntennaPolarity 0x2000 -#define bCCKTxFilterType 0x0c00 +#define bCCKTxDCOffset 0xf0 +#define bCCKRxDCOffset 0xf +#define bCCKCCAMode 0xc000 +#define bCCKFalseCS_lim 0x3f00 +#define bCCKCS_ratio 0xc00000 +#define bCCKCorgBit_sel 0x300000 +#define bCCKPD_lim 0x0f0000 +#define bCCKNewCCA 0x80000000 +#define bCCKRxHPofIG 0x8000 +#define bCCKRxIG 0x7f00 +#define bCCKLNAPolarity 0x800000 +#define bCCKRx1stGain 0x7f0000 +#define bCCKRFExtend 0x20000000 +#define bCCKRxAGCSatLevel 0x1f000000 +#define bCCKRxAGCSatCount 0xe0 +#define bCCKRxRFSettle 0x1f +#define bCCKFixedRxAGC 0x8000 +#define bCCKAntennaPolarity 0x2000 +#define bCCKTxFilterType 0x0c00 #define bCCKRxAGCReportType 0x0300 -#define bCCKRxDAGCEn 0x80000000 -#define bCCKRxDAGCPeriod 0x20000000 +#define bCCKRxDAGCEn 0x80000000 +#define bCCKRxDAGCPeriod 0x20000000 #define bCCKRxDAGCSatLevel 0x1f000000 -#define bCCKTimingRecovery 0x800000 -#define bCCKTxC0 0x3f0000 -#define bCCKTxC1 0x3f000000 -#define bCCKTxC2 0x3f -#define bCCKTxC3 0x3f00 -#define bCCKTxC4 0x3f0000 -#define bCCKTxC5 0x3f000000 -#define bCCKTxC6 0x3f -#define bCCKTxC7 0x3f00 -#define bCCKDebugPort 0xff0000 -#define bCCKDACDebug 0x0f000000 -#define bCCKFalseAlarmEnable 0x8000 -#define bCCKFalseAlarmRead 0x4000 -#define bCCKTRSSI 0x7f -#define bCCKRxAGCReport 0xfe -#define bCCKRxReport_AntSel 0x80000000 -#define bCCKRxReport_MFOff 0x40000000 +#define bCCKTimingRecovery 0x800000 +#define bCCKTxC0 0x3f0000 +#define bCCKTxC1 0x3f000000 +#define bCCKTxC2 0x3f +#define bCCKTxC3 0x3f00 +#define bCCKTxC4 0x3f0000 +#define bCCKTxC5 0x3f000000 +#define bCCKTxC6 0x3f +#define bCCKTxC7 0x3f00 +#define bCCKDebugPort 0xff0000 +#define bCCKDACDebug 0x0f000000 +#define bCCKFalseAlarmEnable 0x8000 +#define bCCKFalseAlarmRead 0x4000 +#define bCCKTRSSI 0x7f +#define bCCKRxAGCReport 0xfe +#define bCCKRxReport_AntSel 0x80000000 +#define bCCKRxReport_MFOff 0x40000000 #define bCCKRxRxReport_SQLoss 0x20000000 -#define bCCKRxReport_Pktloss 0x10000000 +#define bCCKRxReport_Pktloss 0x10000000 #define bCCKRxReport_Lockedbit 0x08000000 #define bCCKRxReport_RateError 0x04000000 -#define bCCKRxReport_RxRate 0x03000000 +#define bCCKRxReport_RxRate 0x03000000 #define bCCKRxFACounterLower 0xff #define bCCKRxFACounterUpper 0xff000000 -#define bCCKRxHPAGCStart 0xe000 -#define bCCKRxHPAGCFinal 0x1c00 +#define bCCKRxHPAGCStart 0xe000 +#define bCCKRxHPAGCFinal 0x1c00 #define bCCKRxFalseAlarmEnable 0x8000 -#define bCCKFACounterFreeze 0x4000 - -#define bCCKTxPathSel 0x10000000 -#define bCCKDefaultRxPath 0xc000000 -#define bCCKOptionRxPath 0x3000000 - -#define bNumOfSTF 0x3 -#define bShift_L 0xc0 -#define bGI_TH 0xc -#define bRxPathA 0x1 -#define bRxPathB 0x2 -#define bRxPathC 0x4 -#define bRxPathD 0x8 -#define bTxPathA 0x1 -#define bTxPathB 0x2 -#define bTxPathC 0x4 -#define bTxPathD 0x8 -#define bTRSSIFreq 0x200 -#define bADCBackoff 0x3000 -#define bDFIRBackoff 0xc000 -#define bTRSSILatchPhase 0x10000 -#define bRxIDCOffset 0xff -#define bRxQDCOffset 0xff00 -#define bRxDFIRMode 0x1800000 -#define bRxDCNFType 0xe000000 -#define bRXIQImb_A 0x3ff -#define bRXIQImb_B 0xfc00 -#define bRXIQImb_C 0x3f0000 -#define bRXIQImb_D 0xffc00000 -#define bDC_dc_Notch 0x60000 -#define bRxNBINotch 0x1f000000 -#define bPD_TH 0xf -#define bPD_TH_Opt2 0xc000 -#define bPWED_TH 0x700 -#define bIfMF_Win_L 0x800 -#define bPD_Option 0x1000 -#define bMF_Win_L 0xe000 -#define bBW_Search_L 0x30000 -#define bwin_enh_L 0xc0000 -#define bBW_TH 0x700000 -#define bED_TH2 0x3800000 -#define bBW_option 0x4000000 -#define bRatio_TH 0x18000000 -#define bWindow_L 0xe0000000 -#define bSBD_Option 0x1 -#define bFrame_TH 0x1c -#define bFS_Option 0x60 -#define bDC_Slope_check 0x80 -#define bFGuard_Counter_DC_L 0xe00 -#define bFrame_Weight_Short 0x7000 -#define bSub_Tune 0xe00000 -#define bFrame_DC_Length 0xe000000 -#define bSBD_start_offset 0x30000000 -#define bFrame_TH_2 0x7 -#define bFrame_GI2_TH 0x38 -#define bGI2_Sync_en 0x40 -#define bSarch_Short_Early 0x300 -#define bSarch_Short_Late 0xc00 -#define bSarch_GI2_Late 0x70000 -#define bCFOAntSum 0x1 -#define bCFOAcc 0x2 -#define bCFOStartOffset 0xc -#define bCFOLookBack 0x70 -#define bCFOSumWeight 0x80 -#define bDAGCEnable 0x10000 -#define bTXIQImb_A 0x3ff -#define bTXIQImb_B 0xfc00 -#define bTXIQImb_C 0x3f0000 -#define bTXIQImb_D 0xffc00000 -#define bTxIDCOffset 0xff -#define bTxQDCOffset 0xff00 -#define bTxDFIRMode 0x10000 -#define bTxPesudoNoiseOn 0x4000000 -#define bTxPesudoNoise_A 0xff -#define bTxPesudoNoise_B 0xff00 -#define bTxPesudoNoise_C 0xff0000 -#define bTxPesudoNoise_D 0xff000000 -#define bCCADropOption 0x20000 -#define bCCADropThres 0xfff00000 -#define bEDCCA_H 0xf -#define bEDCCA_L 0xf0 -#define bLambda_ED 0x300 -#define bRxInitialGain 0x7f -#define bRxAntDivEn 0x80 -#define bRxAGCAddressForLNA 0x7f00 -#define bRxHighPowerFlow 0x8000 -#define bRxAGCFreezeThres 0xc0000 -#define bRxFreezeStep_AGC1 0x300000 -#define bRxFreezeStep_AGC2 0xc00000 -#define bRxFreezeStep_AGC3 0x3000000 -#define bRxFreezeStep_AGC0 0xc000000 -#define bRxRssi_Cmp_En 0x10000000 -#define bRxQuickAGCEn 0x20000000 -#define bRxAGCFreezeThresMode 0x40000000 -#define bRxOverFlowCheckType 0x80000000 -#define bRxAGCShift 0x7f -#define bTRSW_Tri_Only 0x80 -#define bPowerThres 0x300 -#define bRxAGCEn 0x1 -#define bRxAGCTogetherEn 0x2 -#define bRxAGCMin 0x4 -#define bRxHP_Ini 0x7 -#define bRxHP_TRLNA 0x70 -#define bRxHP_RSSI 0x700 -#define bRxHP_BBP1 0x7000 -#define bRxHP_BBP2 0x70000 -#define bRxHP_BBP3 0x700000 -#define bRSSI_H 0x7f0000 -#define bRSSI_Gen 0x7f000000 -#define bRxSettle_TRSW 0x7 -#define bRxSettle_LNA 0x38 -#define bRxSettle_RSSI 0x1c0 -#define bRxSettle_BBP 0xe00 -#define bRxSettle_RxHP 0x7000 -#define bRxSettle_AntSW_RSSI 0x38000 -#define bRxSettle_AntSW 0xc0000 -#define bRxProcessTime_DAGC 0x300000 -#define bRxSettle_HSSI 0x400000 -#define bRxProcessTime_BBPPW 0x800000 -#define bRxAntennaPowerShift 0x3000000 -#define bRSSITableSelect 0xc000000 -#define bRxHP_Final 0x7000000 -#define bRxHTSettle_BBP 0x7 -#define bRxHTSettle_HSSI 0x8 -#define bRxHTSettle_RxHP 0x70 -#define bRxHTSettle_BBPPW 0x80 -#define bRxHTSettle_Idle 0x300 -#define bRxHTSettle_Reserved 0x1c00 -#define bRxHTRxHPEn 0x8000 -#define bRxHTAGCFreezeThres 0x30000 -#define bRxHTAGCTogetherEn 0x40000 -#define bRxHTAGCMin 0x80000 -#define bRxHTAGCEn 0x100000 -#define bRxHTDAGCEn 0x200000 -#define bRxHTRxHP_BBP 0x1c00000 -#define bRxHTRxHP_Final 0xe0000000 -#define bRxPWRatioTH 0x3 -#define bRxPWRatioEn 0x4 -#define bRxMFHold 0x3800 -#define bRxPD_Delay_TH1 0x38 -#define bRxPD_Delay_TH2 0x1c0 -#define bRxPD_DC_COUNT_MAX 0x600 -#define bRxPD_Delay_TH 0x8000 -#define bRxProcess_Delay 0xf0000 -#define bRxSearchrange_GI2_Early 0x700000 -#define bRxFrame_Guard_Counter_L 0x3800000 -#define bRxSGI_Guard_L 0xc000000 -#define bRxSGI_Search_L 0x30000000 -#define bRxSGI_TH 0xc0000000 -#define bDFSCnt0 0xff -#define bDFSCnt1 0xff00 -#define bDFSFlag 0xf0000 - -#define bMFWeightSum 0x300000 -#define bMinIdxTH 0x7f000000 - -#define bDAFormat 0x40000 - -#define bTxChEmuEnable 0x01000000 - -#define bTRSWIsolation_A 0x7f -#define bTRSWIsolation_B 0x7f00 -#define bTRSWIsolation_C 0x7f0000 -#define bTRSWIsolation_D 0x7f000000 - -#define bExtLNAGain 0x7c00 - -#define bSTBCEn 0x4 -#define bAntennaMapping 0x10 -#define bNss 0x20 -#define bCFOAntSumD 0x200 -#define bPHYCounterReset 0x8000000 -#define bCFOReportGet 0x4000000 -#define bOFDMContinueTx 0x10000000 -#define bOFDMSingleCarrier 0x20000000 -#define bOFDMSingleTone 0x40000000 -#define bHTDetect 0x100 -#define bCFOEn 0x10000 -#define bCFOValue 0xfff00000 -#define bSigTone_Re 0x3f -#define bSigTone_Im 0x7f00 -#define bCounter_CCA 0xffff -#define bCounter_ParityFail 0xffff0000 -#define bCounter_RateIllegal 0xffff -#define bCounter_CRC8Fail 0xffff0000 -#define bCounter_MCSNoSupport 0xffff -#define bCounter_FastSync 0xffff -#define bShortCFO 0xfff -#define bShortCFOTLength 12 -#define bShortCFOFLength 11 -#define bLongCFO 0x7ff -#define bLongCFOTLength 11 -#define bLongCFOFLength 11 -#define bTailCFO 0x1fff -#define bTailCFOTLength 13 -#define bTailCFOFLength 12 - -#define bmax_en_pwdB 0xffff -#define bCC_power_dB 0xffff0000 -#define bnoise_pwdB 0xffff -#define bPowerMeasTLength 10 -#define bPowerMeasFLength 3 -#define bRx_HT_BW 0x1 -#define bRxSC 0x6 -#define bRx_HT 0x8 - -#define bNB_intf_det_on 0x1 -#define bIntf_win_len_cfg 0x30 -#define bNB_Intf_TH_cfg 0x1c0 - -#define bRFGain 0x3f -#define bTableSel 0x40 -#define bTRSW 0x80 - -#define bRxSNR_A 0xff -#define bRxSNR_B 0xff00 -#define bRxSNR_C 0xff0000 -#define bRxSNR_D 0xff000000 -#define bSNREVMTLength 8 -#define bSNREVMFLength 1 - -#define bCSI1st 0xff -#define bCSI2nd 0xff00 -#define bRxEVM1st 0xff0000 -#define bRxEVM2nd 0xff000000 - -#define bSIGEVM 0xff -#define bPWDB 0xff00 -#define bSGIEN 0x10000 - -#define bSFactorQAM1 0xf -#define bSFactorQAM2 0xf0 -#define bSFactorQAM3 0xf00 -#define bSFactorQAM4 0xf000 -#define bSFactorQAM5 0xf0000 -#define bSFactorQAM6 0xf0000 -#define bSFactorQAM7 0xf00000 -#define bSFactorQAM8 0xf000000 -#define bSFactorQAM9 0xf0000000 -#define bCSIScheme 0x100000 - -#define bNoiseLvlTopSet 0x3 -#define bChSmooth 0x4 -#define bChSmoothCfg1 0x38 -#define bChSmoothCfg2 0x1c0 -#define bChSmoothCfg3 0xe00 -#define bChSmoothCfg4 0x7000 -#define bMRCMode 0x800000 -#define bTHEVMCfg 0x7000000 - -#define bLoopFitType 0x1 -#define bUpdCFO 0x40 -#define bUpdCFOOffData 0x80 -#define bAdvUpdCFO 0x100 -#define bAdvTimeCtrl 0x800 -#define bUpdClko 0x1000 -#define bFC 0x6000 -#define bTrackingMode 0x8000 -#define bPhCmpEnable 0x10000 -#define bUpdClkoLTF 0x20000 -#define bComChCFO 0x40000 -#define bCSIEstiMode 0x80000 -#define bAdvUpdEqz 0x100000 -#define bUChCfg 0x7000000 -#define bUpdEqz 0x8000000 - -#define bTxAGCRate18_06 0x7f7f7f7f -#define bTxAGCRate54_24 0x7f7f7f7f +#define bCCKFACounterFreeze 0x4000 + +#define bCCKTxPathSel 0x10000000 +#define bCCKDefaultRxPath 0xc000000 +#define bCCKOptionRxPath 0x3000000 + +#define bNumOfSTF 0x3 +#define bShift_L 0xc0 +#define bGI_TH 0xc +#define bRxPathA 0x1 +#define bRxPathB 0x2 +#define bRxPathC 0x4 +#define bRxPathD 0x8 +#define bTxPathA 0x1 +#define bTxPathB 0x2 +#define bTxPathC 0x4 +#define bTxPathD 0x8 +#define bTRSSIFreq 0x200 +#define bADCBackoff 0x3000 +#define bDFIRBackoff 0xc000 +#define bTRSSILatchPhase 0x10000 +#define bRxIDCOffset 0xff +#define bRxQDCOffset 0xff00 +#define bRxDFIRMode 0x1800000 +#define bRxDCNFType 0xe000000 +#define bRXIQImb_A 0x3ff +#define bRXIQImb_B 0xfc00 +#define bRXIQImb_C 0x3f0000 +#define bRXIQImb_D 0xffc00000 +#define bDC_dc_Notch 0x60000 +#define bRxNBINotch 0x1f000000 +#define bPD_TH 0xf +#define bPD_TH_Opt2 0xc000 +#define bPWED_TH 0x700 +#define bIfMF_Win_L 0x800 +#define bPD_Option 0x1000 +#define bMF_Win_L 0xe000 +#define bBW_Search_L 0x30000 +#define bwin_enh_L 0xc0000 +#define bBW_TH 0x700000 +#define bED_TH2 0x3800000 +#define bBW_option 0x4000000 +#define bRatio_TH 0x18000000 +#define bWindow_L 0xe0000000 +#define bSBD_Option 0x1 +#define bFrame_TH 0x1c +#define bFS_Option 0x60 +#define bDC_Slope_check 0x80 +#define bFGuard_Counter_DC_L 0xe00 +#define bFrame_Weight_Short 0x7000 +#define bSub_Tune 0xe00000 +#define bFrame_DC_Length 0xe000000 +#define bSBD_start_offset 0x30000000 +#define bFrame_TH_2 0x7 +#define bFrame_GI2_TH 0x38 +#define bGI2_Sync_en 0x40 +#define bSarch_Short_Early 0x300 +#define bSarch_Short_Late 0xc00 +#define bSarch_GI2_Late 0x70000 +#define bCFOAntSum 0x1 +#define bCFOAcc 0x2 +#define bCFOStartOffset 0xc +#define bCFOLookBack 0x70 +#define bCFOSumWeight 0x80 +#define bDAGCEnable 0x10000 +#define bTXIQImb_A 0x3ff +#define bTXIQImb_B 0xfc00 +#define bTXIQImb_C 0x3f0000 +#define bTXIQImb_D 0xffc00000 +#define bTxIDCOffset 0xff +#define bTxQDCOffset 0xff00 +#define bTxDFIRMode 0x10000 +#define bTxPesudoNoiseOn 0x4000000 +#define bTxPesudoNoise_A 0xff +#define bTxPesudoNoise_B 0xff00 +#define bTxPesudoNoise_C 0xff0000 +#define bTxPesudoNoise_D 0xff000000 +#define bCCADropOption 0x20000 +#define bCCADropThres 0xfff00000 +#define bEDCCA_H 0xf +#define bEDCCA_L 0xf0 +#define bLambda_ED 0x300 +#define bRxInitialGain 0x7f +#define bRxAntDivEn 0x80 +#define bRxAGCAddressForLNA 0x7f00 +#define bRxHighPowerFlow 0x8000 +#define bRxAGCFreezeThres 0xc0000 +#define bRxFreezeStep_AGC1 0x300000 +#define bRxFreezeStep_AGC2 0xc00000 +#define bRxFreezeStep_AGC3 0x3000000 +#define bRxFreezeStep_AGC0 0xc000000 +#define bRxRssi_Cmp_En 0x10000000 +#define bRxQuickAGCEn 0x20000000 +#define bRxAGCFreezeThresMode 0x40000000 +#define bRxOverFlowCheckType 0x80000000 +#define bRxAGCShift 0x7f +#define bTRSW_Tri_Only 0x80 +#define bPowerThres 0x300 +#define bRxAGCEn 0x1 +#define bRxAGCTogetherEn 0x2 +#define bRxAGCMin 0x4 +#define bRxHP_Ini 0x7 +#define bRxHP_TRLNA 0x70 +#define bRxHP_RSSI 0x700 +#define bRxHP_BBP1 0x7000 +#define bRxHP_BBP2 0x70000 +#define bRxHP_BBP3 0x700000 +#define bRSSI_H 0x7f0000 +#define bRSSI_Gen 0x7f000000 +#define bRxSettle_TRSW 0x7 +#define bRxSettle_LNA 0x38 +#define bRxSettle_RSSI 0x1c0 +#define bRxSettle_BBP 0xe00 +#define bRxSettle_RxHP 0x7000 +#define bRxSettle_AntSW_RSSI 0x38000 +#define bRxSettle_AntSW 0xc0000 +#define bRxProcessTime_DAGC 0x300000 +#define bRxSettle_HSSI 0x400000 +#define bRxProcessTime_BBPPW 0x800000 +#define bRxAntennaPowerShift 0x3000000 +#define bRSSITableSelect 0xc000000 +#define bRxHP_Final 0x7000000 +#define bRxHTSettle_BBP 0x7 +#define bRxHTSettle_HSSI 0x8 +#define bRxHTSettle_RxHP 0x70 +#define bRxHTSettle_BBPPW 0x80 +#define bRxHTSettle_Idle 0x300 +#define bRxHTSettle_Reserved 0x1c00 +#define bRxHTRxHPEn 0x8000 +#define bRxHTAGCFreezeThres 0x30000 +#define bRxHTAGCTogetherEn 0x40000 +#define bRxHTAGCMin 0x80000 +#define bRxHTAGCEn 0x100000 +#define bRxHTDAGCEn 0x200000 +#define bRxHTRxHP_BBP 0x1c00000 +#define bRxHTRxHP_Final 0xe0000000 +#define bRxPWRatioTH 0x3 +#define bRxPWRatioEn 0x4 +#define bRxMFHold 0x3800 +#define bRxPD_Delay_TH1 0x38 +#define bRxPD_Delay_TH2 0x1c0 +#define bRxPD_DC_COUNT_MAX 0x600 +#define bRxPD_Delay_TH 0x8000 +#define bRxProcess_Delay 0xf0000 +#define bRxSearchrange_GI2_Early 0x700000 +#define bRxFrame_Guard_Counter_L 0x3800000 +#define bRxSGI_Guard_L 0xc000000 +#define bRxSGI_Search_L 0x30000000 +#define bRxSGI_TH 0xc0000000 +#define bDFSCnt0 0xff +#define bDFSCnt1 0xff00 +#define bDFSFlag 0xf0000 + +#define bMFWeightSum 0x300000 +#define bMinIdxTH 0x7f000000 + +#define bDAFormat 0x40000 + +#define bTxChEmuEnable 0x01000000 + +#define bTRSWIsolation_A 0x7f +#define bTRSWIsolation_B 0x7f00 +#define bTRSWIsolation_C 0x7f0000 +#define bTRSWIsolation_D 0x7f000000 + +#define bExtLNAGain 0x7c00 + +#define bSTBCEn 0x4 +#define bAntennaMapping 0x10 +#define bNss 0x20 +#define bCFOAntSumD 0x200 +#define bPHYCounterReset 0x8000000 +#define bCFOReportGet 0x4000000 +#define bOFDMContinueTx 0x10000000 +#define bOFDMSingleCarrier 0x20000000 +#define bOFDMSingleTone 0x40000000 +#define bHTDetect 0x100 +#define bCFOEn 0x10000 +#define bCFOValue 0xfff00000 +#define bSigTone_Re 0x3f +#define bSigTone_Im 0x7f00 +#define bCounter_CCA 0xffff +#define bCounter_ParityFail 0xffff0000 +#define bCounter_RateIllegal 0xffff +#define bCounter_CRC8Fail 0xffff0000 +#define bCounter_MCSNoSupport 0xffff +#define bCounter_FastSync 0xffff +#define bShortCFO 0xfff +#define bShortCFOTLength 12 +#define bShortCFOFLength 11 +#define bLongCFO 0x7ff +#define bLongCFOTLength 11 +#define bLongCFOFLength 11 +#define bTailCFO 0x1fff +#define bTailCFOTLength 13 +#define bTailCFOFLength 12 + +#define bmax_en_pwdB 0xffff +#define bCC_power_dB 0xffff0000 +#define bnoise_pwdB 0xffff +#define bPowerMeasTLength 10 +#define bPowerMeasFLength 3 +#define bRx_HT_BW 0x1 +#define bRxSC 0x6 +#define bRx_HT 0x8 + +#define bNB_intf_det_on 0x1 +#define bIntf_win_len_cfg 0x30 +#define bNB_Intf_TH_cfg 0x1c0 + +#define bRFGain 0x3f +#define bTableSel 0x40 +#define bTRSW 0x80 + +#define bRxSNR_A 0xff +#define bRxSNR_B 0xff00 +#define bRxSNR_C 0xff0000 +#define bRxSNR_D 0xff000000 +#define bSNREVMTLength 8 +#define bSNREVMFLength 1 + +#define bCSI1st 0xff +#define bCSI2nd 0xff00 +#define bRxEVM1st 0xff0000 +#define bRxEVM2nd 0xff000000 + +#define bSIGEVM 0xff +#define bPWDB 0xff00 +#define bSGIEN 0x10000 + +#define bSFactorQAM1 0xf +#define bSFactorQAM2 0xf0 +#define bSFactorQAM3 0xf00 +#define bSFactorQAM4 0xf000 +#define bSFactorQAM5 0xf0000 +#define bSFactorQAM6 0xf0000 +#define bSFactorQAM7 0xf00000 +#define bSFactorQAM8 0xf000000 +#define bSFactorQAM9 0xf0000000 +#define bCSIScheme 0x100000 + +#define bNoiseLvlTopSet 0x3 +#define bChSmooth 0x4 +#define bChSmoothCfg1 0x38 +#define bChSmoothCfg2 0x1c0 +#define bChSmoothCfg3 0xe00 +#define bChSmoothCfg4 0x7000 +#define bMRCMode 0x800000 +#define bTHEVMCfg 0x7000000 + +#define bLoopFitType 0x1 +#define bUpdCFO 0x40 +#define bUpdCFOOffData 0x80 +#define bAdvUpdCFO 0x100 +#define bAdvTimeCtrl 0x800 +#define bUpdClko 0x1000 +#define bFC 0x6000 +#define bTrackingMode 0x8000 +#define bPhCmpEnable 0x10000 +#define bUpdClkoLTF 0x20000 +#define bComChCFO 0x40000 +#define bCSIEstiMode 0x80000 +#define bAdvUpdEqz 0x100000 +#define bUChCfg 0x7000000 +#define bUpdEqz 0x8000000 + +#define bTxAGCRate18_06 0x7f7f7f7f +#define bTxAGCRate54_24 0x7f7f7f7f #define bTxAGCRateMCS32 0x7f -#define bTxAGCRateCCK 0x7f00 +#define bTxAGCRateCCK 0x7f00 #define bTxAGCRateMCS3_MCS0 0x7f7f7f7f #define bTxAGCRateMCS7_MCS4 0x7f7f7f7f #define bTxAGCRateMCS11_MCS8 0x7f7f7f7f #define bTxAGCRateMCS15_MCS12 0x7f7f7f7f -#define bRxPesudoNoiseOn 0x20000000 -#define bRxPesudoNoise_A 0xff -#define bRxPesudoNoise_B 0xff00 -#define bRxPesudoNoise_C 0xff0000 -#define bRxPesudoNoise_D 0xff000000 -#define bPesudoNoiseState_A 0xffff -#define bPesudoNoiseState_B 0xffff0000 -#define bPesudoNoiseState_C 0xffff -#define bPesudoNoiseState_D 0xffff0000 - -#define bZebra1_HSSIEnable 0x8 -#define bZebra1_TRxControl 0xc00 -#define bZebra1_TRxGainSetting 0x07f -#define bZebra1_RxCorner 0xc00 -#define bZebra1_TxChargePump 0x38 -#define bZebra1_RxChargePump 0x7 -#define bZebra1_ChannelNum 0xf80 -#define bZebra1_TxLPFBW 0x400 -#define bZebra1_RxLPFBW 0x600 - -#define bRTL8256RegModeCtrl1 0x100 -#define bRTL8256RegModeCtrl0 0x40 -#define bRTL8256_TxLPFBW 0x18 -#define bRTL8256_RxLPFBW 0x600 - -#define bRTL8258_TxLPFBW 0xc -#define bRTL8258_RxLPFBW 0xc00 -#define bRTL8258_RSSILPFBW 0xc0 - -#define bByte0 0x1 -#define bByte1 0x2 -#define bByte2 0x4 -#define bByte3 0x8 -#define bWord0 0x3 -#define bWord1 0xc -#define bDWord 0xf - -#define bMaskByte0 0xff -#define bMaskByte1 0xff00 -#define bMaskByte2 0xff0000 -#define bMaskByte3 0xff000000 -#define bMaskHWord 0xffff0000 -#define bMaskLWord 0x0000ffff -#define bMaskDWord 0xffffffff - -#define bMask12Bits 0xfff - -#define bEnable 0x1 -#define bDisable 0x0 - -#define LeftAntenna 0x0 -#define RightAntenna 0x1 - -#define tCheckTxStatus 500 -#define tUpdateRxCounter 100 - -#define rateCCK 0 -#define rateOFDM 1 -#define rateHT 2 - -#define bPMAC_End 0x1ff -#define bFPGAPHY0_End 0x8ff -#define bFPGAPHY1_End 0x9ff -#define bCCKPHY0_End 0xaff -#define bOFDMPHY0_End 0xcff -#define bOFDMPHY1_End 0xdff - - -#define bPMACControl 0x0 -#define bWMACControl 0x1 -#define bWNICControl 0x2 - -#define PathA 0x0 -#define PathB 0x1 -#define PathC 0x2 -#define PathD 0x3 - -#define rRTL8256RxMixerPole 0xb -#define bZebraRxMixerPole 0x6 -#define rRTL8256TxBBOPBias 0x9 -#define bRTL8256TxBBOPBias 0x400 -#define rRTL8256TxBBBW 19 -#define bRTL8256TxBBBW 0x18 +#define bRxPesudoNoiseOn 0x20000000 +#define bRxPesudoNoise_A 0xff +#define bRxPesudoNoise_B 0xff00 +#define bRxPesudoNoise_C 0xff0000 +#define bRxPesudoNoise_D 0xff000000 +#define bPesudoNoiseState_A 0xffff +#define bPesudoNoiseState_B 0xffff0000 +#define bPesudoNoiseState_C 0xffff +#define bPesudoNoiseState_D 0xffff0000 + +#define bZebra1_HSSIEnable 0x8 +#define bZebra1_TRxControl 0xc00 +#define bZebra1_TRxGainSetting 0x07f +#define bZebra1_RxCorner 0xc00 +#define bZebra1_TxChargePump 0x38 +#define bZebra1_RxChargePump 0x7 +#define bZebra1_ChannelNum 0xf80 +#define bZebra1_TxLPFBW 0x400 +#define bZebra1_RxLPFBW 0x600 + +#define bRTL8256RegModeCtrl1 0x100 +#define bRTL8256RegModeCtrl0 0x40 +#define bRTL8256_TxLPFBW 0x18 +#define bRTL8256_RxLPFBW 0x600 + +#define bRTL8258_TxLPFBW 0xc +#define bRTL8258_RxLPFBW 0xc00 +#define bRTL8258_RSSILPFBW 0xc0 + +#define bByte0 0x1 +#define bByte1 0x2 +#define bByte2 0x4 +#define bByte3 0x8 +#define bWord0 0x3 +#define bWord1 0xc +#define bDWord 0xf + +#define bMaskByte0 0xff +#define bMaskByte1 0xff00 +#define bMaskByte2 0xff0000 +#define bMaskByte3 0xff000000 +#define bMaskHWord 0xffff0000 +#define bMaskLWord 0x0000ffff +#define bMaskDWord 0xffffffff + +#define bMask12Bits 0xfff + +#define bEnable 0x1 +#define bDisable 0x0 + +#define LeftAntenna 0x0 +#define RightAntenna 0x1 + +#define tCheckTxStatus 500 +#define tUpdateRxCounter 100 + +#define rateCCK 0 +#define rateOFDM 1 +#define rateHT 2 + +#define bPMAC_End 0x1ff +#define bFPGAPHY0_End 0x8ff +#define bFPGAPHY1_End 0x9ff +#define bCCKPHY0_End 0xaff +#define bOFDMPHY0_End 0xcff +#define bOFDMPHY1_End 0xdff + + +#define bPMACControl 0x0 +#define bWMACControl 0x1 +#define bWNICControl 0x2 + +#define PathA 0x0 +#define PathB 0x1 +#define PathC 0x2 +#define PathD 0x3 + +#define rRTL8256RxMixerPole 0xb +#define bZebraRxMixerPole 0x6 +#define rRTL8256TxBBOPBias 0x9 +#define bRTL8256TxBBOPBias 0x400 +#define rRTL8256TxBBBW 19 +#define bRTL8256TxBBBW 0x18 #endif -- 1.8.4.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/8] staging: rtl8192e: Copy comments from r819XE_phyreg.h to r8192E_phyreg.h 2015-04-07 23:08 [PATCH 0/8] staging: rtl8192e: Fix more checkpatch.pl warnings Mateusz Kulikowski 2015-04-07 23:08 ` [PATCH 1/8] staging: rtl8192e: Fix SPACE_BEFORE_TAB warnings Mateusz Kulikowski @ 2015-04-07 23:08 ` Mateusz Kulikowski 2015-04-07 23:08 ` [PATCH 3/8] staging: rtl8192e: remove r819xE_phyreg.h Mateusz Kulikowski ` (6 subsequent siblings) 8 siblings, 0 replies; 10+ messages in thread From: Mateusz Kulikowski @ 2015-04-07 23:08 UTC (permalink / raw) To: gregkh; +Cc: Mateusz Kulikowski, devel, linux-kernel Both files have the same contents (with the exception of comments). One of them will not survive future commits. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> --- drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h | 92 ++++++++++++++++------- 1 file changed, 65 insertions(+), 27 deletions(-) diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h b/drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h index d080876..8a1d91e 100644 --- a/drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h +++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h @@ -53,10 +53,10 @@ #define MCS_TXAGC 0x340 #define CCK_TXAGC 0x348 -/*---------------------0x400~0x4ff----------------------*/ +/* Mac block on/off control register */ #define MacBlkCtrl 0x403 -#define rFPGA0_RFMOD 0x800 +#define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC */ #define rFPGA0_TxInfo 0x804 #define rFPGA0_PSDFunction 0x808 #define rFPGA0_TxGainStage 0x80c @@ -98,6 +98,7 @@ #define rFPGA0_XAB_RFInterfaceRB 0x8e0 #define rFPGA0_XCD_RFInterfaceRB 0x8e4 +/* Page 9 - RF mode & OFDM TxSC */ #define rFPGA1_RFMOD 0x900 #define rFPGA1_TxBlock 0x904 #define rFPGA1_DebugSelect 0x908 @@ -106,14 +107,16 @@ #define rCCK0_System 0xa00 #define rCCK0_AFESetting 0xa04 #define rCCK0_CCA 0xa08 +/* AGC default value, saturation level */ #define rCCK0_RxAGC1 0xa0c -#define rCCK0_RxAGC2 0xa10 +#define rCCK0_RxAGC2 0xa10 /* AGC & DAGC */ #define rCCK0_RxHP 0xa14 +/* Timing recovery & channel estimation threshold */ #define rCCK0_DSPParameter1 0xa18 -#define rCCK0_DSPParameter2 0xa1c +#define rCCK0_DSPParameter2 0xa1c /* SQ threshold */ #define rCCK0_TxFilter1 0xa20 #define rCCK0_TxFilter2 0xa24 -#define rCCK0_DebugPort 0xa28 +#define rCCK0_DebugPort 0xa28 /* Debug port and TX filter 3 */ #define rCCK0_FalseAlarmReport 0xa2c #define rCCK0_TRSSIReport 0xa50 #define rCCK0_RxReport 0xa54 @@ -124,22 +127,24 @@ #define rOFDM0_TRxPathEnable 0xc04 #define rOFDM0_TRMuxPar 0xc08 #define rOFDM0_TRSWIsolation 0xc0c +/* RxIQ DC offset, Rx digital filter, DC notch filter */ #define rOFDM0_XARxAFE 0xc10 -#define rOFDM0_XARxIQImbalance 0xc14 +#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imbalance matrix */ #define rOFDM0_XBRxAFE 0xc18 #define rOFDM0_XBRxIQImbalance 0xc1c #define rOFDM0_XCRxAFE 0xc20 #define rOFDM0_XCRxIQImbalance 0xc24 #define rOFDM0_XDRxAFE 0xc28 #define rOFDM0_XDRxIQImbalance 0xc2c -#define rOFDM0_RxDetector1 0xc30 -#define rOFDM0_RxDetector2 0xc34 -#define rOFDM0_RxDetector3 0xc38 +#define rOFDM0_RxDetector1 0xc30 /* PD, BW & SBD */ +#define rOFDM0_RxDetector2 0xc34 /* SBD */ +#define rOFDM0_RxDetector3 0xc38 /* Frame Sync */ +/* PD, SBD, Frame Sync & Short-GI */ #define rOFDM0_RxDetector4 0xc3c -#define rOFDM0_RxDSP 0xc40 -#define rOFDM0_CFOandDAGC 0xc44 +#define rOFDM0_RxDSP 0xc40 /* Rx Sync Path */ +#define rOFDM0_CFOandDAGC 0xc44 /* CFO & DAGC */ #define rOFDM0_CCADropThreshold 0xc48 -#define rOFDM0_ECCAThreshold 0xc4c +#define rOFDM0_ECCAThreshold 0xc4c /* Energy CCA */ #define rOFDM0_XAAGCCore1 0xc50 #define rOFDM0_XAAGCCore2 0xc54 #define rOFDM0_XBAGCCore1 0xc58 @@ -184,9 +189,9 @@ #define rOFDM1_PseudoNoiseStateAB 0xd50 #define rOFDM1_PseudoNoiseStateCD 0xd54 #define rOFDM1_RxPseudoNoiseWgt 0xd58 -#define rOFDM_PHYCounter1 0xda0 -#define rOFDM_PHYCounter2 0xda4 -#define rOFDM_PHYCounter3 0xda8 +#define rOFDM_PHYCounter1 0xda0 /* cca, parity fail */ +#define rOFDM_PHYCounter2 0xda4 /* rate illegal, crc8 fail */ +#define rOFDM_PHYCounter3 0xda8 /* MCS not supported */ #define rOFDM_ShortCFOAB 0xdac #define rOFDM_ShortCFOCD 0xdb0 #define rOFDM_LongCFOAB 0xdb4 @@ -221,14 +226,17 @@ #define rZebra1_RxLPF 0xb #define rZebra1_RxHPFCorner 0xc +/* Zebra 4 */ #define rGlobalCtrl 0 #define rRTL8256_TxLPF 19 #define rRTL8256_RxLPF 11 +/* RTL8258 */ #define rRTL8258_TxLPF 0x11 #define rRTL8258_RxLPF 0x13 #define rRTL8258_RSSILPF 0xa +/* Bit Mask - Page 1*/ #define bBBResetB 0x100 #define bGlobalResetB 0x200 #define bOFDMTxStart 0x4 @@ -273,7 +281,7 @@ #define bCCKTxCRC16 0xffff #define bCCKTxStatus 0x1 #define bOFDMTxStatus 0x2 - +/* Bit Mask - Page 8 */ #define bRFMOD 0x1 #define bJapanMode 0x2 #define bCCKTxSC 0x30 @@ -290,13 +298,16 @@ #define bRFStart 0x0000f000 #define bBBStart 0x000000f0 #define bBBCCKStart 0x0000000f +/* Bit Mask - rFPGA0_RFTiming2 */ #define bPAEnd 0xf #define bTREnd 0x0f000000 #define bRFEnd 0x000f0000 +/* T2R */ #define bCCAMask 0x000000f0 #define bR2RCCAMask 0x00000f00 #define bHSSI_R2TDelay 0xf8000000 #define bHSSI_T2RDelay 0xf80000 +/* Channel gain at continue TX. */ #define bContTxHSSI 0x400 #define bIGFromCCK 0x200 #define bAGCAddress 0x3f @@ -308,6 +319,7 @@ #define b3WireDataLength 0x800 #define b3WireAddressLength 0x400 #define b3WireRFPowerDown 0x1 +/*#define bHWSISelect 0x8 */ #define b5GPAPEPolarity 0x40000000 #define b2GPAPEPolarity 0x80000000 #define bRFSW_TxDefaultAnt 0x3 @@ -318,6 +330,7 @@ #define bRFSI_3WireClock 0x2 #define bRFSI_3WireLoad 0x4 #define bRFSI_3WireRW 0x8 +/* 3-wire total control */ #define bRFSI_3Wire 0xf #define bRFSI_RFENV 0x10 #define bRFSI_TRSW 0x20 @@ -343,11 +356,11 @@ #define bLSIG_Length 0x1fffe #define bLSIG_Parity 0x20 #define bCCKRxPhase 0x4 -#define bLSSIReadAddress 0x3f000000 -#define bLSSIReadEdge 0x80000000 +#define bLSSIReadAddress 0x3f000000 /* LSSI "read" address */ +#define bLSSIReadEdge 0x80000000 /* LSSI "read" edge signal */ #define bLSSIReadBackData 0xfff #define bLSSIReadOKFlag 0x1000 -#define bCCKSampleRate 0x8 +#define bCCKSampleRate 0x8 /* 0: 44 MHz, 1: 88MHz */ #define bRegulator0Standby 0x1 #define bRegulatorPLLStandby 0x2 @@ -404,10 +417,13 @@ #define bPSDSineToneScale 0x7f000000 #define bPSDReport 0xffff +/* Page 8 */ #define bOFDMTxSC 0x30000000 #define bCCKTxOn 0x1 #define bOFDMTxOn 0x2 +/* Reset debug page and also HWord, LWord */ #define bDebugPage 0xfff +/* Reset debug page and LWord */ #define bDebugItem 0xff #define bAntL 0x10 #define bAntNonHT 0x100 @@ -416,6 +432,7 @@ #define bAntHT1S1 0x100000 #define bAntNonHTS1 0x1000000 +/* Page a */ #define bCCKBBMode 0x3 #define bCCKTxPowerSaving 0x80 #define bCCKRxPowerSaving 0x40 @@ -436,7 +453,7 @@ #define bCCKBistMode 0x80000000 #define bCCKCCAMask 0x40000000 #define bCCKTxDACPhase 0x4 -#define bCCKRxADCPhase 0x20000000 +#define bCCKRxADCPhase 0x20000000 /* r_rx_clk */ #define bCCKr_cp_mode0 0x0100 #define bCCKTxDCOffset 0xf0 #define bCCKRxDCOffset 0xf @@ -450,11 +467,14 @@ #define bCCKRxIG 0x7f00 #define bCCKLNAPolarity 0x800000 #define bCCKRx1stGain 0x7f0000 +/* CCK Rx Initial gain polarity */ #define bCCKRFExtend 0x20000000 #define bCCKRxAGCSatLevel 0x1f000000 #define bCCKRxAGCSatCount 0xe0 +/* AGCSAmp_dly */ #define bCCKRxRFSettle 0x1f #define bCCKFixedRxAGC 0x8000 +/*#define bCCKRxAGCFormat 0x4000 remove to HSSI register 0x824 */ #define bCCKAntennaPolarity 0x2000 #define bCCKTxFilterType 0x0c00 #define bCCKRxAGCReportType 0x0300 @@ -495,6 +515,7 @@ #define bCCKDefaultRxPath 0xc000000 #define bCCKOptionRxPath 0x3000000 +/* Page c */ #define bNumOfSTF 0x3 #define bShift_L 0xc0 #define bGI_TH 0xc @@ -596,7 +617,9 @@ #define bRxHP_BBP1 0x7000 #define bRxHP_BBP2 0x70000 #define bRxHP_BBP3 0x700000 +/* The threshold for high power */ #define bRSSI_H 0x7f0000 +/* The threshold for ant diversity */ #define bRSSI_Gen 0x7f000000 #define bRxSettle_TRSW 0x7 #define bRxSettle_LNA 0x38 @@ -631,6 +654,7 @@ #define bRxPD_Delay_TH1 0x38 #define bRxPD_Delay_TH2 0x1c0 #define bRxPD_DC_COUNT_MAX 0x600 +/*#define bRxMF_Hold 0x3800*/ #define bRxPD_Delay_TH 0x8000 #define bRxProcess_Delay 0xf0000 #define bRxSearchrange_GI2_Early 0x700000 @@ -656,6 +680,7 @@ #define bExtLNAGain 0x7c00 +/* Page d */ #define bSTBCEn 0x4 #define bAntennaMapping 0x10 #define bNss 0x20 @@ -665,6 +690,13 @@ #define bOFDMContinueTx 0x10000000 #define bOFDMSingleCarrier 0x20000000 #define bOFDMSingleTone 0x40000000 +/* #define bRxPath1 0x01 + * #define bRxPath2 0x02 + * #define bRxPath3 0x04 + * #define bRxPath4 0x08 + * #define bTxPath1 0x10 + * #define bTxPath2 0x20 +*/ #define bHTDetect 0x100 #define bCFOEn 0x10000 #define bCFOValue 0xfff00000 @@ -677,8 +709,8 @@ #define bCounter_MCSNoSupport 0xffff #define bCounter_FastSync 0xffff #define bShortCFO 0xfff -#define bShortCFOTLength 12 -#define bShortCFOFLength 11 +#define bShortCFOTLength 12 /* total */ +#define bShortCFOFLength 11 /* fraction */ #define bLongCFO 0x7ff #define bLongCFOTLength 11 #define bLongCFOFLength 11 @@ -755,6 +787,7 @@ #define bUChCfg 0x7000000 #define bUpdEqz 0x8000000 +/* Page e */ #define bTxAGCRate18_06 0x7f7f7f7f #define bTxAGCRate54_24 0x7f7f7f7f #define bTxAGCRateMCS32 0x7f @@ -764,8 +797,7 @@ #define bTxAGCRateMCS11_MCS8 0x7f7f7f7f #define bTxAGCRateMCS15_MCS12 0x7f7f7f7f - -#define bRxPesudoNoiseOn 0x20000000 +#define bRxPesudoNoiseOn 0x20000000 /* Rx Pseduo noise */ #define bRxPesudoNoise_A 0xff #define bRxPesudoNoise_B 0xff00 #define bRxPesudoNoise_C 0xff0000 @@ -775,6 +807,7 @@ #define bPesudoNoiseState_C 0xffff #define bPesudoNoiseState_D 0xffff0000 +/* RF Zebra 1 */ #define bZebra1_HSSIEnable 0x8 #define bZebra1_TRxControl 0xc00 #define bZebra1_TRxGainSetting 0x07f @@ -785,15 +818,18 @@ #define bZebra1_TxLPFBW 0x400 #define bZebra1_RxLPFBW 0x600 +/* Zebra4 */ #define bRTL8256RegModeCtrl1 0x100 #define bRTL8256RegModeCtrl0 0x40 #define bRTL8256_TxLPFBW 0x18 #define bRTL8256_RxLPFBW 0x600 +/* RTL8258 */ #define bRTL8258_TxLPFBW 0xc #define bRTL8258_RxLPFBW 0xc00 #define bRTL8258_RSSILPFBW 0xc0 +/* byte enable for sb_write */ #define bByte0 0x1 #define bByte1 0x2 #define bByte2 0x4 @@ -802,6 +838,7 @@ #define bWord1 0xc #define bDWord 0xf +/* for PutRegsetting & GetRegSetting BitMask */ #define bMaskByte0 0xff #define bMaskByte1 0xff00 #define bMaskByte2 0xff0000 @@ -810,6 +847,7 @@ #define bMaskLWord 0x0000ffff #define bMaskDWord 0xffffffff +/* for PutRFRegsetting & GetRFRegSetting BitMask */ #define bMask12Bits 0xfff #define bEnable 0x1 @@ -818,14 +856,14 @@ #define LeftAntenna 0x0 #define RightAntenna 0x1 -#define tCheckTxStatus 500 -#define tUpdateRxCounter 100 +#define tCheckTxStatus 500 /* 500 ms */ +#define tUpdateRxCounter 100 /* 100 ms */ #define rateCCK 0 #define rateOFDM 1 #define rateHT 2 -#define bPMAC_End 0x1ff +#define bPMAC_End 0x1ff /* define Register-End */ #define bFPGAPHY0_End 0x8ff #define bFPGAPHY1_End 0x9ff #define bCCKPHY0_End 0xaff -- 1.8.4.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 3/8] staging: rtl8192e: remove r819xE_phyreg.h 2015-04-07 23:08 [PATCH 0/8] staging: rtl8192e: Fix more checkpatch.pl warnings Mateusz Kulikowski 2015-04-07 23:08 ` [PATCH 1/8] staging: rtl8192e: Fix SPACE_BEFORE_TAB warnings Mateusz Kulikowski 2015-04-07 23:08 ` [PATCH 2/8] staging: rtl8192e: Copy comments from r819XE_phyreg.h to r8192E_phyreg.h Mateusz Kulikowski @ 2015-04-07 23:08 ` Mateusz Kulikowski 2015-04-07 23:08 ` [PATCH 4/8] staging: rtl8192e: Fix SPACING errors Mateusz Kulikowski ` (5 subsequent siblings) 8 siblings, 0 replies; 10+ messages in thread From: Mateusz Kulikowski @ 2015-04-07 23:08 UTC (permalink / raw) To: gregkh; +Cc: Mateusz Kulikowski, devel, linux-kernel This file is not used and its contents are duplicated in r8192E_phyreg.h. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> --- drivers/staging/rtl8192e/rtl8192e/r819xE_phyreg.h | 908 ---------------------- 1 file changed, 908 deletions(-) delete mode 100644 drivers/staging/rtl8192e/rtl8192e/r819xE_phyreg.h diff --git a/drivers/staging/rtl8192e/rtl8192e/r819xE_phyreg.h b/drivers/staging/rtl8192e/rtl8192e/r819xE_phyreg.h deleted file mode 100644 index 03eee3d..0000000 --- a/drivers/staging/rtl8192e/rtl8192e/r819xE_phyreg.h +++ /dev/null @@ -1,908 +0,0 @@ -#ifndef _R819XU_PHYREG_H -#define _R819XU_PHYREG_H - - -#define RF_DATA 0x1d4 // FW will write RF data in the register. - -//Register //duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -//page 1 -#define rPMAC_Reset 0x100 -#define rPMAC_TxStart 0x104 -#define rPMAC_TxLegacySIG 0x108 -#define rPMAC_TxHTSIG1 0x10c -#define rPMAC_TxHTSIG2 0x110 -#define rPMAC_PHYDebug 0x114 -#define rPMAC_TxPacketNum 0x118 -#define rPMAC_TxIdle 0x11c -#define rPMAC_TxMACHeader0 0x120 -#define rPMAC_TxMACHeader1 0x124 -#define rPMAC_TxMACHeader2 0x128 -#define rPMAC_TxMACHeader3 0x12c -#define rPMAC_TxMACHeader4 0x130 -#define rPMAC_TxMACHeader5 0x134 -#define rPMAC_TxDataType 0x138 -#define rPMAC_TxRandomSeed 0x13c -#define rPMAC_CCKPLCPPreamble 0x140 -#define rPMAC_CCKPLCPHeader 0x144 -#define rPMAC_CCKCRC16 0x148 -#define rPMAC_OFDMRxCRC32OK 0x170 -#define rPMAC_OFDMRxCRC32Er 0x174 -#define rPMAC_OFDMRxParityEr 0x178 -#define rPMAC_OFDMRxCRC8Er 0x17c -#define rPMAC_CCKCRxRC16Er 0x180 -#define rPMAC_CCKCRxRC32Er 0x184 -#define rPMAC_CCKCRxRC32OK 0x188 -#define rPMAC_TxStatus 0x18c - -//90P -#define MCS_TXAGC 0x340 // MCS AGC -#define CCK_TXAGC 0x348 // CCK AGC - -#define MacBlkCtrl 0x403 // Mac block on/off control register - -//page8 -#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC -#define rFPGA0_TxInfo 0x804 -#define rFPGA0_PSDFunction 0x808 -#define rFPGA0_TxGainStage 0x80c -#define rFPGA0_RFTiming1 0x810 -#define rFPGA0_RFTiming2 0x814 -//#define rFPGA0_XC_RFTiming 0x818 -//#define rFPGA0_XD_RFTiming 0x81c -#define rFPGA0_XA_HSSIParameter1 0x820 -#define rFPGA0_XA_HSSIParameter2 0x824 -#define rFPGA0_XB_HSSIParameter1 0x828 -#define rFPGA0_XB_HSSIParameter2 0x82c -#define rFPGA0_XC_HSSIParameter1 0x830 -#define rFPGA0_XC_HSSIParameter2 0x834 -#define rFPGA0_XD_HSSIParameter1 0x838 -#define rFPGA0_XD_HSSIParameter2 0x83c -#define rFPGA0_XA_LSSIParameter 0x840 -#define rFPGA0_XB_LSSIParameter 0x844 -#define rFPGA0_XC_LSSIParameter 0x848 -#define rFPGA0_XD_LSSIParameter 0x84c -#define rFPGA0_RFWakeUpParameter 0x850 -#define rFPGA0_RFSleepUpParameter 0x854 -#define rFPGA0_XAB_SwitchControl 0x858 -#define rFPGA0_XCD_SwitchControl 0x85c -#define rFPGA0_XA_RFInterfaceOE 0x860 -#define rFPGA0_XB_RFInterfaceOE 0x864 -#define rFPGA0_XC_RFInterfaceOE 0x868 -#define rFPGA0_XD_RFInterfaceOE 0x86c -#define rFPGA0_XAB_RFInterfaceSW 0x870 -#define rFPGA0_XCD_RFInterfaceSW 0x874 -#define rFPGA0_XAB_RFParameter 0x878 -#define rFPGA0_XCD_RFParameter 0x87c -#define rFPGA0_AnalogParameter1 0x880 -#define rFPGA0_AnalogParameter2 0x884 -#define rFPGA0_AnalogParameter3 0x888 -#define rFPGA0_AnalogParameter4 0x88c -#define rFPGA0_XA_LSSIReadBack 0x8a0 -#define rFPGA0_XB_LSSIReadBack 0x8a4 -#define rFPGA0_XC_LSSIReadBack 0x8a8 -#define rFPGA0_XD_LSSIReadBack 0x8ac -#define rFPGA0_PSDReport 0x8b4 -#define rFPGA0_XAB_RFInterfaceRB 0x8e0 -#define rFPGA0_XCD_RFInterfaceRB 0x8e4 - -/* Page 9 - RF mode & OFDM TxSC */ -#define rFPGA1_RFMOD 0x900 -#define rFPGA1_TxBlock 0x904 -#define rFPGA1_DebugSelect 0x908 -#define rFPGA1_TxInfo 0x90c - -/* Page a */ -#define rCCK0_System 0xa00 -#define rCCK0_AFESetting 0xa04 -#define rCCK0_CCA 0xa08 -/* AGC default value, saturation level */ -#define rCCK0_RxAGC1 0xa0c -/* AGC & DAGC */ -#define rCCK0_RxAGC2 0xa10 -#define rCCK0_RxHP 0xa14 -/* Timing recovery & channel estimation threshold */ -#define rCCK0_DSPParameter1 0xa18 -/* SQ threshold */ -#define rCCK0_DSPParameter2 0xa1c -#define rCCK0_TxFilter1 0xa20 -#define rCCK0_TxFilter2 0xa24 -/* Debug port and TX filter 3 */ -#define rCCK0_DebugPort 0xa28 -#define rCCK0_FalseAlarmReport 0xa2c -#define rCCK0_TRSSIReport 0xa50 -#define rCCK0_RxReport 0xa54 -#define rCCK0_FACounterLower 0xa5c -#define rCCK0_FACounterUpper 0xa58 - -/* Page c */ -#define rOFDM0_LSTF 0xc00 -#define rOFDM0_TRxPathEnable 0xc04 -#define rOFDM0_TRMuxPar 0xc08 -#define rOFDM0_TRSWIsolation 0xc0c -/* RxIQ DC offset, Rx digital filter, DC notch filter */ -#define rOFDM0_XARxAFE 0xc10 -/* RxIQ imblance matrix */ -#define rOFDM0_XARxIQImbalance 0xc14 -#define rOFDM0_XBRxAFE 0xc18 -#define rOFDM0_XBRxIQImbalance 0xc1c -#define rOFDM0_XCRxAFE 0xc20 -#define rOFDM0_XCRxIQImbalance 0xc24 -#define rOFDM0_XDRxAFE 0xc28 -#define rOFDM0_XDRxIQImbalance 0xc2c -/* PD, BW & SBD */ -#define rOFDM0_RxDetector1 0xc30 -/* SBD */ -#define rOFDM0_RxDetector2 0xc34 -/* Frame Sync */ -#define rOFDM0_RxDetector3 0xc38 -/* PD, SBD, Frame Sync & Short-GI */ -#define rOFDM0_RxDetector4 0xc3c -/* Rx Sync Path */ -#define rOFDM0_RxDSP 0xc40 -/* CFO & DAGC */ -#define rOFDM0_CFOandDAGC 0xc44 -/* CCA Drop threshold */ -#define rOFDM0_CCADropThreshold 0xc48 -/* Energy CCA */ -#define rOFDM0_ECCAThreshold 0xc4c -#define rOFDM0_XAAGCCore1 0xc50 -#define rOFDM0_XAAGCCore2 0xc54 -#define rOFDM0_XBAGCCore1 0xc58 -#define rOFDM0_XBAGCCore2 0xc5c -#define rOFDM0_XCAGCCore1 0xc60 -#define rOFDM0_XCAGCCore2 0xc64 -#define rOFDM0_XDAGCCore1 0xc68 -#define rOFDM0_XDAGCCore2 0xc6c -#define rOFDM0_AGCParameter1 0xc70 -#define rOFDM0_AGCParameter2 0xc74 -#define rOFDM0_AGCRSSITable 0xc78 -#define rOFDM0_HTSTFAGC 0xc7c -#define rOFDM0_XATxIQImbalance 0xc80 -#define rOFDM0_XATxAFE 0xc84 -#define rOFDM0_XBTxIQImbalance 0xc88 -#define rOFDM0_XBTxAFE 0xc8c -#define rOFDM0_XCTxIQImbalance 0xc90 -#define rOFDM0_XCTxAFE 0xc94 -#define rOFDM0_XDTxIQImbalance 0xc98 -#define rOFDM0_XDTxAFE 0xc9c -#define rOFDM0_RxHPParameter 0xce0 -#define rOFDM0_TxPseudoNoiseWgt 0xce4 -#define rOFDM0_FrameSync 0xcf0 -#define rOFDM0_DFSReport 0xcf4 -#define rOFDM0_TxCoeff1 0xca4 -#define rOFDM0_TxCoeff2 0xca8 -#define rOFDM0_TxCoeff3 0xcac -#define rOFDM0_TxCoeff4 0xcb0 -#define rOFDM0_TxCoeff5 0xcb4 -#define rOFDM0_TxCoeff6 0xcb8 - - -/* Page d */ -#define rOFDM1_LSTF 0xd00 -#define rOFDM1_TRxPathEnable 0xd04 -#define rOFDM1_CFO 0xd08 -#define rOFDM1_CSI1 0xd10 -#define rOFDM1_SBD 0xd14 -#define rOFDM1_CSI2 0xd18 -#define rOFDM1_CFOTracking 0xd2c -#define rOFDM1_TRxMesaure1 0xd34 -#define rOFDM1_IntfDet 0xd3c -#define rOFDM1_PseudoNoiseStateAB 0xd50 -#define rOFDM1_PseudoNoiseStateCD 0xd54 -#define rOFDM1_RxPseudoNoiseWgt 0xd58 -/* cca, parity fail */ -#define rOFDM_PHYCounter1 0xda0 -/* rate illegal, crc8 fail */ -#define rOFDM_PHYCounter2 0xda4 -/* MCS not supported */ -#define rOFDM_PHYCounter3 0xda8 -#define rOFDM_ShortCFOAB 0xdac -#define rOFDM_ShortCFOCD 0xdb0 -#define rOFDM_LongCFOAB 0xdb4 -#define rOFDM_LongCFOCD 0xdb8 -#define rOFDM_TailCFOAB 0xdbc -#define rOFDM_TailCFOCD 0xdc0 -#define rOFDM_PWMeasure1 0xdc4 -#define rOFDM_PWMeasure2 0xdc8 -#define rOFDM_BWReport 0xdcc -#define rOFDM_AGCReport 0xdd0 -#define rOFDM_RxSNR 0xdd4 -#define rOFDM_RxEVMCSI 0xdd8 -#define rOFDM_SIGReport 0xddc - -/* Page e */ -#define rTxAGC_Rate18_06 0xe00 -#define rTxAGC_Rate54_24 0xe04 -#define rTxAGC_CCK_Mcs32 0xe08 -#define rTxAGC_Mcs03_Mcs00 0xe10 -#define rTxAGC_Mcs07_Mcs04 0xe14 -#define rTxAGC_Mcs11_Mcs08 0xe18 -#define rTxAGC_Mcs15_Mcs12 0xe1c - - -/* RF Zebra 1 */ -#define rZebra1_HSSIEnable 0x0 -#define rZebra1_TRxEnable1 0x1 -#define rZebra1_TRxEnable2 0x2 -#define rZebra1_AGC 0x4 -#define rZebra1_ChargePump 0x5 -#define rZebra1_Channel 0x7 -#define rZebra1_TxGain 0x8 -#define rZebra1_TxLPF 0x9 -#define rZebra1_RxLPF 0xb -#define rZebra1_RxHPFCorner 0xc - -/* Zebra 4 */ -#define rGlobalCtrl 0 -#define rRTL8256_TxLPF 19 -#define rRTL8256_RxLPF 11 - -/* RTL8258 */ -#define rRTL8258_TxLPF 0x11 -#define rRTL8258_RxLPF 0x13 -#define rRTL8258_RSSILPF 0xa - -/* Bit Mask */ -/* Page 1 */ -#define bBBResetB 0x100 -#define bGlobalResetB 0x200 -#define bOFDMTxStart 0x4 -#define bCCKTxStart 0x8 -#define bCRC32Debug 0x100 -#define bPMACLoopback 0x10 -#define bTxLSIG 0xffffff -#define bOFDMTxRate 0xf -#define bOFDMTxReserved 0x10 -#define bOFDMTxLength 0x1ffe0 -#define bOFDMTxParity 0x20000 -#define bTxHTSIG1 0xffffff -#define bTxHTMCSRate 0x7f -#define bTxHTBW 0x80 -#define bTxHTLength 0xffff00 -#define bTxHTSIG2 0xffffff -#define bTxHTSmoothing 0x1 -#define bTxHTSounding 0x2 -#define bTxHTReserved 0x4 -#define bTxHTAggreation 0x8 -#define bTxHTSTBC 0x30 -#define bTxHTAdvanceCoding 0x40 -#define bTxHTShortGI 0x80 -#define bTxHTNumberHT_LTF 0x300 -#define bTxHTCRC8 0x3fc00 -#define bCounterReset 0x10000 -#define bNumOfOFDMTx 0xffff -#define bNumOfCCKTx 0xffff0000 -#define bTxIdleInterval 0xffff -#define bOFDMService 0xffff0000 -#define bTxMACHeader 0xffffffff -#define bTxDataInit 0xff -#define bTxHTMode 0x100 -#define bTxDataType 0x30000 -#define bTxRandomSeed 0xffffffff -#define bCCKTxPreamble 0x1 -#define bCCKTxSFD 0xffff0000 -#define bCCKTxSIG 0xff -#define bCCKTxService 0xff00 -#define bCCKLengthExt 0x8000 -#define bCCKTxLength 0xffff0000 -#define bCCKTxCRC16 0xffff -#define bCCKTxStatus 0x1 -#define bOFDMTxStatus 0x2 - -/* Page 8 */ -#define bRFMOD 0x1 -#define bJapanMode 0x2 -#define bCCKTxSC 0x30 -#define bCCKEn 0x1000000 -#define bOFDMEn 0x2000000 -#define bOFDMRxADCPhase 0x10000 -#define bOFDMTxDACPhase 0x40000 -#define bXATxAGC 0x3f -#define bXBTxAGC 0xf00 -#define bXCTxAGC 0xf000 -#define bXDTxAGC 0xf0000 -#define bPAStart 0xf0000000 -#define bTRStart 0x00f00000 -#define bRFStart 0x0000f000 -#define bBBStart 0x000000f0 -#define bBBCCKStart 0x0000000f -/* Reg x814 */ -#define bPAEnd 0xf -#define bTREnd 0x0f000000 -#define bRFEnd 0x000f0000 -/* T2R */ -#define bCCAMask 0x000000f0 -#define bR2RCCAMask 0x00000f00 -#define bHSSI_R2TDelay 0xf8000000 -#define bHSSI_T2RDelay 0xf80000 -/* Channel gain at continue TX. */ -#define bContTxHSSI 0x400 -#define bIGFromCCK 0x200 -#define bAGCAddress 0x3f -#define bRxHPTx 0x7000 -#define bRxHPT2R 0x38000 -#define bRxHPCCKIni 0xc0000 -#define bAGCTxCode 0xc00000 -#define bAGCRxCode 0x300000 -#define b3WireDataLength 0x800 -#define b3WireAddressLength 0x400 -#define b3WireRFPowerDown 0x1 -/*#define bHWSISelect 0x8 */ -#define b5GPAPEPolarity 0x40000000 -#define b2GPAPEPolarity 0x80000000 -#define bRFSW_TxDefaultAnt 0x3 -#define bRFSW_TxOptionAnt 0x30 -#define bRFSW_RxDefaultAnt 0x300 -#define bRFSW_RxOptionAnt 0x3000 -#define bRFSI_3WireData 0x1 -#define bRFSI_3WireClock 0x2 -#define bRFSI_3WireLoad 0x4 -#define bRFSI_3WireRW 0x8 -/* 3-wire total control */ -#define bRFSI_3Wire 0xf -#define bRFSI_RFENV 0x10 -#define bRFSI_TRSW 0x20 -#define bRFSI_TRSWB 0x40 -#define bRFSI_ANTSW 0x100 -#define bRFSI_ANTSWB 0x200 -#define bRFSI_PAPE 0x400 -#define bRFSI_PAPE5G 0x800 -#define bBandSelect 0x1 -#define bHTSIG2_GI 0x80 -#define bHTSIG2_Smoothing 0x01 -#define bHTSIG2_Sounding 0x02 -#define bHTSIG2_Aggreaton 0x08 -#define bHTSIG2_STBC 0x30 -#define bHTSIG2_AdvCoding 0x40 -#define bHTSIG2_NumOfHTLTF 0x300 -#define bHTSIG2_CRC8 0x3fc -#define bHTSIG1_MCS 0x7f -#define bHTSIG1_BandWidth 0x80 -#define bHTSIG1_HTLength 0xffff -#define bLSIG_Rate 0xf -#define bLSIG_Reserved 0x10 -#define bLSIG_Length 0x1fffe -#define bLSIG_Parity 0x20 -#define bCCKRxPhase 0x4 -/* LSSI "read" address */ -#define bLSSIReadAddress 0x3f000000 -/* LSSI "read" edge signal */ -#define bLSSIReadEdge 0x80000000 -#define bLSSIReadBackData 0xfff -#define bLSSIReadOKFlag 0x1000 -/* 0: 44 MHz, 1: 88MHz */ -#define bCCKSampleRate 0x8 - -#define bRegulator0Standby 0x1 -#define bRegulatorPLLStandby 0x2 -#define bRegulator1Standby 0x4 -#define bPLLPowerUp 0x8 -#define bDPLLPowerUp 0x10 -#define bDA10PowerUp 0x20 -#define bAD7PowerUp 0x200 -#define bDA6PowerUp 0x2000 -#define bXtalPowerUp 0x4000 -#define b40MDClkPowerUP 0x8000 -#define bDA6DebugMode 0x20000 -#define bDA6Swing 0x380000 -#define bADClkPhase 0x4000000 -#define b80MClkDelay 0x18000000 -#define bAFEWatchDogEnable 0x20000000 -#define bXtalCap 0x0f000000 -#define bXtalCap01 0xc0000000 -#define bXtalCap23 0x3 -#define bXtalCap92x 0x0f000000 -#define bIntDifClkEnable 0x400 -#define bExtSigClkEnable 0x800 -#define bBandgapMbiasPowerUp 0x10000 -#define bAD11SHGain 0xc0000 -#define bAD11InputRange 0x700000 -#define bAD11OPCurrent 0x3800000 -#define bIPathLoopback 0x4000000 -#define bQPathLoopback 0x8000000 -#define bAFELoopback 0x10000000 -#define bDA10Swing 0x7e0 -#define bDA10Reverse 0x800 -#define bDAClkSource 0x1000 -#define bAD7InputRange 0x6000 -#define bAD7Gain 0x38000 -#define bAD7OutputCMMode 0x40000 -#define bAD7InputCMMode 0x380000 -#define bAD7Current 0xc00000 -#define bRegulatorAdjust 0x7000000 -#define bAD11PowerUpAtTx 0x1 -#define bDA10PSAtTx 0x10 -#define bAD11PowerUpAtRx 0x100 -#define bDA10PSAtRx 0x1000 - -#define bCCKRxAGCFormat 0x200 - -#define bPSDFFTSamplepPoint 0xc000 -#define bPSDAverageNum 0x3000 -#define bIQPathControl 0xc00 -#define bPSDFreq 0x3ff -#define bPSDAntennaPath 0x30 -#define bPSDIQSwitch 0x40 -#define bPSDRxTrigger 0x400000 -#define bPSDTxTrigger 0x80000000 -#define bPSDSineToneScale 0x7f000000 -#define bPSDReport 0xffff - -/* Page 8 */ -#define bOFDMTxSC 0x30000000 -#define bCCKTxOn 0x1 -#define bOFDMTxOn 0x2 -/* Reset debug page and also HWord, LWord */ -#define bDebugPage 0xfff -/* Reset debug page and LWord */ -#define bDebugItem 0xff -#define bAntL 0x10 -#define bAntNonHT 0x100 -#define bAntHT1 0x1000 -#define bAntHT2 0x10000 -#define bAntHT1S1 0x100000 -#define bAntNonHTS1 0x1000000 - -/* Page a */ -#define bCCKBBMode 0x3 -#define bCCKTxPowerSaving 0x80 -#define bCCKRxPowerSaving 0x40 -#define bCCKSideBand 0x10 -#define bCCKScramble 0x8 -#define bCCKAntDiversity 0x8000 -#define bCCKCarrierRecovery 0x4000 -#define bCCKTxRate 0x3000 -#define bCCKDCCancel 0x0800 -#define bCCKISICancel 0x0400 -#define bCCKMatchFilter 0x0200 -#define bCCKEqualizer 0x0100 -#define bCCKPreambleDetect 0x800000 -#define bCCKFastFalseCCA 0x400000 -#define bCCKChEstStart 0x300000 -#define bCCKCCACount 0x080000 -#define bCCKcs_lim 0x070000 -#define bCCKBistMode 0x80000000 -#define bCCKCCAMask 0x40000000 -#define bCCKTxDACPhase 0x4 -/* r_rx_clk */ -#define bCCKRxADCPhase 0x20000000 -#define bCCKr_cp_mode0 0x0100 -#define bCCKTxDCOffset 0xf0 -#define bCCKRxDCOffset 0xf -#define bCCKCCAMode 0xc000 -#define bCCKFalseCS_lim 0x3f00 -#define bCCKCS_ratio 0xc00000 -#define bCCKCorgBit_sel 0x300000 -#define bCCKPD_lim 0x0f0000 -#define bCCKNewCCA 0x80000000 -#define bCCKRxHPofIG 0x8000 -#define bCCKRxIG 0x7f00 -#define bCCKLNAPolarity 0x800000 -#define bCCKRx1stGain 0x7f0000 -/* CCK Rx Initial gain polarity */ -#define bCCKRFExtend 0x20000000 -#define bCCKRxAGCSatLevel 0x1f000000 -#define bCCKRxAGCSatCount 0xe0 -/* AGCSAmp_dly */ -#define bCCKRxRFSettle 0x1f -#define bCCKFixedRxAGC 0x8000 -/*#define bCCKRxAGCFormat 0x4000 remove to HSSI register 0x824 */ -#define bCCKAntennaPolarity 0x2000 -#define bCCKTxFilterType 0x0c00 -#define bCCKRxAGCReportType 0x0300 -#define bCCKRxDAGCEn 0x80000000 -#define bCCKRxDAGCPeriod 0x20000000 -#define bCCKRxDAGCSatLevel 0x1f000000 -#define bCCKTimingRecovery 0x800000 -#define bCCKTxC0 0x3f0000 -#define bCCKTxC1 0x3f000000 -#define bCCKTxC2 0x3f -#define bCCKTxC3 0x3f00 -#define bCCKTxC4 0x3f0000 -#define bCCKTxC5 0x3f000000 -#define bCCKTxC6 0x3f -#define bCCKTxC7 0x3f00 -#define bCCKDebugPort 0xff0000 -#define bCCKDACDebug 0x0f000000 -#define bCCKFalseAlarmEnable 0x8000 -#define bCCKFalseAlarmRead 0x4000 -#define bCCKTRSSI 0x7f -#define bCCKRxAGCReport 0xfe -#define bCCKRxReport_AntSel 0x80000000 -#define bCCKRxReport_MFOff 0x40000000 -#define bCCKRxRxReport_SQLoss 0x20000000 -#define bCCKRxReport_Pktloss 0x10000000 -#define bCCKRxReport_Lockedbit 0x08000000 -#define bCCKRxReport_RateError 0x04000000 -#define bCCKRxReport_RxRate 0x03000000 -#define bCCKRxFACounterLower 0xff -#define bCCKRxFACounterUpper 0xff000000 -#define bCCKRxHPAGCStart 0xe000 -#define bCCKRxHPAGCFinal 0x1c00 - -#define bCCKRxFalseAlarmEnable 0x8000 -#define bCCKFACounterFreeze 0x4000 - -#define bCCKTxPathSel 0x10000000 -#define bCCKDefaultRxPath 0xc000000 -#define bCCKOptionRxPath 0x3000000 - -/* Page c */ -#define bNumOfSTF 0x3 -#define bShift_L 0xc0 -#define bGI_TH 0xc -#define bRxPathA 0x1 -#define bRxPathB 0x2 -#define bRxPathC 0x4 -#define bRxPathD 0x8 -#define bTxPathA 0x1 -#define bTxPathB 0x2 -#define bTxPathC 0x4 -#define bTxPathD 0x8 -#define bTRSSIFreq 0x200 -#define bADCBackoff 0x3000 -#define bDFIRBackoff 0xc000 -#define bTRSSILatchPhase 0x10000 -#define bRxIDCOffset 0xff -#define bRxQDCOffset 0xff00 -#define bRxDFIRMode 0x1800000 -#define bRxDCNFType 0xe000000 -#define bRXIQImb_A 0x3ff -#define bRXIQImb_B 0xfc00 -#define bRXIQImb_C 0x3f0000 -#define bRXIQImb_D 0xffc00000 -#define bDC_dc_Notch 0x60000 -#define bRxNBINotch 0x1f000000 -#define bPD_TH 0xf -#define bPD_TH_Opt2 0xc000 -#define bPWED_TH 0x700 -#define bIfMF_Win_L 0x800 -#define bPD_Option 0x1000 -#define bMF_Win_L 0xe000 -#define bBW_Search_L 0x30000 -#define bwin_enh_L 0xc0000 -#define bBW_TH 0x700000 -#define bED_TH2 0x3800000 -#define bBW_option 0x4000000 -#define bRatio_TH 0x18000000 -#define bWindow_L 0xe0000000 -#define bSBD_Option 0x1 -#define bFrame_TH 0x1c -#define bFS_Option 0x60 -#define bDC_Slope_check 0x80 -#define bFGuard_Counter_DC_L 0xe00 -#define bFrame_Weight_Short 0x7000 -#define bSub_Tune 0xe00000 -#define bFrame_DC_Length 0xe000000 -#define bSBD_start_offset 0x30000000 -#define bFrame_TH_2 0x7 -#define bFrame_GI2_TH 0x38 -#define bGI2_Sync_en 0x40 -#define bSarch_Short_Early 0x300 -#define bSarch_Short_Late 0xc00 -#define bSarch_GI2_Late 0x70000 -#define bCFOAntSum 0x1 -#define bCFOAcc 0x2 -#define bCFOStartOffset 0xc -#define bCFOLookBack 0x70 -#define bCFOSumWeight 0x80 -#define bDAGCEnable 0x10000 -#define bTXIQImb_A 0x3ff -#define bTXIQImb_B 0xfc00 -#define bTXIQImb_C 0x3f0000 -#define bTXIQImb_D 0xffc00000 -#define bTxIDCOffset 0xff -#define bTxQDCOffset 0xff00 -#define bTxDFIRMode 0x10000 -#define bTxPesudoNoiseOn 0x4000000 -#define bTxPesudoNoise_A 0xff -#define bTxPesudoNoise_B 0xff00 -#define bTxPesudoNoise_C 0xff0000 -#define bTxPesudoNoise_D 0xff000000 -#define bCCADropOption 0x20000 -#define bCCADropThres 0xfff00000 -#define bEDCCA_H 0xf -#define bEDCCA_L 0xf0 -#define bLambda_ED 0x300 -#define bRxInitialGain 0x7f -#define bRxAntDivEn 0x80 -#define bRxAGCAddressForLNA 0x7f00 -#define bRxHighPowerFlow 0x8000 -#define bRxAGCFreezeThres 0xc0000 -#define bRxFreezeStep_AGC1 0x300000 -#define bRxFreezeStep_AGC2 0xc00000 -#define bRxFreezeStep_AGC3 0x3000000 -#define bRxFreezeStep_AGC0 0xc000000 -#define bRxRssi_Cmp_En 0x10000000 -#define bRxQuickAGCEn 0x20000000 -#define bRxAGCFreezeThresMode 0x40000000 -#define bRxOverFlowCheckType 0x80000000 -#define bRxAGCShift 0x7f -#define bTRSW_Tri_Only 0x80 -#define bPowerThres 0x300 -#define bRxAGCEn 0x1 -#define bRxAGCTogetherEn 0x2 -#define bRxAGCMin 0x4 -#define bRxHP_Ini 0x7 -#define bRxHP_TRLNA 0x70 -#define bRxHP_RSSI 0x700 -#define bRxHP_BBP1 0x7000 -#define bRxHP_BBP2 0x70000 -#define bRxHP_BBP3 0x700000 -/* The threshold for high power */ -#define bRSSI_H 0x7f0000 -/* The threshold for ant diversity */ -#define bRSSI_Gen 0x7f000000 -#define bRxSettle_TRSW 0x7 -#define bRxSettle_LNA 0x38 -#define bRxSettle_RSSI 0x1c0 -#define bRxSettle_BBP 0xe00 -#define bRxSettle_RxHP 0x7000 -#define bRxSettle_AntSW_RSSI 0x38000 -#define bRxSettle_AntSW 0xc0000 -#define bRxProcessTime_DAGC 0x300000 -#define bRxSettle_HSSI 0x400000 -#define bRxProcessTime_BBPPW 0x800000 -#define bRxAntennaPowerShift 0x3000000 -#define bRSSITableSelect 0xc000000 -#define bRxHP_Final 0x7000000 -#define bRxHTSettle_BBP 0x7 -#define bRxHTSettle_HSSI 0x8 -#define bRxHTSettle_RxHP 0x70 -#define bRxHTSettle_BBPPW 0x80 -#define bRxHTSettle_Idle 0x300 -#define bRxHTSettle_Reserved 0x1c00 -#define bRxHTRxHPEn 0x8000 -#define bRxHTAGCFreezeThres 0x30000 -#define bRxHTAGCTogetherEn 0x40000 -#define bRxHTAGCMin 0x80000 -#define bRxHTAGCEn 0x100000 -#define bRxHTDAGCEn 0x200000 -#define bRxHTRxHP_BBP 0x1c00000 -#define bRxHTRxHP_Final 0xe0000000 -#define bRxPWRatioTH 0x3 -#define bRxPWRatioEn 0x4 -#define bRxMFHold 0x3800 -#define bRxPD_Delay_TH1 0x38 -#define bRxPD_Delay_TH2 0x1c0 -#define bRxPD_DC_COUNT_MAX 0x600 -/*#define bRxMF_Hold 0x3800*/ -#define bRxPD_Delay_TH 0x8000 -#define bRxProcess_Delay 0xf0000 -#define bRxSearchrange_GI2_Early 0x700000 -#define bRxFrame_Guard_Counter_L 0x3800000 -#define bRxSGI_Guard_L 0xc000000 -#define bRxSGI_Search_L 0x30000000 -#define bRxSGI_TH 0xc0000000 -#define bDFSCnt0 0xff -#define bDFSCnt1 0xff00 -#define bDFSFlag 0xf0000 - -#define bMFWeightSum 0x300000 -#define bMinIdxTH 0x7f000000 - -#define bDAFormat 0x40000 - -#define bTxChEmuEnable 0x01000000 - -#define bTRSWIsolation_A 0x7f -#define bTRSWIsolation_B 0x7f00 -#define bTRSWIsolation_C 0x7f0000 -#define bTRSWIsolation_D 0x7f000000 - -#define bExtLNAGain 0x7c00 - -/* Page d */ -#define bSTBCEn 0x4 -#define bAntennaMapping 0x10 -#define bNss 0x20 -#define bCFOAntSumD 0x200 -#define bPHYCounterReset 0x8000000 -#define bCFOReportGet 0x4000000 -#define bOFDMContinueTx 0x10000000 -#define bOFDMSingleCarrier 0x20000000 -#define bOFDMSingleTone 0x40000000 -/*#define bRxPath1 0x01 -#define bRxPath2 0x02 -#define bRxPath3 0x04 -#define bRxPath4 0x08 -#define bTxPath1 0x10 -#define bTxPath2 0x20*/ -#define bHTDetect 0x100 -#define bCFOEn 0x10000 -#define bCFOValue 0xfff00000 -#define bSigTone_Re 0x3f -#define bSigTone_Im 0x7f00 -#define bCounter_CCA 0xffff -#define bCounter_ParityFail 0xffff0000 -#define bCounter_RateIllegal 0xffff -#define bCounter_CRC8Fail 0xffff0000 -#define bCounter_MCSNoSupport 0xffff -#define bCounter_FastSync 0xffff -#define bShortCFO 0xfff -/* total */ -#define bShortCFOTLength 12 -/* fraction */ -#define bShortCFOFLength 11 -#define bLongCFO 0x7ff -#define bLongCFOTLength 11 -#define bLongCFOFLength 11 -#define bTailCFO 0x1fff -#define bTailCFOTLength 13 -#define bTailCFOFLength 12 - -#define bmax_en_pwdB 0xffff -#define bCC_power_dB 0xffff0000 -#define bnoise_pwdB 0xffff -#define bPowerMeasTLength 10 -#define bPowerMeasFLength 3 -#define bRx_HT_BW 0x1 -#define bRxSC 0x6 -#define bRx_HT 0x8 - -#define bNB_intf_det_on 0x1 -#define bIntf_win_len_cfg 0x30 -#define bNB_Intf_TH_cfg 0x1c0 - -#define bRFGain 0x3f -#define bTableSel 0x40 -#define bTRSW 0x80 - -#define bRxSNR_A 0xff -#define bRxSNR_B 0xff00 -#define bRxSNR_C 0xff0000 -#define bRxSNR_D 0xff000000 -#define bSNREVMTLength 8 -#define bSNREVMFLength 1 - -#define bCSI1st 0xff -#define bCSI2nd 0xff00 -#define bRxEVM1st 0xff0000 -#define bRxEVM2nd 0xff000000 - -#define bSIGEVM 0xff -#define bPWDB 0xff00 -#define bSGIEN 0x10000 - -#define bSFactorQAM1 0xf -#define bSFactorQAM2 0xf0 -#define bSFactorQAM3 0xf00 -#define bSFactorQAM4 0xf000 -#define bSFactorQAM5 0xf0000 -#define bSFactorQAM6 0xf0000 -#define bSFactorQAM7 0xf00000 -#define bSFactorQAM8 0xf000000 -#define bSFactorQAM9 0xf0000000 -#define bCSIScheme 0x100000 - -#define bNoiseLvlTopSet 0x3 -#define bChSmooth 0x4 -#define bChSmoothCfg1 0x38 -#define bChSmoothCfg2 0x1c0 -#define bChSmoothCfg3 0xe00 -#define bChSmoothCfg4 0x7000 -#define bMRCMode 0x800000 -#define bTHEVMCfg 0x7000000 - -#define bLoopFitType 0x1 -#define bUpdCFO 0x40 -#define bUpdCFOOffData 0x80 -#define bAdvUpdCFO 0x100 -#define bAdvTimeCtrl 0x800 -#define bUpdClko 0x1000 -#define bFC 0x6000 -#define bTrackingMode 0x8000 -#define bPhCmpEnable 0x10000 -#define bUpdClkoLTF 0x20000 -#define bComChCFO 0x40000 -#define bCSIEstiMode 0x80000 -#define bAdvUpdEqz 0x100000 -#define bUChCfg 0x7000000 -#define bUpdEqz 0x8000000 - -/* Page e */ -#define bTxAGCRate18_06 0x7f7f7f7f -#define bTxAGCRate54_24 0x7f7f7f7f -#define bTxAGCRateMCS32 0x7f -#define bTxAGCRateCCK 0x7f00 -#define bTxAGCRateMCS3_MCS0 0x7f7f7f7f -#define bTxAGCRateMCS7_MCS4 0x7f7f7f7f -#define bTxAGCRateMCS11_MCS8 0x7f7f7f7f -#define bTxAGCRateMCS15_MCS12 0x7f7f7f7f - - -/* Rx Pseduo noise */ -#define bRxPesudoNoiseOn 0x20000000 -#define bRxPesudoNoise_A 0xff -#define bRxPesudoNoise_B 0xff00 -#define bRxPesudoNoise_C 0xff0000 -#define bRxPesudoNoise_D 0xff000000 -#define bPesudoNoiseState_A 0xffff -#define bPesudoNoiseState_B 0xffff0000 -#define bPesudoNoiseState_C 0xffff -#define bPesudoNoiseState_D 0xffff0000 - -/* RF Zebra 1 */ -#define bZebra1_HSSIEnable 0x8 -#define bZebra1_TRxControl 0xc00 -#define bZebra1_TRxGainSetting 0x07f -#define bZebra1_RxCorner 0xc00 -#define bZebra1_TxChargePump 0x38 -#define bZebra1_RxChargePump 0x7 -#define bZebra1_ChannelNum 0xf80 -#define bZebra1_TxLPFBW 0x400 -#define bZebra1_RxLPFBW 0x600 - -/* Zebra4 */ -#define bRTL8256RegModeCtrl1 0x100 -#define bRTL8256RegModeCtrl0 0x40 -#define bRTL8256_TxLPFBW 0x18 -#define bRTL8256_RxLPFBW 0x600 - -//RTL8258 -#define bRTL8258_TxLPFBW 0xc -#define bRTL8258_RxLPFBW 0xc00 -#define bRTL8258_RSSILPFBW 0xc0 - -/* byte enable for sb_write */ -#define bByte0 0x1 -#define bByte1 0x2 -#define bByte2 0x4 -#define bByte3 0x8 -#define bWord0 0x3 -#define bWord1 0xc -#define bDWord 0xf - -/* for PutRegsetting & GetRegSetting BitMask */ -#define bMaskByte0 0xff -#define bMaskByte1 0xff00 -#define bMaskByte2 0xff0000 -#define bMaskByte3 0xff000000 -#define bMaskHWord 0xffff0000 -#define bMaskLWord 0x0000ffff -#define bMaskDWord 0xffffffff - -/* for PutRFRegsetting & GetRFRegSetting BitMask */ -#define bMask12Bits 0xfff - -#define bEnable 0x1 -#define bDisable 0x0 - -#define LeftAntenna 0x0 -#define RightAntenna 0x1 - -/* 500 ms */ -#define tCheckTxStatus 500 -/* 100 ms */ -#define tUpdateRxCounter 100 - -#define rateCCK 0 -#define rateOFDM 1 -#define rateHT 2 - -/* define Register-End */ -#define bPMAC_End 0x1ff -#define bFPGAPHY0_End 0x8ff -#define bFPGAPHY1_End 0x9ff -#define bCCKPHY0_End 0xaff -#define bOFDMPHY0_End 0xcff -#define bOFDMPHY1_End 0xdff - -#define bPMACControl 0x0 -#define bWMACControl 0x1 -#define bWNICControl 0x2 - -#define PathA 0x0 -#define PathB 0x1 -#define PathC 0x2 -#define PathD 0x3 - -#define rRTL8256RxMixerPole 0xb -#define bZebraRxMixerPole 0x6 -#define rRTL8256TxBBOPBias 0x9 -#define bRTL8256TxBBOPBias 0x400 -#define rRTL8256TxBBBW 19 -#define bRTL8256TxBBBW 0x18 - - -#endif /* __INC_HAL8190PCIPHYREG_H */ -- 1.8.4.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 4/8] staging: rtl8192e: Fix SPACING errors 2015-04-07 23:08 [PATCH 0/8] staging: rtl8192e: Fix more checkpatch.pl warnings Mateusz Kulikowski ` (2 preceding siblings ...) 2015-04-07 23:08 ` [PATCH 3/8] staging: rtl8192e: remove r819xE_phyreg.h Mateusz Kulikowski @ 2015-04-07 23:08 ` Mateusz Kulikowski 2015-04-07 23:08 ` [PATCH 5/8] staging: rtl8192e: Remove bb tx gains from r8192_priv Mateusz Kulikowski ` (4 subsequent siblings) 8 siblings, 0 replies; 10+ messages in thread From: Mateusz Kulikowski @ 2015-04-07 23:08 UTC (permalink / raw) To: gregkh; +Cc: Mateusz Kulikowski, devel, linux-kernel Fix several SPACING errors to make checkpatch happy. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> --- drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c | 2 +- drivers/staging/rtl8192e/rtl8192e/rtl_core.c | 6 +++--- drivers/staging/rtl8192e/rtl8192e/rtl_core.h | 6 +++--- drivers/staging/rtl8192e/rtllib_debug.h | 3 +-- drivers/staging/rtl8192e/rtllib_rx.c | 2 +- 5 files changed, 9 insertions(+), 10 deletions(-) diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c index 4664a4f..eea2e39 100644 --- a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c +++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c @@ -1002,7 +1002,7 @@ void rtl8192_SwChnl_WorkItem(struct net_device *dev) RT_TRACE(COMP_TRACE, "=====>--%s(), set chan:%d, priv:%p\n", __func__, priv->chan, priv); - rtl8192_phy_FinishSwChnlNow(dev , priv->chan); + rtl8192_phy_FinishSwChnlNow(dev, priv->chan); RT_TRACE(COMP_TRACE, "<== SwChnlCallback819xUsbWorkItem()\n"); } diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_core.c b/drivers/staging/rtl8192e/rtl8192e/rtl_core.c index 352d381..3ce7676 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_core.c +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_core.c @@ -1533,7 +1533,7 @@ RESET_START: SEM_UP_IEEE_WX(&ieee->wx_sem); } else { netdev_info(dev, "ieee->state is NOT LINKED\n"); - rtllib_softmac_stop_protocol(priv->rtllib, 0 , true); + rtllib_softmac_stop_protocol(priv->rtllib, 0, true); } dm_backup_dynamic_mechanism_state(dev); @@ -2102,7 +2102,7 @@ static short rtl8192_alloc_rx_desc_ring(struct net_device *dev) entry->OWN = 1; } - if(entry) + if (entry) entry->EOR = 1; } return 0; @@ -2519,7 +2519,7 @@ void rtl8192_commit(struct net_device *dev) if (priv->up == 0) return; - rtllib_softmac_stop_protocol(priv->rtllib, 0 , true); + rtllib_softmac_stop_protocol(priv->rtllib, 0, true); rtl8192_irq_disable(dev); priv->ops->stop_adapter(dev, true); _rtl8192_up(dev, false); diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_core.h b/drivers/staging/rtl8192e/rtl8192e/rtl_core.h index d365af6..a6279e7 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_core.h +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_core.h @@ -84,7 +84,7 @@ #define RTL_PCI_DEVICE(vend, dev, cfg) \ .vendor = (vend), .device = (dev), \ - .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID , \ + .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, \ .driver_data = (kernel_ulong_t)&(cfg) #define RTL_MAX_SCAN_SIZE 128 @@ -303,9 +303,9 @@ enum pci_bridge_vendor { PCI_BRIDGE_VENDOR_INTEL = 0x0, PCI_BRIDGE_VENDOR_ATI, PCI_BRIDGE_VENDOR_AMD, - PCI_BRIDGE_VENDOR_SIS , + PCI_BRIDGE_VENDOR_SIS, PCI_BRIDGE_VENDOR_UNKNOWN, - PCI_BRIDGE_VENDOR_MAX , + PCI_BRIDGE_VENDOR_MAX, }; struct buffer { diff --git a/drivers/staging/rtl8192e/rtllib_debug.h b/drivers/staging/rtl8192e/rtllib_debug.h index 119729d..6df8df1 100644 --- a/drivers/staging/rtl8192e/rtllib_debug.h +++ b/drivers/staging/rtl8192e/rtllib_debug.h @@ -73,8 +73,7 @@ enum RTL_DEBUG { #define RT_TRACE(component, x, args...) \ do { \ if (rt_global_debug_component & component) \ - printk(KERN_DEBUG DRV_NAME ":" x "\n" , \ - ##args);\ + printk(KERN_DEBUG DRV_NAME ":" x "\n", ##args);\ } while (0) #define assert(expr) \ diff --git a/drivers/staging/rtl8192e/rtllib_rx.c b/drivers/staging/rtl8192e/rtllib_rx.c index fe3e7e12..95cd17e 100644 --- a/drivers/staging/rtl8192e/rtllib_rx.c +++ b/drivers/staging/rtl8192e/rtllib_rx.c @@ -469,7 +469,7 @@ static bool AddReorderEntry(struct rx_ts_record *pTS, void rtllib_indicate_packets(struct rtllib_device *ieee, struct rtllib_rxb **prxbIndicateArray, u8 index) { struct net_device_stats *stats = &ieee->stats; - u8 i = 0 , j = 0; + u8 i = 0, j = 0; u16 ethertype; for (j = 0; j < index; j++) { -- 1.8.4.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 5/8] staging: rtl8192e: Remove bb tx gains from r8192_priv 2015-04-07 23:08 [PATCH 0/8] staging: rtl8192e: Fix more checkpatch.pl warnings Mateusz Kulikowski ` (3 preceding siblings ...) 2015-04-07 23:08 ` [PATCH 4/8] staging: rtl8192e: Fix SPACING errors Mateusz Kulikowski @ 2015-04-07 23:08 ` Mateusz Kulikowski 2015-04-07 23:08 ` [PATCH 6/8] staging: rtl8192e: Fix LINE_SPACING warning Mateusz Kulikowski ` (3 subsequent siblings) 8 siblings, 0 replies; 10+ messages in thread From: Mateusz Kulikowski @ 2015-04-07 23:08 UTC (permalink / raw) To: gregkh; +Cc: Mateusz Kulikowski, devel, linux-kernel r8192_priv structure had 2 big arrays with tx gain register values: - cck_txbbgain_table - cck_txbbgain_ch14_table - txbbgain_table This arrays were read-only - filled in driver init code and look like firmware/chip-specific. This patch removes them from r8192_priv and puts them in (global) variables. tx_bb_gain is also flattened - register values are stored in array; Amplification value can be calculated using dm_tx_bb_gain_idx_to_amplify(). Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> --- drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c | 5 +- drivers/staging/rtl8192e/rtl8192e/rtl_core.h | 14 - drivers/staging/rtl8192e/rtl8192e/rtl_dm.c | 674 +++++-------------------- drivers/staging/rtl8192e/rtl8192e/rtl_dm.h | 9 + 4 files changed, 151 insertions(+), 551 deletions(-) diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c b/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c index 2869602..aad5cc9 100644 --- a/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c +++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c @@ -918,8 +918,7 @@ start: tmpRegC = rtl8192_QueryBBReg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord); for (i = 0; i < TxBBGainTableLength; i++) { - if (tmpRegA == - priv->txbbgain_table[i].txbbgain_value) { + if (tmpRegA == dm_tx_bb_gain[i]) { priv->rfa_txpowertrackingindex = (u8)i; priv->rfa_txpowertrackingindex_real = (u8)i; @@ -933,7 +932,7 @@ start: rCCK0_TxFilter1, bMaskByte2); for (i = 0; i < CCKTxBBGainTableLength; i++) { - if (TempCCk == priv->cck_txbbgain_table[i].ccktxbb_valuearray[0]) { + if (TempCCk == dm_cck_tx_bb_gain[i][0]) { priv->CCKPresentAttentuation_20Mdefault = (u8)i; break; } diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_core.h b/drivers/staging/rtl8192e/rtl8192e/rtl_core.h index a6279e7..0640e76 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_core.h +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_core.h @@ -451,15 +451,6 @@ enum two_port_status { TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE }; -struct txbbgain_struct { - long txbb_iq_amplifygain; - u32 txbbgain_value; -}; - -struct ccktxbbgain { - u8 ccktxbb_valuearray[8]; -}; - struct init_gain { u8 xaagccore1; u8 xbagccore1; @@ -567,11 +558,6 @@ struct r8192_priv { struct bb_reg_definition PHYRegDef[4]; struct rate_adaptive rate_adaptive; - struct ccktxbbgain cck_txbbgain_table[CCKTxBBGainTableLength]; - struct ccktxbbgain cck_txbbgain_ch14_table[CCKTxBBGainTableLength]; - - struct txbbgain_struct txbbgain_table[TxBBGainTableLength]; - enum acm_method AcmMethod; struct rt_firmware *pFirmware; diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c index df4bbcf..c99d584 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c @@ -60,6 +60,99 @@ static u32 edca_setting_UL[HT_IOT_PEER_MAX] = { #define RTK_UL_EDCA 0xa44f #define RTK_DL_EDCA 0x5e4322 + +const u32 dm_tx_bb_gain[TxBBGainTableLength] = { + 0x7f8001fe, /* 12 dB */ + 0x788001e2, /* 11 dB */ + 0x71c001c7, + 0x6b8001ae, + 0x65400195, + 0x5fc0017f, + 0x5a400169, + 0x55400155, + 0x50800142, + 0x4c000130, + 0x47c0011f, + 0x43c0010f, + 0x40000100, + 0x3c8000f2, + 0x390000e4, + 0x35c000d7, + 0x32c000cb, + 0x300000c0, + 0x2d4000b5, + 0x2ac000ab, + 0x288000a2, + 0x26000098, + 0x24000090, + 0x22000088, + 0x20000080, + 0x1a00006c, + 0x1c800072, + 0x18000060, + 0x19800066, + 0x15800056, + 0x26c0005b, + 0x14400051, + 0x24400051, + 0x1300004c, + 0x12000048, + 0x11000044, + 0x10000040, /* -24 dB */ +}; + +const u8 dm_cck_tx_bb_gain[CCKTxBBGainTableLength][8] = { + {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, + {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, + {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, + {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, + {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, + {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, + {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, + {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, + {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, + {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, + {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, + {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, + {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, + {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, + {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, + {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, + {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, + {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, + {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, + {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, + {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, + {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, + {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01} +}; + +const u8 dm_cck_tx_bb_gain_ch14[CCKTxBBGainTableLength][8] = { + {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, + {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, + {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, + {0x2d, 0x2d, 0x27, 0x17, 0x00, 0x00, 0x00, 0x00}, + {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, + {0x28, 0x28, 0x22, 0x14, 0x00, 0x00, 0x00, 0x00}, + {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, + {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, + {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, + {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, + {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, + {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, + {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, + {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, + {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, + {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, + {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, + {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, + {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, + {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, + {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, + {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, + {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00} +}; + /*---------------------------Define Local Constant---------------------------*/ @@ -590,7 +683,7 @@ static void dm_TXPowerTrackingCallback_TSSI(struct net_device *dev) rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, - priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value); + dm_tx_bb_gain[priv->rfa_txpowertrackingindex_real]); } priv->rfc_txpowertrackingindex--; @@ -599,15 +692,16 @@ static void dm_TXPowerTrackingCallback_TSSI(struct net_device *dev) rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, - priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value); + dm_tx_bb_gain[priv->rfc_txpowertrackingindex_real]); } } else { - rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, + rtl8192_setBBreg(dev, + rOFDM0_XATxIQImbalance, bMaskDWord, - priv->txbbgain_table[4].txbbgain_value); + dm_tx_bb_gain[4]); rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, - bMaskDWord, priv->txbbgain_table[4].txbbgain_value); + bMaskDWord, dm_tx_bb_gain[4]); } } else { if (priv->rfa_txpowertrackingindex > 0) { @@ -617,11 +711,11 @@ static void dm_TXPowerTrackingCallback_TSSI(struct net_device *dev) rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, - priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value); + dm_tx_bb_gain[priv->rfa_txpowertrackingindex_real]); } } else rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, - bMaskDWord, priv->txbbgain_table[4].txbbgain_value); + bMaskDWord, dm_tx_bb_gain[4]); } } else { @@ -635,22 +729,21 @@ static void dm_TXPowerTrackingCallback_TSSI(struct net_device *dev) rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, - priv->txbbgain_table - [priv->rfa_txpowertrackingindex_real].txbbgain_value); + dm_tx_bb_gain[priv->rfa_txpowertrackingindex_real]); priv->rfc_txpowertrackingindex++; priv->rfc_txpowertrackingindex_real++; rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, - priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value); + dm_tx_bb_gain[priv->rfc_txpowertrackingindex_real]); } else { rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, - priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value); + dm_tx_bb_gain[TxBBGainTableLength - 1]); rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, - bMaskDWord, priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value); + bMaskDWord, dm_tx_bb_gain[TxBBGainTableLength - 1]); } } else { if (priv->rfa_txpowertrackingindex < (TxBBGainTableLength - 1)) { @@ -658,11 +751,11 @@ static void dm_TXPowerTrackingCallback_TSSI(struct net_device *dev) priv->rfa_txpowertrackingindex_real++; rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, - priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value); + dm_tx_bb_gain[priv->rfa_txpowertrackingindex_real]); } else rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, - priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value); + dm_tx_bb_gain[TxBBGainTableLength - 1]); } } if (RF_Type == RF_2T4R) { @@ -848,496 +941,6 @@ static void dm_InitializeTXPowerTracking_TSSI(struct net_device *dev) { struct r8192_priv *priv = rtllib_priv(dev); - - priv->txbbgain_table[0].txbb_iq_amplifygain = 12; - priv->txbbgain_table[0].txbbgain_value = 0x7f8001fe; - priv->txbbgain_table[1].txbb_iq_amplifygain = 11; - priv->txbbgain_table[1].txbbgain_value = 0x788001e2; - priv->txbbgain_table[2].txbb_iq_amplifygain = 10; - priv->txbbgain_table[2].txbbgain_value = 0x71c001c7; - priv->txbbgain_table[3].txbb_iq_amplifygain = 9; - priv->txbbgain_table[3].txbbgain_value = 0x6b8001ae; - priv->txbbgain_table[4].txbb_iq_amplifygain = 8; - priv->txbbgain_table[4].txbbgain_value = 0x65400195; - priv->txbbgain_table[5].txbb_iq_amplifygain = 7; - priv->txbbgain_table[5].txbbgain_value = 0x5fc0017f; - priv->txbbgain_table[6].txbb_iq_amplifygain = 6; - priv->txbbgain_table[6].txbbgain_value = 0x5a400169; - priv->txbbgain_table[7].txbb_iq_amplifygain = 5; - priv->txbbgain_table[7].txbbgain_value = 0x55400155; - priv->txbbgain_table[8].txbb_iq_amplifygain = 4; - priv->txbbgain_table[8].txbbgain_value = 0x50800142; - priv->txbbgain_table[9].txbb_iq_amplifygain = 3; - priv->txbbgain_table[9].txbbgain_value = 0x4c000130; - priv->txbbgain_table[10].txbb_iq_amplifygain = 2; - priv->txbbgain_table[10].txbbgain_value = 0x47c0011f; - priv->txbbgain_table[11].txbb_iq_amplifygain = 1; - priv->txbbgain_table[11].txbbgain_value = 0x43c0010f; - priv->txbbgain_table[12].txbb_iq_amplifygain = 0; - priv->txbbgain_table[12].txbbgain_value = 0x40000100; - priv->txbbgain_table[13].txbb_iq_amplifygain = -1; - priv->txbbgain_table[13].txbbgain_value = 0x3c8000f2; - priv->txbbgain_table[14].txbb_iq_amplifygain = -2; - priv->txbbgain_table[14].txbbgain_value = 0x390000e4; - priv->txbbgain_table[15].txbb_iq_amplifygain = -3; - priv->txbbgain_table[15].txbbgain_value = 0x35c000d7; - priv->txbbgain_table[16].txbb_iq_amplifygain = -4; - priv->txbbgain_table[16].txbbgain_value = 0x32c000cb; - priv->txbbgain_table[17].txbb_iq_amplifygain = -5; - priv->txbbgain_table[17].txbbgain_value = 0x300000c0; - priv->txbbgain_table[18].txbb_iq_amplifygain = -6; - priv->txbbgain_table[18].txbbgain_value = 0x2d4000b5; - priv->txbbgain_table[19].txbb_iq_amplifygain = -7; - priv->txbbgain_table[19].txbbgain_value = 0x2ac000ab; - priv->txbbgain_table[20].txbb_iq_amplifygain = -8; - priv->txbbgain_table[20].txbbgain_value = 0x288000a2; - priv->txbbgain_table[21].txbb_iq_amplifygain = -9; - priv->txbbgain_table[21].txbbgain_value = 0x26000098; - priv->txbbgain_table[22].txbb_iq_amplifygain = -10; - priv->txbbgain_table[22].txbbgain_value = 0x24000090; - priv->txbbgain_table[23].txbb_iq_amplifygain = -11; - priv->txbbgain_table[23].txbbgain_value = 0x22000088; - priv->txbbgain_table[24].txbb_iq_amplifygain = -12; - priv->txbbgain_table[24].txbbgain_value = 0x20000080; - priv->txbbgain_table[25].txbb_iq_amplifygain = -13; - priv->txbbgain_table[25].txbbgain_value = 0x1a00006c; - priv->txbbgain_table[26].txbb_iq_amplifygain = -14; - priv->txbbgain_table[26].txbbgain_value = 0x1c800072; - priv->txbbgain_table[27].txbb_iq_amplifygain = -15; - priv->txbbgain_table[27].txbbgain_value = 0x18000060; - priv->txbbgain_table[28].txbb_iq_amplifygain = -16; - priv->txbbgain_table[28].txbbgain_value = 0x19800066; - priv->txbbgain_table[29].txbb_iq_amplifygain = -17; - priv->txbbgain_table[29].txbbgain_value = 0x15800056; - priv->txbbgain_table[30].txbb_iq_amplifygain = -18; - priv->txbbgain_table[30].txbbgain_value = 0x26c0005b; - priv->txbbgain_table[31].txbb_iq_amplifygain = -19; - priv->txbbgain_table[31].txbbgain_value = 0x14400051; - priv->txbbgain_table[32].txbb_iq_amplifygain = -20; - priv->txbbgain_table[32].txbbgain_value = 0x24400051; - priv->txbbgain_table[33].txbb_iq_amplifygain = -21; - priv->txbbgain_table[33].txbbgain_value = 0x1300004c; - priv->txbbgain_table[34].txbb_iq_amplifygain = -22; - priv->txbbgain_table[34].txbbgain_value = 0x12000048; - priv->txbbgain_table[35].txbb_iq_amplifygain = -23; - priv->txbbgain_table[35].txbbgain_value = 0x11000044; - priv->txbbgain_table[36].txbb_iq_amplifygain = -24; - priv->txbbgain_table[36].txbbgain_value = 0x10000040; - - priv->cck_txbbgain_table[0].ccktxbb_valuearray[0] = 0x36; - priv->cck_txbbgain_table[0].ccktxbb_valuearray[1] = 0x35; - priv->cck_txbbgain_table[0].ccktxbb_valuearray[2] = 0x2e; - priv->cck_txbbgain_table[0].ccktxbb_valuearray[3] = 0x25; - priv->cck_txbbgain_table[0].ccktxbb_valuearray[4] = 0x1c; - priv->cck_txbbgain_table[0].ccktxbb_valuearray[5] = 0x12; - priv->cck_txbbgain_table[0].ccktxbb_valuearray[6] = 0x09; - priv->cck_txbbgain_table[0].ccktxbb_valuearray[7] = 0x04; - - priv->cck_txbbgain_table[1].ccktxbb_valuearray[0] = 0x33; - priv->cck_txbbgain_table[1].ccktxbb_valuearray[1] = 0x32; - priv->cck_txbbgain_table[1].ccktxbb_valuearray[2] = 0x2b; - priv->cck_txbbgain_table[1].ccktxbb_valuearray[3] = 0x23; - priv->cck_txbbgain_table[1].ccktxbb_valuearray[4] = 0x1a; - priv->cck_txbbgain_table[1].ccktxbb_valuearray[5] = 0x11; - priv->cck_txbbgain_table[1].ccktxbb_valuearray[6] = 0x08; - priv->cck_txbbgain_table[1].ccktxbb_valuearray[7] = 0x04; - - priv->cck_txbbgain_table[2].ccktxbb_valuearray[0] = 0x30; - priv->cck_txbbgain_table[2].ccktxbb_valuearray[1] = 0x2f; - priv->cck_txbbgain_table[2].ccktxbb_valuearray[2] = 0x29; - priv->cck_txbbgain_table[2].ccktxbb_valuearray[3] = 0x21; - priv->cck_txbbgain_table[2].ccktxbb_valuearray[4] = 0x19; - priv->cck_txbbgain_table[2].ccktxbb_valuearray[5] = 0x10; - priv->cck_txbbgain_table[2].ccktxbb_valuearray[6] = 0x08; - priv->cck_txbbgain_table[2].ccktxbb_valuearray[7] = 0x03; - - priv->cck_txbbgain_table[3].ccktxbb_valuearray[0] = 0x2d; - priv->cck_txbbgain_table[3].ccktxbb_valuearray[1] = 0x2d; - priv->cck_txbbgain_table[3].ccktxbb_valuearray[2] = 0x27; - priv->cck_txbbgain_table[3].ccktxbb_valuearray[3] = 0x1f; - priv->cck_txbbgain_table[3].ccktxbb_valuearray[4] = 0x18; - priv->cck_txbbgain_table[3].ccktxbb_valuearray[5] = 0x0f; - priv->cck_txbbgain_table[3].ccktxbb_valuearray[6] = 0x08; - priv->cck_txbbgain_table[3].ccktxbb_valuearray[7] = 0x03; - - priv->cck_txbbgain_table[4].ccktxbb_valuearray[0] = 0x2b; - priv->cck_txbbgain_table[4].ccktxbb_valuearray[1] = 0x2a; - priv->cck_txbbgain_table[4].ccktxbb_valuearray[2] = 0x25; - priv->cck_txbbgain_table[4].ccktxbb_valuearray[3] = 0x1e; - priv->cck_txbbgain_table[4].ccktxbb_valuearray[4] = 0x16; - priv->cck_txbbgain_table[4].ccktxbb_valuearray[5] = 0x0e; - priv->cck_txbbgain_table[4].ccktxbb_valuearray[6] = 0x07; - priv->cck_txbbgain_table[4].ccktxbb_valuearray[7] = 0x03; - - priv->cck_txbbgain_table[5].ccktxbb_valuearray[0] = 0x28; - priv->cck_txbbgain_table[5].ccktxbb_valuearray[1] = 0x28; - priv->cck_txbbgain_table[5].ccktxbb_valuearray[2] = 0x22; - priv->cck_txbbgain_table[5].ccktxbb_valuearray[3] = 0x1c; - priv->cck_txbbgain_table[5].ccktxbb_valuearray[4] = 0x15; - priv->cck_txbbgain_table[5].ccktxbb_valuearray[5] = 0x0d; - priv->cck_txbbgain_table[5].ccktxbb_valuearray[6] = 0x07; - priv->cck_txbbgain_table[5].ccktxbb_valuearray[7] = 0x03; - - priv->cck_txbbgain_table[6].ccktxbb_valuearray[0] = 0x26; - priv->cck_txbbgain_table[6].ccktxbb_valuearray[1] = 0x25; - priv->cck_txbbgain_table[6].ccktxbb_valuearray[2] = 0x21; - priv->cck_txbbgain_table[6].ccktxbb_valuearray[3] = 0x1b; - priv->cck_txbbgain_table[6].ccktxbb_valuearray[4] = 0x14; - priv->cck_txbbgain_table[6].ccktxbb_valuearray[5] = 0x0d; - priv->cck_txbbgain_table[6].ccktxbb_valuearray[6] = 0x06; - priv->cck_txbbgain_table[6].ccktxbb_valuearray[7] = 0x03; - - priv->cck_txbbgain_table[7].ccktxbb_valuearray[0] = 0x24; - priv->cck_txbbgain_table[7].ccktxbb_valuearray[1] = 0x23; - priv->cck_txbbgain_table[7].ccktxbb_valuearray[2] = 0x1f; - priv->cck_txbbgain_table[7].ccktxbb_valuearray[3] = 0x19; - priv->cck_txbbgain_table[7].ccktxbb_valuearray[4] = 0x13; - priv->cck_txbbgain_table[7].ccktxbb_valuearray[5] = 0x0c; - priv->cck_txbbgain_table[7].ccktxbb_valuearray[6] = 0x06; - priv->cck_txbbgain_table[7].ccktxbb_valuearray[7] = 0x03; - - priv->cck_txbbgain_table[8].ccktxbb_valuearray[0] = 0x22; - priv->cck_txbbgain_table[8].ccktxbb_valuearray[1] = 0x21; - priv->cck_txbbgain_table[8].ccktxbb_valuearray[2] = 0x1d; - priv->cck_txbbgain_table[8].ccktxbb_valuearray[3] = 0x18; - priv->cck_txbbgain_table[8].ccktxbb_valuearray[4] = 0x11; - priv->cck_txbbgain_table[8].ccktxbb_valuearray[5] = 0x0b; - priv->cck_txbbgain_table[8].ccktxbb_valuearray[6] = 0x06; - priv->cck_txbbgain_table[8].ccktxbb_valuearray[7] = 0x02; - - priv->cck_txbbgain_table[9].ccktxbb_valuearray[0] = 0x20; - priv->cck_txbbgain_table[9].ccktxbb_valuearray[1] = 0x20; - priv->cck_txbbgain_table[9].ccktxbb_valuearray[2] = 0x1b; - priv->cck_txbbgain_table[9].ccktxbb_valuearray[3] = 0x16; - priv->cck_txbbgain_table[9].ccktxbb_valuearray[4] = 0x11; - priv->cck_txbbgain_table[9].ccktxbb_valuearray[5] = 0x08; - priv->cck_txbbgain_table[9].ccktxbb_valuearray[6] = 0x05; - priv->cck_txbbgain_table[9].ccktxbb_valuearray[7] = 0x02; - - priv->cck_txbbgain_table[10].ccktxbb_valuearray[0] = 0x1f; - priv->cck_txbbgain_table[10].ccktxbb_valuearray[1] = 0x1e; - priv->cck_txbbgain_table[10].ccktxbb_valuearray[2] = 0x1a; - priv->cck_txbbgain_table[10].ccktxbb_valuearray[3] = 0x15; - priv->cck_txbbgain_table[10].ccktxbb_valuearray[4] = 0x10; - priv->cck_txbbgain_table[10].ccktxbb_valuearray[5] = 0x0a; - priv->cck_txbbgain_table[10].ccktxbb_valuearray[6] = 0x05; - priv->cck_txbbgain_table[10].ccktxbb_valuearray[7] = 0x02; - - priv->cck_txbbgain_table[11].ccktxbb_valuearray[0] = 0x1d; - priv->cck_txbbgain_table[11].ccktxbb_valuearray[1] = 0x1c; - priv->cck_txbbgain_table[11].ccktxbb_valuearray[2] = 0x18; - priv->cck_txbbgain_table[11].ccktxbb_valuearray[3] = 0x14; - priv->cck_txbbgain_table[11].ccktxbb_valuearray[4] = 0x0f; - priv->cck_txbbgain_table[11].ccktxbb_valuearray[5] = 0x0a; - priv->cck_txbbgain_table[11].ccktxbb_valuearray[6] = 0x05; - priv->cck_txbbgain_table[11].ccktxbb_valuearray[7] = 0x02; - - priv->cck_txbbgain_table[12].ccktxbb_valuearray[0] = 0x1b; - priv->cck_txbbgain_table[12].ccktxbb_valuearray[1] = 0x1a; - priv->cck_txbbgain_table[12].ccktxbb_valuearray[2] = 0x17; - priv->cck_txbbgain_table[12].ccktxbb_valuearray[3] = 0x13; - priv->cck_txbbgain_table[12].ccktxbb_valuearray[4] = 0x0e; - priv->cck_txbbgain_table[12].ccktxbb_valuearray[5] = 0x09; - priv->cck_txbbgain_table[12].ccktxbb_valuearray[6] = 0x04; - priv->cck_txbbgain_table[12].ccktxbb_valuearray[7] = 0x02; - - priv->cck_txbbgain_table[13].ccktxbb_valuearray[0] = 0x1a; - priv->cck_txbbgain_table[13].ccktxbb_valuearray[1] = 0x19; - priv->cck_txbbgain_table[13].ccktxbb_valuearray[2] = 0x16; - priv->cck_txbbgain_table[13].ccktxbb_valuearray[3] = 0x12; - priv->cck_txbbgain_table[13].ccktxbb_valuearray[4] = 0x0d; - priv->cck_txbbgain_table[13].ccktxbb_valuearray[5] = 0x09; - priv->cck_txbbgain_table[13].ccktxbb_valuearray[6] = 0x04; - priv->cck_txbbgain_table[13].ccktxbb_valuearray[7] = 0x02; - - priv->cck_txbbgain_table[14].ccktxbb_valuearray[0] = 0x18; - priv->cck_txbbgain_table[14].ccktxbb_valuearray[1] = 0x17; - priv->cck_txbbgain_table[14].ccktxbb_valuearray[2] = 0x15; - priv->cck_txbbgain_table[14].ccktxbb_valuearray[3] = 0x11; - priv->cck_txbbgain_table[14].ccktxbb_valuearray[4] = 0x0c; - priv->cck_txbbgain_table[14].ccktxbb_valuearray[5] = 0x08; - priv->cck_txbbgain_table[14].ccktxbb_valuearray[6] = 0x04; - priv->cck_txbbgain_table[14].ccktxbb_valuearray[7] = 0x02; - - priv->cck_txbbgain_table[15].ccktxbb_valuearray[0] = 0x17; - priv->cck_txbbgain_table[15].ccktxbb_valuearray[1] = 0x16; - priv->cck_txbbgain_table[15].ccktxbb_valuearray[2] = 0x13; - priv->cck_txbbgain_table[15].ccktxbb_valuearray[3] = 0x10; - priv->cck_txbbgain_table[15].ccktxbb_valuearray[4] = 0x0c; - priv->cck_txbbgain_table[15].ccktxbb_valuearray[5] = 0x08; - priv->cck_txbbgain_table[15].ccktxbb_valuearray[6] = 0x04; - priv->cck_txbbgain_table[15].ccktxbb_valuearray[7] = 0x02; - - priv->cck_txbbgain_table[16].ccktxbb_valuearray[0] = 0x16; - priv->cck_txbbgain_table[16].ccktxbb_valuearray[1] = 0x15; - priv->cck_txbbgain_table[16].ccktxbb_valuearray[2] = 0x12; - priv->cck_txbbgain_table[16].ccktxbb_valuearray[3] = 0x0f; - priv->cck_txbbgain_table[16].ccktxbb_valuearray[4] = 0x0b; - priv->cck_txbbgain_table[16].ccktxbb_valuearray[5] = 0x07; - priv->cck_txbbgain_table[16].ccktxbb_valuearray[6] = 0x04; - priv->cck_txbbgain_table[16].ccktxbb_valuearray[7] = 0x01; - - priv->cck_txbbgain_table[17].ccktxbb_valuearray[0] = 0x14; - priv->cck_txbbgain_table[17].ccktxbb_valuearray[1] = 0x14; - priv->cck_txbbgain_table[17].ccktxbb_valuearray[2] = 0x11; - priv->cck_txbbgain_table[17].ccktxbb_valuearray[3] = 0x0e; - priv->cck_txbbgain_table[17].ccktxbb_valuearray[4] = 0x0b; - priv->cck_txbbgain_table[17].ccktxbb_valuearray[5] = 0x07; - priv->cck_txbbgain_table[17].ccktxbb_valuearray[6] = 0x03; - priv->cck_txbbgain_table[17].ccktxbb_valuearray[7] = 0x02; - - priv->cck_txbbgain_table[18].ccktxbb_valuearray[0] = 0x13; - priv->cck_txbbgain_table[18].ccktxbb_valuearray[1] = 0x13; - priv->cck_txbbgain_table[18].ccktxbb_valuearray[2] = 0x10; - priv->cck_txbbgain_table[18].ccktxbb_valuearray[3] = 0x0d; - priv->cck_txbbgain_table[18].ccktxbb_valuearray[4] = 0x0a; - priv->cck_txbbgain_table[18].ccktxbb_valuearray[5] = 0x06; - priv->cck_txbbgain_table[18].ccktxbb_valuearray[6] = 0x03; - priv->cck_txbbgain_table[18].ccktxbb_valuearray[7] = 0x01; - - priv->cck_txbbgain_table[19].ccktxbb_valuearray[0] = 0x12; - priv->cck_txbbgain_table[19].ccktxbb_valuearray[1] = 0x12; - priv->cck_txbbgain_table[19].ccktxbb_valuearray[2] = 0x0f; - priv->cck_txbbgain_table[19].ccktxbb_valuearray[3] = 0x0c; - priv->cck_txbbgain_table[19].ccktxbb_valuearray[4] = 0x09; - priv->cck_txbbgain_table[19].ccktxbb_valuearray[5] = 0x06; - priv->cck_txbbgain_table[19].ccktxbb_valuearray[6] = 0x03; - priv->cck_txbbgain_table[19].ccktxbb_valuearray[7] = 0x01; - - priv->cck_txbbgain_table[20].ccktxbb_valuearray[0] = 0x11; - priv->cck_txbbgain_table[20].ccktxbb_valuearray[1] = 0x11; - priv->cck_txbbgain_table[20].ccktxbb_valuearray[2] = 0x0f; - priv->cck_txbbgain_table[20].ccktxbb_valuearray[3] = 0x0c; - priv->cck_txbbgain_table[20].ccktxbb_valuearray[4] = 0x09; - priv->cck_txbbgain_table[20].ccktxbb_valuearray[5] = 0x06; - priv->cck_txbbgain_table[20].ccktxbb_valuearray[6] = 0x03; - priv->cck_txbbgain_table[20].ccktxbb_valuearray[7] = 0x01; - - priv->cck_txbbgain_table[21].ccktxbb_valuearray[0] = 0x10; - priv->cck_txbbgain_table[21].ccktxbb_valuearray[1] = 0x10; - priv->cck_txbbgain_table[21].ccktxbb_valuearray[2] = 0x0e; - priv->cck_txbbgain_table[21].ccktxbb_valuearray[3] = 0x0b; - priv->cck_txbbgain_table[21].ccktxbb_valuearray[4] = 0x08; - priv->cck_txbbgain_table[21].ccktxbb_valuearray[5] = 0x05; - priv->cck_txbbgain_table[21].ccktxbb_valuearray[6] = 0x03; - priv->cck_txbbgain_table[21].ccktxbb_valuearray[7] = 0x01; - - priv->cck_txbbgain_table[22].ccktxbb_valuearray[0] = 0x0f; - priv->cck_txbbgain_table[22].ccktxbb_valuearray[1] = 0x0f; - priv->cck_txbbgain_table[22].ccktxbb_valuearray[2] = 0x0d; - priv->cck_txbbgain_table[22].ccktxbb_valuearray[3] = 0x0b; - priv->cck_txbbgain_table[22].ccktxbb_valuearray[4] = 0x08; - priv->cck_txbbgain_table[22].ccktxbb_valuearray[5] = 0x05; - priv->cck_txbbgain_table[22].ccktxbb_valuearray[6] = 0x03; - priv->cck_txbbgain_table[22].ccktxbb_valuearray[7] = 0x01; - - priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[0] = 0x36; - priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[1] = 0x35; - priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[2] = 0x2e; - priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[3] = 0x1b; - priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[4] = 0x00; - priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[5] = 0x00; - priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[6] = 0x00; - priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[7] = 0x00; - - priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[0] = 0x33; - priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[1] = 0x32; - priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[2] = 0x2b; - priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[3] = 0x19; - priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[4] = 0x00; - priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[5] = 0x00; - priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[6] = 0x00; - priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[7] = 0x00; - - priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[0] = 0x30; - priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[1] = 0x2f; - priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[2] = 0x29; - priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[3] = 0x18; - priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[4] = 0x00; - priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[5] = 0x00; - priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[6] = 0x00; - priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[7] = 0x00; - - priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[0] = 0x2d; - priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[1] = 0x2d; - priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[2] = 0x27; - priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[3] = 0x17; - priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[4] = 0x00; - priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[5] = 0x00; - priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[6] = 0x00; - priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[7] = 0x00; - - priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[0] = 0x2b; - priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[1] = 0x2a; - priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[2] = 0x25; - priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[3] = 0x15; - priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[4] = 0x00; - priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[5] = 0x00; - priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[6] = 0x00; - priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[7] = 0x00; - - priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[0] = 0x28; - priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[1] = 0x28; - priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[2] = 0x22; - priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[3] = 0x14; - priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[4] = 0x00; - priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[5] = 0x00; - priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[6] = 0x00; - priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[7] = 0x00; - - priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[0] = 0x26; - priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[1] = 0x25; - priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[2] = 0x21; - priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[3] = 0x13; - priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[4] = 0x00; - priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[5] = 0x00; - priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[6] = 0x00; - priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[7] = 0x00; - - priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[0] = 0x24; - priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[1] = 0x23; - priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[2] = 0x1f; - priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[3] = 0x12; - priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[4] = 0x00; - priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[5] = 0x00; - priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[6] = 0x00; - priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[7] = 0x00; - - priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[0] = 0x22; - priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[1] = 0x21; - priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[2] = 0x1d; - priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[3] = 0x11; - priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[4] = 0x00; - priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[5] = 0x00; - priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[6] = 0x00; - priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[7] = 0x00; - - priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[0] = 0x20; - priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[1] = 0x20; - priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[2] = 0x1b; - priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[3] = 0x10; - priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[4] = 0x00; - priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[5] = 0x00; - priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[6] = 0x00; - priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[7] = 0x00; - - priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[0] = 0x1f; - priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[1] = 0x1e; - priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[2] = 0x1a; - priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[3] = 0x0f; - priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[4] = 0x00; - priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[5] = 0x00; - priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[6] = 0x00; - priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[7] = 0x00; - - priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[0] = 0x1d; - priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[1] = 0x1c; - priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[2] = 0x18; - priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[3] = 0x0e; - priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[4] = 0x00; - priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[5] = 0x00; - priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[6] = 0x00; - priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[7] = 0x00; - - priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[0] = 0x1b; - priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[1] = 0x1a; - priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[2] = 0x17; - priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[3] = 0x0e; - priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[4] = 0x00; - priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[5] = 0x00; - priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[6] = 0x00; - priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[7] = 0x00; - - priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[0] = 0x1a; - priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[1] = 0x19; - priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[2] = 0x16; - priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[3] = 0x0d; - priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[4] = 0x00; - priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[5] = 0x00; - priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[6] = 0x00; - priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[7] = 0x00; - - priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[0] = 0x18; - priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[1] = 0x17; - priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[2] = 0x15; - priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[3] = 0x0c; - priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[4] = 0x00; - priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[5] = 0x00; - priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[6] = 0x00; - priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[7] = 0x00; - - priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[0] = 0x17; - priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[1] = 0x16; - priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[2] = 0x13; - priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[3] = 0x0b; - priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[4] = 0x00; - priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[5] = 0x00; - priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[6] = 0x00; - priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[7] = 0x00; - - priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[0] = 0x16; - priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[1] = 0x15; - priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[2] = 0x12; - priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[3] = 0x0b; - priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[4] = 0x00; - priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[5] = 0x00; - priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[6] = 0x00; - priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[7] = 0x00; - - priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[0] = 0x14; - priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[1] = 0x14; - priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[2] = 0x11; - priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[3] = 0x0a; - priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[4] = 0x00; - priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[5] = 0x00; - priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[6] = 0x00; - priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[7] = 0x00; - - priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[0] = 0x13; - priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[1] = 0x13; - priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[2] = 0x10; - priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[3] = 0x0a; - priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[4] = 0x00; - priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[5] = 0x00; - priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[6] = 0x00; - priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[7] = 0x00; - - priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[0] = 0x12; - priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[1] = 0x12; - priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[2] = 0x0f; - priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[3] = 0x09; - priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[4] = 0x00; - priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[5] = 0x00; - priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[6] = 0x00; - priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[7] = 0x00; - - priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[0] = 0x11; - priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[1] = 0x11; - priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[2] = 0x0f; - priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[3] = 0x09; - priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[4] = 0x00; - priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[5] = 0x00; - priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[6] = 0x00; - priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[7] = 0x00; - - priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[0] = 0x10; - priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[1] = 0x10; - priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[2] = 0x0e; - priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[3] = 0x08; - priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[4] = 0x00; - priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[5] = 0x00; - priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[6] = 0x00; - priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[7] = 0x00; - - priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[0] = 0x0f; - priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[1] = 0x0f; - priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[2] = 0x0d; - priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[3] = 0x08; - priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[4] = 0x00; - priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[5] = 0x00; - priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[6] = 0x00; - priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[7] = 0x00; - priv->btxpower_tracking = true; priv->txpower_count = 0; priv->btxpower_trackingInit = false; @@ -1436,39 +1039,38 @@ static void dm_CCKTxPowerAdjust_TSSI(struct net_device *dev, bool bInCH14) { u32 TempVal; struct r8192_priv *priv = rtllib_priv(dev); + u8 attenuation = (u8)priv->CCKPresentAttentuation; TempVal = 0; if (!bInCH14) { - TempVal = (u32)(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[0] + - (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[1]<<8)); + TempVal = (u32)(dm_cck_tx_bb_gain[attenuation][0] + + (dm_cck_tx_bb_gain[attenuation][1] << 8)); rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal); - TempVal = (u32)(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[2] + - (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[3]<<8) + - (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[4]<<16)+ - (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[5]<<24)); + TempVal = (u32)((dm_cck_tx_bb_gain[attenuation][2]) + + (dm_cck_tx_bb_gain[attenuation][3] << 8) + + (dm_cck_tx_bb_gain[attenuation][4] << 16)+ + (dm_cck_tx_bb_gain[attenuation][5] << 24)); rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal); - TempVal = (u32)(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[6] + - (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[7]<<8)); + TempVal = (u32)(dm_cck_tx_bb_gain[attenuation][6] + + (dm_cck_tx_bb_gain[attenuation][7] << 8)); rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal); } else { - TempVal = (u32)(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[0] + - (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[1]<<8)); + TempVal = (u32)((dm_cck_tx_bb_gain_ch14[attenuation][0]) + + (dm_cck_tx_bb_gain_ch14[attenuation][1] << 8)); rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal); - TempVal = (u32)(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[2] + - (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[3]<<8) + - (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[4]<<16)+ - (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[5]<<24)); + TempVal = (u32)((dm_cck_tx_bb_gain_ch14[attenuation][2]) + + (dm_cck_tx_bb_gain_ch14[attenuation][3] << 8) + + (dm_cck_tx_bb_gain_ch14[attenuation][4] << 16)+ + (dm_cck_tx_bb_gain_ch14[attenuation][5] << 24)); rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal); - TempVal = (u32)(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[6] + - (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[7]<<8)); + TempVal = (u32)((dm_cck_tx_bb_gain_ch14[attenuation][6]) + + (dm_cck_tx_bb_gain_ch14[attenuation][7] << 8)); rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal); } - - } static void dm_CCKTxPowerAdjust_ThermalMeter(struct net_device *dev, bool bInCH14) @@ -1535,26 +1137,30 @@ static void dm_txpower_reset_recovery(struct net_device *dev) RT_TRACE(COMP_POWER_TRACKING, "Start Reset Recovery ==>\n"); rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, - priv->txbbgain_table[priv->rfa_txpowertrackingindex].txbbgain_value); + dm_tx_bb_gain[priv->rfa_txpowertrackingindex]); RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in 0xc80 is %08x\n", - priv->txbbgain_table[priv->rfa_txpowertrackingindex].txbbgain_value); - RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in RFA_txPowerTrackingIndex is %x\n", + dm_tx_bb_gain[priv->rfa_txpowertrackingindex]); + RT_TRACE(COMP_POWER_TRACKING, + "Reset Recovery: Fill in RFA_txPowerTrackingIndex is %x\n", priv->rfa_txpowertrackingindex); - RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery : RF A I/Q Amplify Gain is %ld\n", - priv->txbbgain_table[priv->rfa_txpowertrackingindex].txbb_iq_amplifygain); - RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: CCK Attenuation is %d dB\n", + RT_TRACE(COMP_POWER_TRACKING, + "Reset Recovery : RF A I/Q Amplify Gain is %d\n", + dm_tx_bb_gain_idx_to_amplify(priv->rfa_txpowertrackingindex)); + RT_TRACE(COMP_POWER_TRACKING, + "Reset Recovery: CCK Attenuation is %d dB\n", priv->CCKPresentAttentuation); dm_cck_txpower_adjust(dev, priv->bcck_in_ch14); rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, - priv->txbbgain_table[priv->rfc_txpowertrackingindex].txbbgain_value); + dm_tx_bb_gain[priv->rfc_txpowertrackingindex]); RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in 0xc90 is %08x\n", - priv->txbbgain_table[priv->rfc_txpowertrackingindex].txbbgain_value); - RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in RFC_txPowerTrackingIndex is %x\n", + dm_tx_bb_gain[priv->rfc_txpowertrackingindex]); + RT_TRACE(COMP_POWER_TRACKING, + "Reset Recovery: Fill in RFC_txPowerTrackingIndex is %x\n", priv->rfc_txpowertrackingindex); - RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery : RF C I/Q Amplify Gain is %ld\n", - priv->txbbgain_table[priv->rfc_txpowertrackingindex].txbb_iq_amplifygain); - + RT_TRACE(COMP_POWER_TRACKING, + "Reset Recovery : RF C I/Q Amplify Gain is %d\n", + dm_tx_bb_gain_idx_to_amplify(priv->rfc_txpowertrackingindex)); } void dm_restore_dynamic_mechanism_state(struct net_device *dev) diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.h b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.h index 3f02e11..6be8e8b 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.h +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.h @@ -252,11 +252,20 @@ extern u8 dm_shadow[16][256]; extern struct drx_path_sel DM_RxPathSelTable; extern u8 test_flag; + +/* Pre-calculated gain tables */ +extern const u32 dm_tx_bb_gain[TxBBGainTableLength]; +extern const u8 dm_cck_tx_bb_gain[CCKTxBBGainTableLength][8]; +extern const u8 dm_cck_tx_bb_gain_ch14[CCKTxBBGainTableLength][8]; +/* Maps table index to iq amplify gain (dB, 12 to -24dB) */ +#define dm_tx_bb_gain_idx_to_amplify(idx) (-idx + 12) + /*------------------------Export global variable----------------------------*/ /*--------------------------Exported Function prototype---------------------*/ /*--------------------------Exported Function prototype---------------------*/ + extern void init_hal_dm(struct net_device *dev); extern void deinit_hal_dm(struct net_device *dev); -- 1.8.4.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 6/8] staging: rtl8192e: Fix LINE_SPACING warning 2015-04-07 23:08 [PATCH 0/8] staging: rtl8192e: Fix more checkpatch.pl warnings Mateusz Kulikowski ` (4 preceding siblings ...) 2015-04-07 23:08 ` [PATCH 5/8] staging: rtl8192e: Remove bb tx gains from r8192_priv Mateusz Kulikowski @ 2015-04-07 23:08 ` Mateusz Kulikowski 2015-04-07 23:08 ` [PATCH 7/8] staging: rtl8192e: Fix DEEP_INDENTATION warnings in rtllib_parse_info_param() Mateusz Kulikowski ` (2 subsequent siblings) 8 siblings, 0 replies; 10+ messages in thread From: Mateusz Kulikowski @ 2015-04-07 23:08 UTC (permalink / raw) To: gregkh; +Cc: Mateusz Kulikowski, devel, linux-kernel Trivial fix - add newline in dm_InitializeTXPowerTracking_TSSI() Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> --- drivers/staging/rtl8192e/rtl8192e/rtl_dm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c index c99d584..9de5846 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c @@ -941,6 +941,7 @@ static void dm_InitializeTXPowerTracking_TSSI(struct net_device *dev) { struct r8192_priv *priv = rtllib_priv(dev); + priv->btxpower_tracking = true; priv->txpower_count = 0; priv->btxpower_trackingInit = false; -- 1.8.4.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 7/8] staging: rtl8192e: Fix DEEP_INDENTATION warnings in rtllib_parse_info_param() 2015-04-07 23:08 [PATCH 0/8] staging: rtl8192e: Fix more checkpatch.pl warnings Mateusz Kulikowski ` (5 preceding siblings ...) 2015-04-07 23:08 ` [PATCH 6/8] staging: rtl8192e: Fix LINE_SPACING warning Mateusz Kulikowski @ 2015-04-07 23:08 ` Mateusz Kulikowski 2015-04-07 23:08 ` [PATCH 8/8] staging: rtl8192e: Fix DEEP_INDENTATION warnings in rtl_dm.c Mateusz Kulikowski 2015-04-13 22:37 ` [PATCH 0/8] staging: rtl8192e: Fix more checkpatch.pl warnings Mateusz Kulikowski 8 siblings, 0 replies; 10+ messages in thread From: Mateusz Kulikowski @ 2015-04-07 23:08 UTC (permalink / raw) To: gregkh; +Cc: Mateusz Kulikowski, devel, linux-kernel - Replace ?: with min_t - Remove condition that is always true Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> --- drivers/staging/rtl8192e/rtllib_rx.c | 21 ++++++++------------- 1 file changed, 8 insertions(+), 13 deletions(-) diff --git a/drivers/staging/rtl8192e/rtllib_rx.c b/drivers/staging/rtl8192e/rtllib_rx.c index 95cd17e..bb789cc 100644 --- a/drivers/staging/rtl8192e/rtllib_rx.c +++ b/drivers/staging/rtl8192e/rtllib_rx.c @@ -1924,13 +1924,12 @@ int rtllib_parse_info_param(struct rtllib_device *ieee, info_element->data[2] == 0x4c && info_element->data[3] == 0x033) { - tmp_htcap_len = min_t(u8, info_element->len, MAX_IE_LEN); - if (tmp_htcap_len != 0) { - network->bssht.bdHTSpecVer = HT_SPEC_VER_EWC; - network->bssht.bdHTCapLen = tmp_htcap_len > sizeof(network->bssht.bdHTCapBuf) ? - sizeof(network->bssht.bdHTCapBuf) : tmp_htcap_len; - memcpy(network->bssht.bdHTCapBuf, info_element->data, network->bssht.bdHTCapLen); - } + tmp_htcap_len = min_t(u8, info_element->len, MAX_IE_LEN); + if (tmp_htcap_len != 0) { + network->bssht.bdHTSpecVer = HT_SPEC_VER_EWC; + network->bssht.bdHTCapLen = min_t(u16, tmp_htcap_len, sizeof(network->bssht.bdHTCapBuf)); + memcpy(network->bssht.bdHTCapBuf, info_element->data, network->bssht.bdHTCapLen); + } } if (tmp_htcap_len != 0) { network->bssht.bdSupportHT = true; @@ -1951,12 +1950,8 @@ int rtllib_parse_info_param(struct rtllib_device *ieee, tmp_htinfo_len = min_t(u8, info_element->len, MAX_IE_LEN); if (tmp_htinfo_len != 0) { network->bssht.bdHTSpecVer = HT_SPEC_VER_EWC; - if (tmp_htinfo_len) { - network->bssht.bdHTInfoLen = tmp_htinfo_len > sizeof(network->bssht.bdHTInfoBuf) ? - sizeof(network->bssht.bdHTInfoBuf) : tmp_htinfo_len; - memcpy(network->bssht.bdHTInfoBuf, info_element->data, network->bssht.bdHTInfoLen); - } - + network->bssht.bdHTInfoLen = min_t(u16, tmp_htinfo_len, sizeof(network->bssht.bdHTInfoBuf)); + memcpy(network->bssht.bdHTInfoBuf, info_element->data, network->bssht.bdHTInfoLen); } } -- 1.8.4.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 8/8] staging: rtl8192e: Fix DEEP_INDENTATION warnings in rtl_dm.c 2015-04-07 23:08 [PATCH 0/8] staging: rtl8192e: Fix more checkpatch.pl warnings Mateusz Kulikowski ` (6 preceding siblings ...) 2015-04-07 23:08 ` [PATCH 7/8] staging: rtl8192e: Fix DEEP_INDENTATION warnings in rtllib_parse_info_param() Mateusz Kulikowski @ 2015-04-07 23:08 ` Mateusz Kulikowski 2015-04-13 22:37 ` [PATCH 0/8] staging: rtl8192e: Fix more checkpatch.pl warnings Mateusz Kulikowski 8 siblings, 0 replies; 10+ messages in thread From: Mateusz Kulikowski @ 2015-04-07 23:08 UTC (permalink / raw) To: gregkh; +Cc: Mateusz Kulikowski, devel, linux-kernel Separate parts of dm_TXPowerTrackingCallback_TSSI() into two new functions: - dm_tx_update_tssi_weak_signal() - dm_tx_update_tssi_strong_signal() Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> --- drivers/staging/rtl8192e/rtl8192e/rtl_dm.c | 176 +++++++++++++++-------------- 1 file changed, 93 insertions(+), 83 deletions(-) diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c index 9de5846..66baed80 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c @@ -542,6 +542,97 @@ static u8 CCKSwingTable_Ch14[CCK_Table_length][8] = { #define Tssi_Report_Value2 0x13e #define FW_Busy_Flag 0x13f +static void dm_tx_update_tssi_weak_signal(struct net_device *dev, u8 RF_Type) +{ + struct r8192_priv *p = rtllib_priv(dev); + + if (RF_Type == RF_2T4R) { + if ((p->rfa_txpowertrackingindex > 0) && + (p->rfc_txpowertrackingindex > 0)) { + p->rfa_txpowertrackingindex--; + if (p->rfa_txpowertrackingindex_real > 4) { + p->rfa_txpowertrackingindex_real--; + rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, + bMaskDWord, + dm_tx_bb_gain[p->rfa_txpowertrackingindex_real]); + } + + p->rfc_txpowertrackingindex--; + if (p->rfc_txpowertrackingindex_real > 4) { + p->rfc_txpowertrackingindex_real--; + rtl8192_setBBreg(dev, + rOFDM0_XCTxIQImbalance, + bMaskDWord, + dm_tx_bb_gain[p->rfc_txpowertrackingindex_real]); + } + } else { + rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, + bMaskDWord, + dm_tx_bb_gain[4]); + rtl8192_setBBreg(dev, + rOFDM0_XCTxIQImbalance, + bMaskDWord, dm_tx_bb_gain[4]); + } + } else { + if (p->rfa_txpowertrackingindex > 0) { + p->rfa_txpowertrackingindex--; + if (p->rfa_txpowertrackingindex_real > 4) { + p->rfa_txpowertrackingindex_real--; + rtl8192_setBBreg(dev, + rOFDM0_XATxIQImbalance, + bMaskDWord, + dm_tx_bb_gain[p->rfa_txpowertrackingindex_real]); + } + } else { + rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, + bMaskDWord, dm_tx_bb_gain[4]); + } + } +} + +static void dm_tx_update_tssi_strong_signal(struct net_device *dev, u8 RF_Type) +{ + struct r8192_priv *p = rtllib_priv(dev); + + if (RF_Type == RF_2T4R) { + if ((p->rfa_txpowertrackingindex < TxBBGainTableLength - 1) && + (p->rfc_txpowertrackingindex < TxBBGainTableLength - 1)) { + p->rfa_txpowertrackingindex++; + p->rfa_txpowertrackingindex_real++; + rtl8192_setBBreg(dev, + rOFDM0_XATxIQImbalance, + bMaskDWord, + dm_tx_bb_gain[p->rfa_txpowertrackingindex_real]); + p->rfc_txpowertrackingindex++; + p->rfc_txpowertrackingindex_real++; + rtl8192_setBBreg(dev, + rOFDM0_XCTxIQImbalance, + bMaskDWord, + dm_tx_bb_gain[p->rfc_txpowertrackingindex_real]); + } else { + rtl8192_setBBreg(dev, + rOFDM0_XATxIQImbalance, + bMaskDWord, + dm_tx_bb_gain[TxBBGainTableLength - 1]); + rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, + bMaskDWord, + dm_tx_bb_gain[TxBBGainTableLength - 1]); + } + } else { + if (p->rfa_txpowertrackingindex < (TxBBGainTableLength - 1)) { + p->rfa_txpowertrackingindex++; + p->rfa_txpowertrackingindex_real++; + rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, + bMaskDWord, + dm_tx_bb_gain[p->rfa_txpowertrackingindex_real]); + } else { + rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, + bMaskDWord, + dm_tx_bb_gain[TxBBGainTableLength - 1]); + } + } +} + static void dm_TXPowerTrackingCallback_TSSI(struct net_device *dev) { struct r8192_priv *priv = rtllib_priv(dev); @@ -673,90 +764,9 @@ static void dm_TXPowerTrackingCallback_TSSI(struct net_device *dev) return; } if (Avg_TSSI_Meas_from_driver < TSSI_13dBm - E_FOR_TX_POWER_TRACK) { - if (RF_Type == RF_2T4R) { - - if ((priv->rfa_txpowertrackingindex > 0) && - (priv->rfc_txpowertrackingindex > 0)) { - priv->rfa_txpowertrackingindex--; - if (priv->rfa_txpowertrackingindex_real > 4) { - priv->rfa_txpowertrackingindex_real--; - rtl8192_setBBreg(dev, - rOFDM0_XATxIQImbalance, - bMaskDWord, - dm_tx_bb_gain[priv->rfa_txpowertrackingindex_real]); - } - - priv->rfc_txpowertrackingindex--; - if (priv->rfc_txpowertrackingindex_real > 4) { - priv->rfc_txpowertrackingindex_real--; - rtl8192_setBBreg(dev, - rOFDM0_XCTxIQImbalance, - bMaskDWord, - dm_tx_bb_gain[priv->rfc_txpowertrackingindex_real]); - } - } else { - rtl8192_setBBreg(dev, - rOFDM0_XATxIQImbalance, - bMaskDWord, - dm_tx_bb_gain[4]); - rtl8192_setBBreg(dev, - rOFDM0_XCTxIQImbalance, - bMaskDWord, dm_tx_bb_gain[4]); - } - } else { - if (priv->rfa_txpowertrackingindex > 0) { - priv->rfa_txpowertrackingindex--; - if (priv->rfa_txpowertrackingindex_real > 4) { - priv->rfa_txpowertrackingindex_real--; - rtl8192_setBBreg(dev, - rOFDM0_XATxIQImbalance, - bMaskDWord, - dm_tx_bb_gain[priv->rfa_txpowertrackingindex_real]); - } - } else - rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, - bMaskDWord, dm_tx_bb_gain[4]); - - } + dm_tx_update_tssi_weak_signal(dev, RF_Type); } else { - if (RF_Type == RF_2T4R) { - if ((priv->rfa_txpowertrackingindex < - TxBBGainTableLength - 1) && - (priv->rfc_txpowertrackingindex < - TxBBGainTableLength - 1)) { - priv->rfa_txpowertrackingindex++; - priv->rfa_txpowertrackingindex_real++; - rtl8192_setBBreg(dev, - rOFDM0_XATxIQImbalance, - bMaskDWord, - dm_tx_bb_gain[priv->rfa_txpowertrackingindex_real]); - priv->rfc_txpowertrackingindex++; - priv->rfc_txpowertrackingindex_real++; - rtl8192_setBBreg(dev, - rOFDM0_XCTxIQImbalance, - bMaskDWord, - dm_tx_bb_gain[priv->rfc_txpowertrackingindex_real]); - } else { - rtl8192_setBBreg(dev, - rOFDM0_XATxIQImbalance, - bMaskDWord, - dm_tx_bb_gain[TxBBGainTableLength - 1]); - rtl8192_setBBreg(dev, - rOFDM0_XCTxIQImbalance, - bMaskDWord, dm_tx_bb_gain[TxBBGainTableLength - 1]); - } - } else { - if (priv->rfa_txpowertrackingindex < (TxBBGainTableLength - 1)) { - priv->rfa_txpowertrackingindex++; - priv->rfa_txpowertrackingindex_real++; - rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, - bMaskDWord, - dm_tx_bb_gain[priv->rfa_txpowertrackingindex_real]); - } else - rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, - bMaskDWord, - dm_tx_bb_gain[TxBBGainTableLength - 1]); - } + dm_tx_update_tssi_strong_signal(dev, RF_Type); } if (RF_Type == RF_2T4R) { priv->CCKPresentAttentuation_difference -- 1.8.4.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 0/8] staging: rtl8192e: Fix more checkpatch.pl warnings 2015-04-07 23:08 [PATCH 0/8] staging: rtl8192e: Fix more checkpatch.pl warnings Mateusz Kulikowski ` (7 preceding siblings ...) 2015-04-07 23:08 ` [PATCH 8/8] staging: rtl8192e: Fix DEEP_INDENTATION warnings in rtl_dm.c Mateusz Kulikowski @ 2015-04-13 22:37 ` Mateusz Kulikowski 8 siblings, 0 replies; 10+ messages in thread From: Mateusz Kulikowski @ 2015-04-13 22:37 UTC (permalink / raw) To: gregkh; +Cc: devel, linux-kernel On 08.04.2015 01:08, Mateusz Kulikowski wrote: > This series of patches fixes another set of checkpatch.pl warnings. > Please ignore this patchset and use v2 once it is reviewed. Best Regards, Mateusz ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2015-04-13 22:37 UTC | newest] Thread overview: 10+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2015-04-07 23:08 [PATCH 0/8] staging: rtl8192e: Fix more checkpatch.pl warnings Mateusz Kulikowski 2015-04-07 23:08 ` [PATCH 1/8] staging: rtl8192e: Fix SPACE_BEFORE_TAB warnings Mateusz Kulikowski 2015-04-07 23:08 ` [PATCH 2/8] staging: rtl8192e: Copy comments from r819XE_phyreg.h to r8192E_phyreg.h Mateusz Kulikowski 2015-04-07 23:08 ` [PATCH 3/8] staging: rtl8192e: remove r819xE_phyreg.h Mateusz Kulikowski 2015-04-07 23:08 ` [PATCH 4/8] staging: rtl8192e: Fix SPACING errors Mateusz Kulikowski 2015-04-07 23:08 ` [PATCH 5/8] staging: rtl8192e: Remove bb tx gains from r8192_priv Mateusz Kulikowski 2015-04-07 23:08 ` [PATCH 6/8] staging: rtl8192e: Fix LINE_SPACING warning Mateusz Kulikowski 2015-04-07 23:08 ` [PATCH 7/8] staging: rtl8192e: Fix DEEP_INDENTATION warnings in rtllib_parse_info_param() Mateusz Kulikowski 2015-04-07 23:08 ` [PATCH 8/8] staging: rtl8192e: Fix DEEP_INDENTATION warnings in rtl_dm.c Mateusz Kulikowski 2015-04-13 22:37 ` [PATCH 0/8] staging: rtl8192e: Fix more checkpatch.pl warnings Mateusz Kulikowski
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